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Author SHA1 Message Date
Craig Topper
655f8a01e6 Don't allow 32-bit only instructions to be disassembled in 64-bit mode. Fixes part of PR10700. 
llvm-svn: 140370
 2011-09-23 06:57:25 +00:00
Akira Hatanaka
102afe6879 Add definitions of 64-bit int registers. 
llvm-svn: 140366
 2011-09-23 02:33:15 +00:00
Akira Hatanaka
f213002a1c Do not rely on the enum values of argument registers A0-A3 being consecutive. 
Define function getNextIntArgReg, which takes a register as a parameter and
returns the next O32 argument integer register. Use this function when double
precision floating point arguments are passed in two integer registers.

llvm-svn: 140363
 2011-09-23 00:58:33 +00:00
Eric Christopher
f79f875df9 We're no longer going to bother supporting platforms that don't 
support C89.

We probably didn't support them anyways.

llvm-svn: 140361
 2011-09-23 00:53:10 +00:00
Eli Friedman
6f0131b3a7 PR10989: Don't print .hidden on Windows. 
llvm-svn: 140356
 2011-09-23 00:13:02 +00:00
Eli Friedman
31c7bde95a PR10991: make fast-isel correctly check whether accessing a global through an alias involves thread-local storage. (I'm not entirely sure how this is supposed to work, but this patch makes fast-isel consistent with the normal isel path.) 
llvm-svn: 140355
 2011-09-22 23:41:28 +00:00
Akira Hatanaka
c83a0bb4b6 Make changes in instruction and pattern definitions so that tablegen does not 
complain it cannot infer types in patterns. Fix a mistake in definition of 
SDT_MipsExtractElementF64.

llvm-svn: 140354
 2011-09-22 23:31:54 +00:00
Owen Anderson
a8bb97f784 Add new files to CMake. 
llvm-svn: 140352
 2011-09-22 23:20:48 +00:00
Dan Gohman
d63418e497 Fix SimplifySelectCC to add newly created nodes to the DAGCombiner 
worklist, as it may be possible to perform further optimization on them.

llvm-svn: 140349
 2011-09-22 23:01:29 +00:00
Jakob Stoklund Olesen
a608b612f1 Add support for GR32 <-> FR32 cross class copies. 
We already support GR64 <-> VR128 copies.  All of these copies break
partial register dependencies by zeroing the high part of the target
register.

llvm-svn: 140348
 2011-09-22 22:45:24 +00:00
Benjamin Kramer
a83c5493ec Update CMake build. 
llvm-svn: 140347
 2011-09-22 22:38:34 +00:00
Owen Anderson
d3151e11e8 Start stubbing out MCModule and MCAtom, which provide an API for accessing the rich disassembly of a complete object or executable. 
These are very much a work in progress, and not really useful yet.

llvm-svn: 140345
 2011-09-22 22:32:22 +00:00
Jakob Stoklund Olesen
dedb558e4d Constrain register classes instead of emitting copies. 
Sometimes register class constraints are trivial, like GR32->GR32_NOSP,
or GPR->rGPR.  Teach InstrEmitter to simply constrain the virtual
register instead of emitting a copy in these cases.

Normally, these copies are handled by the coalescer.  This saves some
coalescer work.

llvm-svn: 140340
 2011-09-22 21:39:34 +00:00
Jakob Stoklund Olesen
1d3105c3d3 Add a MinNumRegs argument to MRI::constrainRegClass(). 
The function will refuse to use a register class with fewer registers
than MinNumRegs.  This can be used by clients to avoid accidentally
increase register pressure too much.

The default value of MinNumRegs=0 doesn't affect how constrainRegClass()
works.

llvm-svn: 140339
 2011-09-22 21:39:31 +00:00
Duncan Sands
1da590b589 Synthesize SSE3/AVX 128 bit horizontal add/sub instructions from 
floating point add/sub of appropriate shuffle vectors.  Does not
synthesize the 256 bit AVX versions because they work differently.

llvm-svn: 140332
 2011-09-22 20:15:48 +00:00
Eli Friedman
6e15091fc6 PR10987: add a missed safety check to isSafePHIToSpeculate in scalarrepl. 
llvm-svn: 140327
 2011-09-22 18:56:30 +00:00
Chris Lattner
966f637ca8 Resynch intro to section with copyright section. 
llvm-svn: 140326
 2011-09-22 18:54:31 +00:00
Akira Hatanaka
82aaeed7f4 Print parentheses in next line. 
llvm-svn: 140325
 2011-09-22 18:29:29 +00:00
Akira Hatanaka
7bba6afecf Change subreg index of AFPR64 from sub_fpeven to sub_32 per Jakob's comment. 
llvm-svn: 140324
 2011-09-22 18:24:21 +00:00
Akira Hatanaka
eaf1e32694 Define a new sub-register index sub_32 for accessing the 32-bit sub-register of 
a 64-bit integer register. Move the subreg index definitions to the beginning
of the file.

llvm-svn: 140319
 2011-09-22 17:57:32 +00:00
Bill Wendling
4a26d03528 Use the C personality function instead of the C++ personality function. 
llvm-svn: 140318
 2011-09-22 17:56:40 +00:00
Akira Hatanaka
329b07db41 Print three closing parentheses when Kind is either VK_Mips_GPOFF_HI or 
VK_Mips_GPOFF_LO.

llvm-svn: 140316
 2011-09-22 17:44:37 +00:00
Akira Hatanaka
96122b7f72 Add F31 to the set of callee-saved registers. 
llvm-svn: 140315
 2011-09-22 17:35:03 +00:00
Galina Kistanova
95b887e917 Fix for warnings: ignoring return value of ‘write’, declared with attribute warn_unused_result. 
llvm-svn: 140314
 2011-09-22 17:33:24 +00:00
Akira Hatanaka
6b99d9b0f3 Fix typo. 
llvm-svn: 140313
 2011-09-22 17:26:58 +00:00
Justin Holewinski
9acce6aa64 PTX: fixup test cases for register changes 
llvm-svn: 140311
 2011-09-22 16:45:51 +00:00
Justin Holewinski
a43c9dc50c PTX: Remove physical register defs 
llvm-svn: 140310
 2011-09-22 16:45:48 +00:00
Justin Holewinski
04f4046d9f PTX: Use .param space for device function return values on SM 2.0+, and attempt 
to fix up parameter passing on SM < 2.0

llvm-svn: 140309
 2011-09-22 16:45:46 +00:00
Justin Holewinski
987b8f7a69 PTX: Fix style issues 
llvm-svn: 140308
 2011-09-22 16:45:43 +00:00
Justin Holewinski
815227205d PTX: Fixup codegen to handle emission of virtual registers. 
llvm-svn: 140307
 2011-09-22 16:45:40 +00:00
Justin Holewinski
1dd4cf37f8 PTX: Customize codegen passes in backend 
llvm-svn: 140306
 2011-09-22 16:45:37 +00:00
Justin Holewinski
fee8e64e4d PTX: Add new PTX-specific register allocator that keeps virtual registers 
instead of allocating physical registers.

This is part of a work-in-progress overhaul of the PTX register allocation scheme.

llvm-svn: 140305
 2011-09-22 16:45:33 +00:00
Garrison Venn
f623ea5484 Converted Exception demo over to using new 3.0 landingpad instruction. This 
was compiled and tested on OS X 10.7.1. It was not tested on LINUX. In 
addition the defined OLD_EXC_SYSTEM was not tested with this version.

llvm-svn: 140303
 2011-09-22 15:45:14 +00:00
Garrison Venn
cce0f439c0 This is a hack to get the demo working with the new 3.0 exception 
infrastructure. As this makes the demo no longer a demo, and especially not a 
demo on how to use the llvm exception mechanism, this hack will shortly be 
changed to use the new 3.0 exception infrastructure. However for the time being 
this demo is an example on how to use the AutoUpgrade 
UpgradeExceptionHandling(...) function on < 3.0 exception handling code.                          

llvm-svn: 140301
 2011-09-22 14:07:50 +00:00
Craig Topper
95f048d1ff Fix register printing in disassembling of push/pop of segment registers and in/out in Intel syntax mode. Fixes PR10960 
llvm-svn: 140299
 2011-09-22 07:01:50 +00:00
Akira Hatanaka
12218a1192 Add definition of 64-bit floating registers used for Mips64. 
llvm-svn: 140297
 2011-09-22 03:48:47 +00:00
Benjamin Kramer
978ef840ac The SSE version differences for fmin/fmax are more involved than I thought. 
- x87: no min or max.
- SSE1: min/max for single precision scalars and vectors.
- SSE2: min/max for single and double precision scalars and vectors.
- AVX: as SSE2, but also supports the wider ymm vectors. (this is covered by the isTypeLegal check)

llvm-svn: 140296
 2011-09-22 03:27:22 +00:00
Akira Hatanaka
d34925f313 Add enums and functions for symbols Mips64 uses. 
llvm-svn: 140295
 2011-09-22 03:09:07 +00:00
Benjamin Kramer
5844bacf0a X86: Don't form min/max nodes if the target is missing SSE. 
llvm-svn: 140294
 2011-09-22 03:01:42 +00:00
Akira Hatanaka
65c0724c19 Mips64 aligns stack on 16-byte boundary. 
llvm-svn: 140292
 2011-09-22 02:53:37 +00:00
Akira Hatanaka
60cd2b0c2f Remove unnecessary condition check. 
llvm-svn: 140291
 2011-09-22 02:41:29 +00:00
Owen Anderson
22ab29756b Turns out that Thumb2 ADR doesn't need special printing like LDR does. Fix other test failures I caused. 
llvm-svn: 140284
 2011-09-21 23:53:44 +00:00
Owen Anderson
7b134fe54c Print out immediate offset versions of PC-relative load/store instructions as [pc, #123] rather than simply #123. 
llvm-svn: 140283
 2011-09-21 23:44:46 +00:00
Devang Patel
5d43ab8434 Do not unnecessarily use AT_specification DIE because it does not add any value. 
Few weeks ago, llvm completely inverted the debug info graph. Earlier each debug info node used to keep track of its compile unit, now compile unit keeps track of important nodes. One impact of this change is that the global variable's do not have any context, which should be checked before deciding to use AT_specification DIE.

llvm-svn: 140282
 2011-09-21 23:41:11 +00:00
Galina Kistanova
5d64adbe43 Fix for DbgInfoPrinter.cpp:174:12: warning: ‘LineNo’ may be used uninitialized in this function. 
llvm-svn: 140281
 2011-09-21 23:34:23 +00:00
Bill Wendling
97f5bfd1a3 The last verification check for the new EH model. 
This makes sure that the unwind destination of an invoke is a landing pad.

llvm-svn: 140280
 2011-09-21 22:57:02 +00:00
Benjamin Kramer
e106715386 llvm-objdump: Detach symbol listing from section enumeration for mach-o. 
This reduces memory usage as we don't add the same symbol multiple times anymore.

llvm-svn: 140278
 2011-09-21 22:16:43 +00:00
Bill Wendling
1038de0df8 Attempt to update the shadow stack GC pass to the new EH model. 
This inserts a cleanup landingpad instruction and a resume to mimic the old
unwind instruction.

llvm-svn: 140277
 2011-09-21 22:14:28 +00:00
Benjamin Kramer
8b12bfc4ec X86Disassembler: if verbose logging is going to nulls(), disable logging completely. 
Otherwise we'll spend a ridiculous amount of time pretty printing debug output and then discarding it.

llvm-svn: 140276
 2011-09-21 21:47:35 +00:00
Jim Grosbach
74679928e9 Tidy up. Whitepsace. 
llvm-svn: 140275
 2011-09-21 21:36:53 +00:00