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Commit Graph

2610 Commits

Author SHA1 Message Date
Evan Cheng
6909147763 -enable-unsafe-fp-math implies -enable-finite-only-fp-math
llvm-svn: 28437
2006-05-23 18:18:46 +00:00
Vladimir Prus
125917432a Fix missing include
llvm-svn: 28435
2006-05-23 13:43:15 +00:00
Evan Cheng
19e9e63dcd Incorrect SETCC CondCode used for FP comparisons.
llvm-svn: 28433
2006-05-23 06:40:47 +00:00
Evan Cheng
00c1318055 lib/Target/Target.td
llvm-svn: 28386
2006-05-18 20:42:07 +00:00
Chris Lattner
b2ecc1b1e7 Fix the result of the call to use a correct vbitconvert. There is no need to
use getPackedTypeBreakdown at all here.

llvm-svn: 28365
2006-05-17 20:49:36 +00:00
Chris Lattner
924f3fed13 Correct a previous patch which broke CodeGen/PowerPC/vec_call.ll
llvm-svn: 28364
2006-05-17 20:43:21 +00:00
Evan Cheng
00f391f87b Fixed a LowerCallTo and LowerArguments bug. They were introducing illegal
VBIT_VECTOR nodes. There were some confusion about the semantics of
getPackedTypeBreakdown(). e.g. for <4 x f32> it returns 1 and v4f32, not 4,
and f32.

llvm-svn: 28352
2006-05-17 18:16:39 +00:00
Chris Lattner
4252704561 When we legalize target nodes, do not use getNode to create a new node,
use UpdateNodeOperands to just update the operands!  This is important because
getNode will allocate a new node if the node returns a flag and this breaks
assumptions in the legalizer that you can legalize some things multiple times
and get exactly the same results.

This latent bug was exposed by my ppc patch last night, and this fixes
gsm/toast.

llvm-svn: 28348
2006-05-17 18:00:08 +00:00
Chris Lattner
d3ff015877 Add an assertion, avoid some unneeded work for each call. No functionality
change.

llvm-svn: 28347
2006-05-17 17:55:45 +00:00
Chris Lattner
30f61c8bb1 Add support for calls that pass and return legal vectors.
llvm-svn: 28340
2006-05-16 23:39:44 +00:00
Chris Lattner
01f4f28837 Add a new ISD::CALL node, make the default impl of TargetLowering::LowerCallTo
produce it.

llvm-svn: 28338
2006-05-16 22:53:20 +00:00
Andrew Lenharth
14504c85ed Move this code to a common place
llvm-svn: 28329
2006-05-16 17:42:15 +00:00
Chris Lattner
ba1dfc1da7 Add a chain to FORMAL_ARGUMENTS. This is a minimal port of the X86 backend,
it doesn't currently use/maintain the chain properly.  Also, make the
X86ISelLowering.cpp file 80-col clean.

llvm-svn: 28320
2006-05-16 06:45:34 +00:00
Chris Lattner
fdd62b9073 Move function-live-in-handling code from the sdisel code to the scheduler.
This code should be emitted after legalize, so it can't be in sdisel.

Note that the EmitFunctionEntryCode hook should be updated to operate on the
DAG.  The X86 backend is the only one currently using this hook.

llvm-svn: 28315
2006-05-16 06:10:58 +00:00
Chris Lattner
fa068a16e1 Print the vreg that livein physregs are live in
llvm-svn: 28314
2006-05-16 05:55:30 +00:00
Chris Lattner
b79e3f7155 Legalize FORMAL_ARGUMENTS nodes correctly, we don't want to legalize them once
for each argument.

llvm-svn: 28313
2006-05-16 05:49:56 +00:00
Evan Cheng
489f9bd68f Fixing 2006-05-01-SchedCausingSpills.ll; some clean up
llvm-svn: 28279
2006-05-13 08:22:24 +00:00
Evan Cheng
7bb257e178 Revert an un-intended change
llvm-svn: 28278
2006-05-13 05:53:47 +00:00
Chris Lattner
c439f96b2c Merge identical code.
llvm-svn: 28274
2006-05-13 02:11:14 +00:00
Evan Cheng
772647518f If the register allocator cannot find a register to spill, try the aliases. If
that still fails (because all the register spill weights are inf), just grab
one.

llvm-svn: 28262
2006-05-12 19:07:46 +00:00
Chris Lattner
9e29384a4b Remove dead vars
llvm-svn: 28255
2006-05-12 18:06:45 +00:00
Chris Lattner
9a24639afc remove dead vars
llvm-svn: 28254
2006-05-12 18:04:28 +00:00
Chris Lattner
11064741d3 Remove dead variable
llvm-svn: 28253
2006-05-12 18:02:04 +00:00
Chris Lattner
474e1b7ef3 Comment out dead variables
llvm-svn: 28252
2006-05-12 17:57:54 +00:00
Chris Lattner
90527550c1 Remove dead var
llvm-svn: 28250
2006-05-12 17:50:35 +00:00
Chris Lattner
db5b91f6a8 Compile:
%tmp152 = setgt uint %tmp144, %tmp149           ; <bool> [#uses=1]
        %tmp159 = setlt uint %tmp144, %tmp149           ; <bool> [#uses=1]
        %bothcond2 = or bool %tmp152, %tmp159           ; <bool> [#uses=1]

To setne, not setune, which causes an assertion fault.

llvm-svn: 28244
2006-05-12 17:03:46 +00:00
Owen Anderson
29e4d70aed Refactor a bunch of includes so that TargetMachine.h doesn't have to include
TargetData.h.  This should make recompiles a bit faster with my current
TargetData tinkering.

llvm-svn: 28238
2006-05-12 06:33:49 +00:00
Evan Cheng
f3d7bb7a9e Backing out fix for PR770. Need to re-apply it after live range splitting is possible
llvm-svn: 28236
2006-05-12 06:06:34 +00:00
Evan Cheng
c24d0f281c Duh. That could take a long time.
llvm-svn: 28235
2006-05-12 06:05:18 +00:00
Chris Lattner
a500852895 Two simplifications for token factor nodes: simplify tf(x,x) -> x.
simplify tf(x,y,y,z) -> tf(x,y,z).

llvm-svn: 28233
2006-05-12 05:01:37 +00:00
Evan Cheng
0b8e4bca80 Add capability to scheduler to commute nodes for profit.
If a two-address code whose first operand has uses below, it should be commuted
when possible.

llvm-svn: 28230
2006-05-12 01:58:24 +00:00
Evan Cheng
cb2a0f392c Refactor scheduler code. Move register-reduction list scheduler to a
separate file. Added an initial implementation of top-down register pressure
reduction list scheduler.

llvm-svn: 28226
2006-05-11 23:55:42 +00:00
Evan Cheng
7028ff2e25 Set weight of zero length intervals to infinite to prevent them from being
spilled.

llvm-svn: 28220
2006-05-11 07:29:24 +00:00
Evan Cheng
da04c3aab4 Backing out previous check-in.
llvm-svn: 28219
2006-05-11 07:28:16 +00:00
Evan Cheng
03fa9eb65e If the live interval legnth is essentially zero, i.e. in every live range
the use follows def immediately, it doesn't make sense to spill it and
hope it will be easier to allocate for this LI.

llvm-svn: 28217
2006-05-10 22:30:41 +00:00
Evan Cheng
9f269c1bef Templatify RegReductionPriorityQueue
llvm-svn: 28212
2006-05-10 06:16:44 +00:00
Nate Begeman
3af196c9b2 Fix PR773
llvm-svn: 28207
2006-05-09 18:20:51 +00:00
Chris Lattner
486e0660b7 Fix a regression in my patch from last night that broke the llvmgcc4 build on
ppc

llvm-svn: 28205
2006-05-09 16:41:59 +00:00
Evan Cheng
1a8feb189e Add pseudo dependency to force a def&use operand to be scheduled last (unless
the distance between the def and another use is much longer). This is under
option control for now "-sched-lower-defnuse".

llvm-svn: 28201
2006-05-09 07:13:34 +00:00
Evan Cheng
3f72d2121b Debugging info
llvm-svn: 28200
2006-05-09 06:55:15 +00:00
Evan Cheng
aad3fe008e PR 770 - permit coallescing of registers in subset register classes.
llvm-svn: 28197
2006-05-09 06:37:48 +00:00
Chris Lattner
b7152b0b42 Implement MASM sections correctly, without a "has masm sections flag" and a bunch of special case code.
llvm-svn: 28194
2006-05-09 05:33:48 +00:00
Chris Lattner
28fe830b3b Oh yeah, there are two of these now, unify both.
llvm-svn: 28192
2006-05-09 05:24:50 +00:00
Chris Lattner
d2aea9851e Setting SwitchToSectionDirective properly in the MASM backend permits a bunch
of code to be unified.

llvm-svn: 28191
2006-05-09 05:23:12 +00:00
Chris Lattner
830bed591e Don't prefix section directives with a tab. Doing so causes blank lines to
be emitted to the .s file.

llvm-svn: 28189
2006-05-09 05:19:59 +00:00
Chris Lattner
baefeb1e09 Make the masm codepath work like the normal code path.
llvm-svn: 28188
2006-05-09 05:15:58 +00:00
Chris Lattner
6ede576b55 The MASM asmprinter has been fixed, these hacks are no longer needed.
llvm-svn: 28186
2006-05-09 05:13:34 +00:00
Chris Lattner
f45b6d5c08 Split SwitchSection into SwitchTo{Text|Data}Section methods.
llvm-svn: 28184
2006-05-09 04:59:56 +00:00
Chris Lattner
eed10e837c Make the case I just checked in stronger. Now we compile this:
short test2(short X, short x) {
  int Y = (short)(X+x);
  return Y >> 1;
}

to:

_test2:
        add r2, r3, r4
        extsh r2, r2
        srawi r3, r2, 1
        blr

instead of:

_test2:
        add r2, r3, r4
        extsh r2, r2
        srwi r2, r2, 1
        extsh r3, r2
        blr

llvm-svn: 28175
2006-05-08 21:18:59 +00:00
Chris Lattner
7b8a0cfff3 Implement and_sext.ll:test3, generating:
_test4:
        srawi r3, r3, 16
        blr

instead of:

_test4:
        srwi r2, r3, 16
        extsh r3, r2
        blr

for:

short test4(unsigned X) {
  return (X >> 16);
}

llvm-svn: 28174
2006-05-08 20:59:41 +00:00