Evandro Menezes
b1d0aef74d
[AArch64] Refactor Exynos machine model
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Effectively, NFC.
llvm-svn: 345201
2018-10-24 21:40:43 +00:00
Evandro Menezes
ecadbaba69
[AArch64] Refactor Exynos machine model (NFC)
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llvm-svn: 345187
2018-10-24 20:03:24 +00:00
Evandro Menezes
cb4099b53e
[AArch64] Fix overlapping instructions
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Fix overlapping instruction descriptions in the machine model for Exynos M3.
Effectively, NFC.
llvm-svn: 345186
2018-10-24 20:03:20 +00:00
Clement Courbet
b982f02652
[ExynosM3] Fix scheduling info.
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Differential Revision: https://reviews.llvm.org/D46356
llvm-svn: 332713
2018-05-18 13:10:41 +00:00
Evandro Menezes
f1c1fba1e2
[AArch64] Adjust the cost model for Exynos M3
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Fix typo and simplify matching expression.
llvm-svn: 329130
2018-04-03 22:57:17 +00:00
Evandro Menezes
d4d8b0fe45
[AArch64] Adjust the cost model for Exynos M3
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Fix typo in the number of integer dividers.
llvm-svn: 328027
2018-03-20 20:00:29 +00:00
Craig Topper
ead1756da7
[TableGen] When trying to reuse a scheduler class for instructions from an InstRW, make sure we haven't already seen another InstRW containing this instruction on this CPU.
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This is similar to the check later when we remap some of the instructions from one class to a new one. But if we reuse the class we don't get to do that check.
So many CPUs have violations of this check that I had to add a flag to the SchedMachineModel to allow it to be disabled. Hopefully we can get those cleaned up quickly and remove this flag.
A lot of the violations are due to overlapping regular expressions, but that's not the only kind of issue it found.
llvm-svn: 327808
2018-03-18 19:56:15 +00:00
Evandro Menezes
a2a56a047a
[AArch64] Adjust the cost model for Exynos M3
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Fix typo.
llvm-svn: 327663
2018-03-15 20:37:32 +00:00
Evandro Menezes
8935624e75
[AArch64] Adjust the cost model for Exynos M3
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Add special case for rotate right.
llvm-svn: 327662
2018-03-15 20:31:25 +00:00
Evandro Menezes
86749bf699
[AArch64] Adjust the cost model for Exynos M3
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Increase the number of cheap as move cases of register reset.
llvm-svn: 327661
2018-03-15 20:31:13 +00:00
Evandro Menezes
4903f13b51
[AArch64] Adjust the cost model for Exynos M3
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Fix the modeling of transfers between a generic register and a partial ASIMD
one.
llvm-svn: 324766
2018-02-09 19:26:11 +00:00
Evandro Menezes
120280b132
[AArch64] Adjust the cost model for Exynos M3
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Fix the modeling of long division and SIMD conversion from integer and
horizontal minimum and maximum.
llvm-svn: 324417
2018-02-06 22:35:47 +00:00
Clement Courbet
422dc7f90c
[AArch64][NFC] Make all ProcResource definitions include their SchedModel.
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This makes targets ExynosM1,ExynosM3,ThunderX2T99 consistent with all
other targets.
llvm-svn: 323955
2018-02-01 12:12:01 +00:00
Evandro Menezes
aa1d2d9fb2
[AArch64] Add pipeline model for Exynos M3
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Add the scheduling and cost model for Exynos M3.
Differential revision: https://reviews.llvm.org/D42387
llvm-svn: 323773
2018-01-30 15:40:16 +00:00
