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199564 Commits

Author SHA1 Message Date
Florian Hahn
fce4f3542f [SLP] Make sure instructions are ordered when computing spill cost.
The entries in VectorizableTree are not necessarily ordered by their
position in basic blocks. Collect them and order them by dominance so
later instructions are guaranteed to be visited first. For instructions
in different basic blocks, we only scan to the beginning of the block,
so their order does not matter, as long as all instructions in a basic
block are grouped together. Using dominance ensures a deterministic order.

The modified test case contains an example where we compute a wrong
spill cost (2) without this patch, even though there is no call between
any instruction in the bundle.

This seems to have limited practical impact, .e.g on X86 with a recent
Intel Xeon CPU with -O3 -march=native -flto on MultiSource,SPEC2000,SPEC2006
there are no binary changes.

Reviewers: craig.topper, RKSimon, xbolva00, ABataev, spatel

Reviewed By: ABataev

Differential Revision: https://reviews.llvm.org/D82444
2020-07-03 17:30:17 +01:00
David Green
b9acbecea9 [ARM][HWLoops] Create hardware loops for sibling loops
Given a loop with two subloops, it should be possible for both to be
converted to hardware loops. That's what this patch does, simply enough.
It slightly alters the loop iterating order to try and convert all
subloops. If one (or more) succeeds, it stops as before.

Differential Revision: https://reviews.llvm.org/D78502
2020-07-03 17:20:02 +01:00
Florian Hahn
054d41f416 [SLP] Precommit test for which spill cost is computed incorrectly.
Test for D82444.
2020-07-03 17:15:52 +01:00
Florian Hahn
595d53a58c [InstCombine] Precommit tests for PR43580. 2020-07-03 17:14:02 +01:00
Sean Fertile
91c9c2c9c7 Enable basepointer for AIX.
Differential Revision: https://reviews.llvm.org/D82030
2020-07-03 11:55:49 -04:00
Sanjay Patel
cf6a1dd45a [InstCombine] add one-use check to cast+select narrowing transform
Prevent increasing the instruction count.
2020-07-03 11:54:09 -04:00
Sanjay Patel
c33755d468 [InstCombine] add tests to show missing one-use checks; NFC 2020-07-03 11:54:09 -04:00
Xing GUO
acdc8b5ee7 [DWARFYAML][test] Use --ignore-case to suppress errors.
This patch is to fix build bot failure (http://lab.llvm.org:8011/builders/llvm-clang-win-x-aarch64/builds/553).
2020-07-03 23:46:37 +08:00
Simon Pilgrim
68cd0d53ec [InstCombine] canEvaluateTruncated - use KnownBits to check for inrange shift amounts
Currently canEvaluateTruncated can only attempt to truncate shifts if they are scalar/uniform constant amounts that are in range.

This patch replaces the constant extraction code with KnownBits handling, using the KnownBits::getMaxValue to check that the amounts are inrange.

This enables support for nonuniform constant cases, and also variable shift amounts that have been masked somehow. Annoyingly, this still won't work for vectors with (demanded) undefs as KnownBits returns nothing in those cases, but its a definite improvement on what we currently have.

Differential Revision: https://reviews.llvm.org/D83127
2020-07-03 16:02:10 +01:00
Petre-Ionut Tudor
235879e1a0 [ARM] Generate [SU]RHADD from (b - (~a)) >> 1
Summary:
Teach LLVM to recognize the above pattern, which is usually a
transformation of (a + b + 1) >> 1, where the operands are either
signed or unsigned types.

Subscribers: kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82669
2020-07-03 16:00:06 +01:00
Xing GUO
31e0221415 [ObjectYAML][ELF] Add support for emitting the .debug_gnu_pubnames/pubtypes sections.
This patch helps add support for emitting the .debug_gnu_pubnames and .debug_gnu_pubtypes sections.

The .debug_gnu_pub* sections is verified by llvm-dwarfdump.

Known issues:
- Doesn't support emitting multiple pub-tables.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D82367
2020-07-03 22:40:18 +08:00
Xing GUO
540bf09c85 [DWARFYAML][unittest] Use parseDWARFYAML() in unit test. NFC. 2020-07-03 22:36:00 +08:00
Sam Parker
44a5a2927b [NFC][SimplifyCFG] Move X86 tests into subdir 2020-07-03 14:28:27 +01:00
Georgii Rymar
9740166fc0 [llvm-readobj] - Use cantFail() for all Obj->sections() calls. NFCI.
`ELFDumper<ELFT>::ELFDumper` calls `Obj->sections()` in its constructor:
https://github.com/llvm/llvm-project/blob/master/llvm/tools/llvm-readobj/ELFDumper.cpp#L2046

this means that all subsequent calls can't fail and can be
wrapped into `cantFail` in instead of `unwrapOrError` for simplicity.

Actually we already do it in a few places. In this patch I've fixed all
other places I've found.

Differential revision: https://reviews.llvm.org/D83126
2020-07-03 16:25:20 +03:00
Danila Malyutin
7b9fb1bdf8 [IR] Short-circuit comparison with itself for Attributes
Differential Revision: https://reviews.llvm.org/D82295
2020-07-03 16:07:14 +03:00
Simon Pilgrim
946c375671 Add tests for trunc(shl/lshr/ashr(*ext(x),zext(and(y,c)))) patterns with variable shifts with clamped shift amounts 2020-07-03 13:39:16 +01:00
Simon Pilgrim
76cfb7d9fd Add vector trunc(or(shl(zext(x),c1),zext(x))) tests 2020-07-03 13:32:00 +01:00
vpykhtin
e99867bef0 [AMDGPU] Don't combine DPP if DPP register is used more than once per instruction
Reviewers: arsenm, rampitec, foad

Reviewed By: rampitec, foad

Subscribers: wuzish, kzhuravl, nemanjai, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kbarton, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82551
2020-07-03 15:08:26 +03:00
Luke Geeson
920620bd6d [ARM] Add Cortex-A77 Support for Clang and LLVM
This patch upstreams support for the Arm-v8 Cortex-A77
processor for AArch64 and ARM.

In detail:
- Adding cortex-a77 as a cpu option for aarch64 and arm targets in clang
- Cortex-A77 CPU name and ProcessorModel in llvm

details of the CPU can be found here:
https://www.arm.com/products/silicon-ip-cpu/cortex-a/cortex-a77

and a similar submission to GCC can be found here:
e0664b7a63

The following people contributed to this patch:
- Luke Geeson
- Mikhail Maltsev

Reviewers: t.p.northover, dmgreen, ostannard, SjoerdMeijer

Reviewed By: dmgreen

Subscribers: dmgreen, kristof.beyls, hiraditya, danielkiss, cfe-commits,
llvm-commits, miyuki

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D82887
2020-07-03 13:00:54 +01:00
James Henderson
6f98470a43 [DebugInfo] Use Cursor to detect errors in debug line prologue parser
Previously, the debug line parser would keep attempting to read data
even if it had run out of data to read. This meant errors in parsing
would often end up being reported as something else, such as an unknown
version or malformed directory/filename table. This patch fixes the
issues by using the Cursor API to capture errors.

Reviewed by: labath

Differential Revision: https://reviews.llvm.org/D83043
2020-07-03 11:52:06 +01:00
Simon Pilgrim
46f81e0bbc Regenerate apint-cast tests and replace %tmp variable names to silence update_test_checks warnings 2020-07-03 11:42:16 +01:00
Simon Pilgrim
eddbfded1e Add nonuniform vector trunc(or(shl(zext(x),c1),srl(zext(x),c2))) tests 2020-07-03 11:42:15 +01:00
Simon Pilgrim
c609648350 Regenerate mul-trunc tests, add vector variants and replace %tmp variable names to silence update_test_checks warnings 2020-07-03 11:42:15 +01:00
Xing GUO
120aef86f5 [DWARFYAML][debug_gnu_*] Add the missing context IsGNUStyle. NFC.
This patch helps add the missing context `IsGNUStyle`. Before this patch, yaml2obj cannot parse the YAML description of 'debug_gnu_pubnames' and 'debug_gnu_pubtypes' correctly due to the missing context.

In other words, if we have

```
DWARF:
  debug_gnu_pubtypes:
    Length:
      TotalLength: 0x1234
    Version:    2
    UnitOffset: 0x1234
    UnitSize:   0x4321
    Entries:
      - DieOffset:  0x12345678
        Name:       abc
        Descriptor: 0x00      ## Descriptor can never be mapped into Entry.Descriptor
```

yaml2obj will complain that "error: unknown key 'Descriptor'".

This patch helps resolve this problem.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D82435
2020-07-03 18:12:58 +08:00
Simon Pilgrim
2593b6907b Fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warning. 2020-07-03 10:54:28 +01:00
Simon Pilgrim
8257854bda [InstCombine] Add sext(ashr(shl(trunc(x),c),c)) folding support for vectors
Replacing m_ConstantInt with m_Constant permits folding of vectors as well as scalars.

Differential Revision: https://reviews.llvm.org/D83058
2020-07-03 10:04:37 +01:00
Simon Pilgrim
fdbe62d99b Regenerate PR19420 tests 2020-07-03 10:04:37 +01:00
Georgii Rymar
1de44904a6 [llvm-readelf] - Do not report a misleading warning when there is no string table.
This is a follow-up for D82955, which allows to continue dumping when a symbol table is broken.
When we are unable to get the string table and trying to print symbols,
the existent tool logic together with D82955 reports an error:

"st_name (0x??) is past the end of the string table of size 0x??"

Though, when there is no string table, this message becomes misleading and excessive.
It is easy to fix it though and that is what this patch does.

Differential revision: https://reviews.llvm.org/D83042
2020-07-03 11:56:37 +03:00
Georgii Rymar
73e2acf290 [llvm-readelf] - Do not error out when dumping symbols.
When the --symbols option/--dyn-symbols is given we might report an
error and exit when something goes not right. E.g. when the SHT_SYMTAB
section is broken. Though we could report a warning and try to continue
dumping instead in many cases.

This patch removes `unwrapOrErr` calls from the code involved in the
flow described.

Differential revision: https://reviews.llvm.org/D82955
2020-07-03 11:55:35 +03:00
Guillaume Chatelet
9e782e3923 [Alignment][NFC] Use 5 bits to store Instructions Alignment
As per [MaxAlignmentExponent]{b7338fb1a6/llvm/include/llvm/IR/Value.h (L688)} alignment is not allowed to be more than 2^29.
Encoded as Log2, this means that storing alignment uses 5 bits.
This patch makes sure all instructions store their alignment in a consistent way, encoded as Log2 and using 5 bits.

Differential Revision: https://reviews.llvm.org/D83119
2020-07-03 08:54:27 +00:00
Guillaume Chatelet
5c1ab6ec74 [Alignment][NFC] Use proper getter to retrieve alignment from ConstantInt and ConstantSDNode
This patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Differential Revision: https://reviews.llvm.org/D83082
2020-07-03 08:06:43 +00:00
Luofan Chen
854c8d3845 [Attributor] Create getName() method for abstract attribute
Summary: The `getName()` method returns the name of the abstract attribute

Reviewers: jdoerfert, sstefan1, uenoku, homerdin, baziotis

Reviewed By: sstefan1

Subscribers: uenoku, kuter, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D83109
2020-07-03 15:22:35 +08:00
serge-sans-paille
81d0d1ecfb Fix stack-clash probing for large static alloca
Differential Revision: https://reviews.llvm.org/D82867
2020-07-03 09:22:03 +02:00
Guillaume Chatelet
ffe142881c [NFC] Use ADT/Bitfields in Instructions
This is an example patch for D81580.

Differential Revision: https://reviews.llvm.org/D81662
2020-07-03 07:20:22 +00:00
Craig Topper
83c3d30676 [X86] Remove MODRM_SPLITREGM from the disassembler tables.
This offers a very minor table size reduction due to only being
used for one AMX opcode.
2020-07-03 00:16:20 -07:00
Sam Parker
1a1d08e1d0 [CostModel] Fix cast crash
Don't presume instruction operands while matching reductions.

Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=46430

Differential Revision: https://reviews.llvm.org/D82453
2020-07-03 07:53:45 +01:00
Kai Luo
8382e3ec50 [PowerPC] Implement probing for dynamic stack allocation
This patch is part of supporting `-fstack-clash-protection`. Mainly do
such things compared to existing `lowerDynamicAlloc`

- Added a new pseudo instruction PPC::PREPARE_PROBED_ALLOC to get
  actual frame pointer and final stack pointer.
- Synthesize a loop to probe by blocks.
- Use DYNAREAOFFSET to get MaxCallFrameSize which is calculated in
  prologepilog.

Differential Revision: https://reviews.llvm.org/D81358
2020-07-03 05:36:40 +00:00
Craig Topper
58b13955d1 [X86] Add back support for matching VPTERNLOG from back to back logic ops.
I think this mostly looks ok. The only weird thing I noticed was
a couple rotate vXi8 tests picked up an extra logic op where we have

(and (or (and), (andn)), X). Previously we matched the (or (and), (andn))
to vpternlog, but now we match the (and (or), X) and leave the and/andn
unmatched.
2020-07-02 22:11:52 -07:00
Carl Ritson
0962ad81e4 [AMDGPU] Insert PS early exit at end of control flow
Exit early if the exec mask is zero at the end of control flow.
Mark the ends of control flow during control flow lowering and
convert these to exits during the insert skips pass.

Reviewed By: nhaehnle

Differential Revision: https://reviews.llvm.org/D82737
2020-07-03 14:04:34 +09:00
Kai Luo
e5fd5e8a10 [PowerPC][NFC] Prevent unused error when assertion is disabled. 2020-07-03 04:23:19 +00:00
Carl Ritson
5eef7b47fb Revert "[AMDGPU] Insert PS early exit at end of control flow"
This reverts commit 2bfcacf0ad362956277a1c2c9ba00ddc453a42ce.

There appears to be an issue to analysis preservation.
2020-07-03 13:03:33 +09:00
Kai Luo
5e4157d196 [PowerPC][NFC] Refactor lowerDynamicAlloc
When performing dynamic stack allocation, calculation of frame pointer
and actual negsize can be separated. This patch refactors
`lowerDynamicAlloc` in preparation of supporting
`-fstack-clash-protection` which also has to calculate actual frame
pointer and negsize.

Differential Revision: https://reviews.llvm.org/D81354
2020-07-03 03:33:24 +00:00
Carl Ritson
f5d888ce7f [AMDGPU] Insert PS early exit at end of control flow
Exit early if the exec mask is zero at the end of control flow.
Mark the ends of control flow during control flow lowering and
convert these to exits during the insert skips pass.

Reviewed By: nhaehnle

Differential Revision: https://reviews.llvm.org/D82737
2020-07-03 12:26:28 +09:00
Carl Ritson
d40c701079 [AMDGPU] Unify early PS termination blocks
Generate a single early exit block out-of-line and branch to this
if all lanes are killed. This avoids branching if lanes are active.

Reviewed By: nhaehnle

Differential Revision: https://reviews.llvm.org/D82641
2020-07-03 09:58:05 +09:00
Roman Lebedev
f3b790c8b1 [NFC][Scalarizer] Also scalarize loads in newly-added tests
Should help better showcase improvements
2020-07-03 02:37:29 +03:00
Roman Lebedev
0ea8f6b013 [NFC][Scalarizer] Add some insertelement/extractelement tests
See D82961/D82970/D83101/D83102.
2020-07-03 02:04:47 +03:00
Nico Weber
cb9c57e9e0 [gn build] get everything to build when llvm_targets_to_build is just AArch64 2020-07-02 18:52:05 -04:00
Craig Topper
d005b641e0 [X86] Teach lower512BitShuffle to try bitmask and bitblend before splitting v32i16/v64i8 on av512f only targets.
We consider v32i16/v64i8 to be legal types on avx512f, but we
don't have most operations until avx512bw. But we can use
and/or/xor operations. So try those before splitting.

This is especially helpful since we turn some ands with constant
masks into shuffles in early DAG combines. So we should make sure
we recover those back to AND.
2020-07-02 15:35:48 -07:00
Biplob Mishra
d6caac3195 [PowerPC] Implement Vector Blend Builtins in LLVM/Clang
Implements vec_blendv()

Differential Revision: https://reviews.llvm.org/D82774
2020-07-02 16:52:52 -05:00
Sameer Arora
d13ebe32f6 Fix typo and check commit access. 2020-07-02 14:49:47 -07:00