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199564 Commits

Author SHA1 Message Date
David Green
684e62e531 [ARM] Remove hasSideEffects from FP converts
Whether an instruction is deemed to have side effects in determined by
whether it has a tblgen pattern that emits a single instruction.
Because of the way a lot of the the vcvt instructions are specified
either in dagtodag code or with patterns that emit multiple
instructions, they don't get marked as not having side effects.

This just marks them as not having side effects manually. It can help
especially with instruction scheduling, to not create artificial
barriers, but one of these tests also managed to produce fewer
instructions.

Differential Revision: https://reviews.llvm.org/D81639
2020-07-05 16:23:24 +01:00
Simon Pilgrim
16b569b2d7 [X86][SSE] Add PACKSS/PACKUS style patterns tests
Similar to the proposed generic code generated by D61129 - there's still some shuffle combining improvements to go before that patch is ready.
2020-07-05 16:18:23 +01:00
Alexander Belyaev
ea3fabb802 [llvm] Cast to (void) the unused variable. 2020-07-05 12:33:58 +02:00
Fangrui Song
52308d71e7 Add tests for clang -fno-zero-initialized-in-bss and llc -nozero-initialized-in-bss
And rename the CC1 option.
2020-07-04 23:26:57 -07:00
Georgy Komarov
564d25cbd9 [llvm-objcopy] Fix crash when removing symbol table at same time as adding a symbol
This patch resolves crash that occurs when user wanted to remove all
symbols and add a brand new one using:

```
llvm-objcopy -R .symtab --add-symbol foo=1234 in.o out.o
```

Before these changes the symbol table internally being null when adding
new symbols. For now we will regenerate symtab in this case.

This fixes: https://bugs.llvm.org/show_bug.cgi?id=43930

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D82935
2020-07-05 05:14:00 +03:00
Thomas Lively
1c8a1d0f1c [WebAssembly] Do not assume br_table range checks will be gt_u
OSS-Fuzz and the Emscripten test suite uncovered some edge cases in
which the range check instruction seemed to be an (i32.const 0) or
other unexpected instruction, triggering an assertion. Unfortunately
the reproducers are rather complicated, so they don't make good unit
tests. This commit removes the bad assertion and conservatively
optimizes range checks only when the range check instruction is
i32.gt_u.

Differential Revision: https://reviews.llvm.org/D83169
2020-07-04 18:11:24 -07:00
Nico Weber
00222f480c [gn build] fix link of libclang_rt.asan_osx_dynamic.dylib if command line tools are not installed 2020-07-04 20:26:39 -04:00
Nico Weber
4b189c5644 [gn build] make stage2_unix_toolchain set clang_base_path
This fixes the build of compiler-rt on macOS when _not_ using
clang_base_path in args.gn: Xcode clang knows where to find the
SDK, but regular clang doesn't and needs a -isysroot parameter.
We correctly add that parameter when clang_base_path is set,
but else we omit it. If clang_base_path was not set, we also
didn't add the flag for stage2_unix_toolchain() when we build
compiler-rt with just-built clang.

Make stage2_unix_toolchain() use clang_base_path instead of setting
cc / cxx. It's less code, and it gets things like this right.
2020-07-04 19:36:09 -04:00
Roman Lebedev
a24529a504 [llvm-reduce] extractGVsFromModule(): don't crash when deleting instr twice
As it can be seen in newly-added (previously-crashing) test-case,
there can be a situation where multiple GV's are used in instr,
and we would schedule the same instruction to be deleted several times,
crashing when trying to delete it the second time.

We could either store WeakVH (done here), or use something set-like.
I think using WeakVH is prevalent in these cases elsewhere.
2020-07-05 01:01:46 +03:00
Roman Lebedev
f794b74374 [llvm-reduce] extractArgumentsFromModule(): don't crash when deleting instr twice
As it can be seen in newly-added (previously-crashing) test-case,
there can be a situation where multiple arguments are used in instr,
and we would schedule the same instruction to be deleted several times,
crashing when trying to delete it the second time.

We could either store WeakVH (done here), or use something set-like.
I think using WeakVH is prevalent in these cases elsewhere.
2020-07-05 00:52:42 +03:00
Craig Topper
4e132fb8b2 [DAGCombiner] visitSIGN_EXTEND_INREG should fold sext_vector_inreg(undef) to 0 not undef.
We need to ensure that the sign bits of the result all match
so we can't fold to undef.

Similar to PR46585.

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D83163
2020-07-04 14:35:49 -07:00
sstefan1
4314ff3620 [OpenMPOpt] ICV Tracking
This is the first and most basic ICV Tracking implementation. For this
first version, we only support deduplication within the same BB.

Reviewers: jdoerfert, JonChesterfield, hamax97, jhuber6, uenoku,
baziotis

Differential Revision: https://reviews.llvm.org/D81788
2020-07-04 23:31:50 +02:00
Roman Lebedev
cb062e6baf Revert "[AssumeBundles] Use operand bundles to encode alignment assumptions"
Assume bundle can have more than one entry with the same name,
but at least AlignmentFromAssumptionsPass::extractAlignmentInfo() uses
getOperandBundle("align"), which internally assumes that it isn't the
case, and happily crashes otherwise.

Minimal reduced reproducer: run `opt -alignment-from-assumptions` on

target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%0 = type { i64, %1*, i8*, i64, %2, i32, %3*, i8* }
%1 = type opaque
%2 = type { i8, i8, i16 }
%3 = type { i32, i32, i32, i32 }

; Function Attrs: nounwind
define i32 @f(%0* noalias nocapture readonly %arg, %0* noalias %arg1) local_unnamed_addr #0 {
bb:
  call void @llvm.assume(i1 true) [ "align"(%0* %arg, i64 8), "align"(%0* %arg1, i64 8) ]
  ret i32 0
}

; Function Attrs: nounwind willreturn
declare void @llvm.assume(i1) #1

attributes #0 = { nounwind "reciprocal-estimates"="none" }
attributes #1 = { nounwind willreturn }


This is what we'd have with -mllvm -enable-knowledge-retention

This reverts commit c95ffadb2474a4d8c4f598d94d35a9f31d9606cb.
2020-07-04 23:49:23 +03:00
Craig Topper
8b0dff8c8e [DAGCombiner] Don't fold zext_vector_inreg/sext_vector_inreg(undef) to undef. Fold to 0.
zext_vector_inreg needs to produces 0s in the extended bits and
sext_vector_inreg needs to produce upper bits that are all the
same. So we should fold them to a 0 vector instead of undef.

Fixes PR46585.
2020-07-04 11:42:53 -07:00
Craig Topper
06e97f99d0 [X86] Add test caes for pr46585. NFC 2020-07-04 11:42:50 -07:00
Roman Lebedev
c248077ae2 [Utils] Make -assume-builder/-assume-simplify actually work on Old-PM
clang w/ old-pm currently would simply crash
when -mllvm  -enable-knowledge-retention=true is specified.

Clearly, these two passes had no Old-PM test coverage,
which would have shown the problem - not requiring AssumptionCacheTracker,
but then trying to always get it.

Also, why try to get domtree only if it's cached,
but at the same time marking it as required?
2020-07-04 21:06:36 +03:00
Craig Topper
ea772ee96b [X86] Teach lowerShuffleAsBlend to use bit blend for v16i8/v32i8/v16i16 when avx512vl is enabled but not avx512bw.
Probably not super important since there are no real CPUs with
avx512vl and not avx512bw. But vpternlog should be better than
vblendvb.

I do wonder if we should use vpternlog even with BWI. We
currently use vblendmb or vpblendmw by putting the mask into a GPR
and moving it to a k-register. But I don't think we hoist the
GPR to k-register copy in machine LICM. Using VPTERNLOG would use
a constant pool load, but has the advantage that we're pretty good
at hoisting and rematerializing those.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D83156
2020-07-04 10:26:56 -07:00
Craig Topper
9e30339dbf [X86] Disable VPBLENDVB formation in combineLogicBlendIntoPBLENDV if VPTERNLOG is supported.
VPBLENDVB is multiple uops while VPTERNLOG is a single uop. So
we should use that instead.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D83155
2020-07-04 10:12:19 -07:00
Sanjay Patel
16b97ffa0a [InstCombine] fix miscompile from umul_with_overflow matching
As noted in PR46561:
https://bugs.llvm.org/show_bug.cgi?id=46561
...it takes something beyond a minimal IR example to trigger
this bug because it relies on matching non-canonical IR.

There are no tests that show the need for matching this
pattern, so I'm just deleting it to fix the miscompile.
2020-07-04 11:16:23 -04:00
Roman Lebedev
347c3e4e9c [InstCombine] Always try to invert non-canonical predicate of an icmp
Summary:
The actual transform i was going after was:
https://rise4fun.com/Alive/Tp9H
```
Name: zz
Pre: isPowerOf2(C0) && isPowerOf2(C1) && C1 == C0
%t0 = and i8 %x, C0
%r = icmp eq i8 %t0, C1
  =>
%t = icmp eq i8 %t0, 0
%r = xor i1 %t, -1

Name: zz
Pre: isPowerOf2(C0)
%t0 = and i8 %x, C0
%r = icmp ne i8 %t0, 0
  =>
%t = icmp eq i8 %t0, 0
%r = xor i1 %t, -1
```
but as it can be seen from the current tests, we already canonicalize most of it,
and we are only missing handling multi-use non-canonical icmp predicates.

If we have both `!=0` and `==0`, even though we can CSE them,
we end up being stuck with them. We should canonicalize to the `==0`.

I believe this is one of the cleanup steps i'll need after `-scalarizer`
if i end up proceeding with my WIP alloca promotion helper pass.

Reviewers: spatel, jdoerfert, nikic

Reviewed By: nikic

Subscribers: zzheng, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D83139
2020-07-04 18:12:04 +03:00
Sanjay Patel
82d56c5a46 [InstCombine] improve debug value names; NFC
The use of 'tmp' can trigger warnings from the update_test_checks.py
script. That's evidence of a flaw in the script's logic, but we
can always do better than naming variables 'tmp' in LLVM too.

The phi test file should be updated with auto-generated regex CHECK
lines, so it isn't affected by cosmetic diffs, but I don't have
time to do that right now.
2020-07-04 11:06:30 -04:00
Sanjay Patel
900702b86c [InstCombine] add test for miscompile (PR46561); NFC 2020-07-04 11:06:30 -04:00
Simon Pilgrim
9eb084f93b [DAG] matchBinOpReduction - match subvector reduction patterns beyond a matched shufflevector reduction
Currently matchBinOpReduction only handles shufflevector reduction patterns, but in many cases these only occur in the final stages of a reduction, once we're down to legal vector widths.

Before this its likely that we are performing reductions using subvector extractions to repeatedly split the source vector in half and perform the binop on the halves.

Assuming we've found a non-partial reduction, this patch continues looking for subvector reductions as far as it can beyond the last shufflevector.

Fixes PR37890
2020-07-04 15:28:15 +01:00
Simon Pilgrim
9599b97ddb [X86][SSE] Add add/fadd reduction shuffle+subvector tests
Tests based on the PR37890 test cases - the vector combine pass should leave us with a reduction chain ending in extract(add(x,shuffle(x,1,-1,...))), but the higher reduction stages will be subvector extractions not shuffles.
2020-07-04 15:10:09 +01:00
Simon Pilgrim
a968b02e34 [X86][AVX] Fold PACK(LOSUBVECTOR(SHUFFLE(X)),HISUBVECTOR(SHUFFLE(X))) -> SHUFFLE(PACK(LOSUBVECTOR(X),HISUBVECTOR(X)))
Using PACK for truncations leaves us with intermediate shuffles that can be tricky to remove while the truncation tree is being formed.

This fold helps pull out the PERMQ case which is one of the most common, avoiding some costly lane-crossing shuffles.

A future patch will begin adding more general shuffle folding, which we should be able to use for HADD/HSUB as well.
2020-07-04 13:54:30 +01:00
LLVM GN Syncbot
58098a1e6b [gn build] Port b6cbe6cb039 2020-07-04 12:02:31 +00:00
Paul Walker
2d7a8bc6d4 [SVE] Fix invalid assert in expand_DestructiveOp.
AArch64ExpandPseudo::expand_DestructiveOp contains an assert to
ensure the destructive operand's register is unique.  However,
this is only required when psuedo expansion emits a movprfx.

A simple example when a movprfx is not required is
  Z0 = FADD_ZPZZ_UNDEF_S P0, Z0, Z0
which expands to an unprefixed FADD_ZPmZ_S instruction.

This patch moves the assert to the places where a movprfx is emitted.

Differential Revision: https://reviews.llvm.org/D83029
2020-07-04 09:21:40 +00:00
Nikita Popov
d3333eef26 [InstSimplify] Simplify comparison between zext(x) and sext(x)
This is picking up a loose thread from D69006: We can simplify
(zext x) ule (sext x) and (zext x) sge (sext x) to true, with
various permutations. Oddly, SCEV knows about this identity,
but nothing on the IR level does.

Differential Revision: https://reviews.llvm.org/D83081
2020-07-04 11:03:00 +02:00
Nikita Popov
f823d48ee7 [InstSimplify] Add additional zext/sext comparison tests (NFC)
Add vector variants, and negative tests where the operand does
not match.
2020-07-04 11:03:00 +02:00
LLVM GN Syncbot
71fab9b2ae [gn build] Port 8bd000a65fe 2020-07-04 08:53:11 +00:00
Craig Topper
7e8bc21cde [X86] Directly emit VPTERNLOG from canonicalizeBitSelect when possible.
Seems to produce better results on some rotate tests. And is
neutral for other tests.
2020-07-03 22:08:28 -07:00
Kai Luo
f91a303288 [PowerPC] Implement probing for prologue
This patch is part of supporting `-fstack-clash-protection`. Implemented
probing when emitting prologue.

Differential Revision: https://reviews.llvm.org/D81460
2020-07-04 03:07:08 +00:00
Craig Topper
1de31bcad8 [X86] Add matching support for X86ISD::ANDNP to X86DAGToDAGISel::tryVPTERNLOG. 2020-07-03 17:50:35 -07:00
Thomas Lively
bb0c10ffc6 [WebAssembly] Do not omit range checks for i64 switches
Summary:
Since the br_table instruction takes an i32, switches over i64s (and
larger integers) must use the i32.wrap_i64 instruction to truncate the
table index. This truncation makes numbers just over 2^32
indistinguishable from small numbers, so it was a miscompilation to
omit the range check preceding these br_tables. This change fixes the
problem by skipping the "fixing" of the br_table when the range check
is an i64 instruction.

Fixes PR46447.

Reviewers: aheejin, dschuff, kripken

Reviewed By: kripken

Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D83017
2020-07-03 17:15:39 -07:00
Francis Visoiu Mistrih
a210f22919 [LoopDeletion] Emit a remark when a dead loop is deleted
This emits a remark when LoopDeletion deletes a dead loop, using the
source location of the loop's header. There are currently two reasons
for removing the loop: invariant loop or loop that never executes.

Differential Revision: https://reviews.llvm.org/D83113
2020-07-03 15:20:23 -07:00
Lei Huang
dae9803e4d [PowerPC][NFC] Fix indentation 2020-07-03 16:47:24 -05:00
Roman Lebedev
0323c88a8c [NFCI][LoopUnroll] s/%tmp/%i/ in one test to silence update script warning 2020-07-04 00:39:36 +03:00
Roman Lebedev
058b361fcd [NFCI][InstCombine] shift.ll: s/%tmp/%i/ to silence update script warning 2020-07-04 00:39:35 +03:00
Sanjay Patel
ebbfd34554 [x86] improve codegen for bit-masked vector compare and select (PR46531)
We canonicalize patterns like:
  %s = lshr i32 %a0, 1
  %t = trunc i32 %s to i1

to:
  %a = and i32 %a0, 2
  %c = icmp ne i32 %a, 0

...in IR, but the bit-shifting original sequence may be better for x86 vector codegen.

I tried several variants of the transform, and it's tricky to not induce regressions.
In particular, I did not find a way to cleanly handle non-splat constants, so I've left
that as a TODO item here (currently negative tests for those are included). AVX512
resulted in some diffs, but didn't look meaningful, so I left that out too. Some of
the 256-bit AVX1 diffs are questionable, but close enough that they are probably
insignificant.

Differential Revision: https://reviews.llvm.org/D83073.
2020-07-03 17:31:57 -04:00
Sanjay Patel
b8aec41344 [InstCombine] fold mul of sext bools to 'and'
Alive2:
  define i32 @src(i1 %x, i1 %y) {
  %0:
  %zx = sext i1 %x to i32
  %zy = sext i1 %y to i32
  %r = mul i32 %zx, %zy
  ret i32 %r
  }
  =>
  define i32 @tgt(i1 %x, i1 %y) {
  %0:
  %a = and i1 %x, %y
  %r = zext i1 %a to i32
  ret i32 %r
  }
  Transformation seems to be correct!

https://alive2.llvm.org/ce/z/gaPQxA
2020-07-03 17:28:40 -04:00
Sanjay Patel
096dbe8816 [InstCombine] add more tests for mul of bools; NFC 2020-07-03 17:28:22 -04:00
Biplob Mishra
65c4fdc701 [PowerPC] Implement Vector Insert Builtins in LLVM/Clang
Implements vec_insertl() and vec_inserth().

Differential Revision: https://reviews.llvm.org/D82365
2020-07-03 15:30:41 -05:00
Florian Hahn
8e8f17533e [InstCombine] Try to narrow expr if trunc cannot be removed.
Narrowing an input expression of a truncate to a type larger than the
result of the truncate won't allow removing the truncate, but it may
enable further optimizations, e.g. allowing for larger vectorization
factors.

For now this is intentionally limited to integer types only, to avoid
producing new vector ops that might not be suitable for the target.

If we know that the only user is a trunc, we can also be allow more
cases, e.g. also shortening expressions with some additional shifts.

I would appreciate feedback on the best place to do such a narrowing.

This fixes PR43580.

Reviewers: spatel, RKSimon, lebedev.ri, xbolva00

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D82973
2020-07-03 20:22:51 +01:00
Louis Dionne
cfb81822f3 [libc++/libc++abi] Automatically detect whether exceptions are enabled
Instead of detecting it automatically (in libc++) and relying on
_LIBCXXABI_NO_EXCEPTIONS being set explicitly (in libc++abi), always
detect whether exceptions are enabled automatically.

This commit also removes support for specifying -D_LIBCPP_NO_EXCEPTIONS
and -D_LIBCXXABI_NO_EXCEPTIONS explicitly -- those should just be inferred
from using -fno-exceptions (or an equivalent flag).

Allowing both -D_FOO_NO_EXCEPTIONS to be provided explicitly and trying
to detect it automatically is just confusing, especially since we did
specify it explicitly when building libc++abi. We should have only one
way to detect whether exceptions are enabled, but it should be robust.
2020-07-03 14:58:09 -04:00
jasonliu
b6227b52f3 [XCOFF][AIX] Use 'L..' instead of '.L' for getPrivateGlobalPrefix in DataLayout
Summary:
D80831 changed part of the prefix usage for AIX.
But there are other places getting prefix from DataLayout.
This patch intends to make prefix usage consistent on AIX.

Reviewed by: hubert.reinterpretcast, daltenty

Differential Revision: https://reviews.llvm.org/D81270
2020-07-03 18:25:14 +00:00
sameerarora101
5aede96ac2 [llvm-ar][test] Unsupport error-opening-directory.test on FreeBSD
Differential Revision: https://reviews.llvm.org/D82786
2020-07-03 10:57:32 -07:00
Sanjay Patel
c2e1e6fe21 [InstCombine] fold mul of zext bools to 'and'
The base case only works because we are relying on a
poison-unsafe select transform; if that is fixed, we
would regress on patterns like this.

The extra use tests show that the select transform can't
be applied consistently. So it may be a regression to have
an extra instruction on 1 test, but that result was not
created safely and does not happen reliably.
2020-07-03 13:14:18 -04:00
Sanjay Patel
284b98d7b8 [InstCombine] add tests for mul of bools; NFC 2020-07-03 13:14:18 -04:00
Roman Lebedev
baaae86236 [NFC][InstCombine] Add some more tests for select based on non-canonical bit-test 2020-07-03 20:12:46 +03:00
Nikita Popov
25ae554289 [InstSimplify] Fold icmp with dominating assume
If we assume(x > y), then we should be able to fold the basic
implications of that, like x >= y. This already happens if either
one of the operands is constant (LVI) or if the conditions are
exactly the same (GVN), but not if we have an implication with
non-constant operands. Support this by querying AssumptionCache.

Fixes https://bugs.llvm.org/show_bug.cgi?id=40149.

Differential Revision: https://reviews.llvm.org/D82717
2020-07-03 18:53:58 +02:00