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Commit Graph

60695 Commits

Author SHA1 Message Date
Rafael Espindola
bd4b8ff8f1 Use $ORIGIN in the rpath of libraries.
llvm-svn: 103896
2010-05-16 03:05:14 +00:00
Dale Johannesen
82dfdcdde7 Fix uint64->{float, double} conversion to do rounding correctly in 32-bit.
The implementation in LegalizeIntegerTypes to handle this as 
sint64->float + appropriate power of 2 is subject to double rounding,
considered incorrect by numerics people.  Use this implementation only
when it is safe.  This leads to using library calls in some cases
that produced inline code before, but it's correct now.
(EVTToAPFloatSemantics belongs somewhere else, any suggestions?)

Add a correctly rounding (though not particularly fast) conversion
that uses X87 80-bit computations for x86-32.

7885399, 5901940.  This shows up in gcc.c-torture/execute/ieee/rbug.c
in the gcc testsuite on some platforms.

llvm-svn: 103883
2010-05-15 18:51:12 +00:00
Dale Johannesen
d093363ea5 Improve assertion messages.
llvm-svn: 103882
2010-05-15 18:38:02 +00:00
Anton Korobeynikov
314ccc5501 Some cheap DAG combine goodness for multiplication with a particular constant.
This can be extended later on to handle more "complex" constants.

llvm-svn: 103881
2010-05-15 18:16:59 +00:00
Anton Korobeynikov
4f8b48d8c6 "trap" pseudo-op turned out to be apple-local.
Temporary emit it as raw bytes until it will be added to binutils as well.

llvm-svn: 103878
2010-05-15 17:19:20 +00:00
Chris Lattner
a1f4042939 improve portability to systems that don't have round, patch by
Evzen Muller!

llvm-svn: 103877
2010-05-15 17:11:55 +00:00
Chris Lattner
6e63336eb4 improve portability to systems that don't have powf/modf (e.g. solaris 9)
patch by Evzen Muller!

llvm-svn: 103876
2010-05-15 17:10:24 +00:00
Chandler Carruth
8aee521671 Fix an GCC warning that seems to have actually caught a bug (!!!) in
a condition's grouping. Every other use of Allocatable.test(Hint) groups it the
same way as it is indented, so move the parentheses to agree with that
grouping.

llvm-svn: 103869
2010-05-15 10:23:23 +00:00
Evan Cheng
9301a88cbb Model 128-bit vld lane with REG_SEQUENCE.
llvm-svn: 103868
2010-05-15 07:53:37 +00:00
Jakob Stoklund Olesen
671a452627 Calculate liveness on the fly for local registers.
When working top-down in a basic block, substituting physregs for virtregs, the use-def chains are kept up to date. That means we can recognize a virtreg kill by the use-def chain becoming empty.

This makes the fast allocator independent of incoming kill flags.

llvm-svn: 103866
2010-05-15 06:09:08 +00:00
Nick Lewycky
9c2a75e5e3 Teach the always inliner to release its inline cost estimates, like the basic
inliner did in r103653. Why does the always inliner even bother with cost
estimates anyways?

llvm-svn: 103858
2010-05-15 04:26:25 +00:00
Nick Lewycky
f9d7cb5fb2 Clean up, no functional change.
llvm-svn: 103857
2010-05-15 03:41:58 +00:00
Jakob Stoklund Olesen
420d93c484 Add reg_nodbg_iterator
llvm-svn: 103856
2010-05-15 02:52:58 +00:00
Evan Cheng
16f27a70ef v4i64 and v8i64 are only synthesizable when NEON is available.
llvm-svn: 103855
2010-05-15 02:20:21 +00:00
Evan Cheng
85497bd415 Allow TargetLowering::getRegClassFor() to be called on illegal types. Also
allow target to override it in order to map register classes to illegal
but synthesizable types. e.g. v4i64, v8i64 for ARM / NEON.

llvm-svn: 103854
2010-05-15 02:18:07 +00:00
Evan Cheng
db2c1543c8 Model 64-bit lane vld with REG_SEQUENCE.
llvm-svn: 103851
2010-05-15 01:36:29 +00:00
Evan Cheng
d95a4505dc A partial re-def instruction may be a copy.
llvm-svn: 103850
2010-05-15 01:35:44 +00:00
Evan Cheng
0a651c3314 Teach two-address pass to do some coalescing while eliminating REG_SEQUENCE
instructions.

e.g.
%reg1026<def> = VLDMQ %reg1025<kill>, 260, pred:14, pred:%reg0
%reg1027<def> = EXTRACT_SUBREG %reg1026, 6
%reg1028<def> = EXTRACT_SUBREG %reg1026<kill>, 5
...
%reg1029<def> = REG_SEQUENCE %reg1028<kill>, 5, %reg1027<kill>, 6, %reg1028, 7, %reg1027, 8, %reg1028, 9, %reg1027, 10, %reg1030<kill>, 11, %reg1032<kill>, 12

After REG_SEQUENCE is eliminated, we are left with:

%reg1026<def> = VLDMQ %reg1025<kill>, 260, pred:14, pred:%reg0
%reg1029:6<def> = EXTRACT_SUBREG %reg1026, 6
%reg1029:5<def> = EXTRACT_SUBREG %reg1026<kill>, 5

The regular coalescer will not be able to coalesce reg1026 and reg1029 because it doesn't
know how to combine sub-register indices 5 and 6. Now 2-address pass will consult the
target whether sub-registers 5 and 6 of reg1026 can be combined to into a larger
sub-register (or combined to be reg1026 itself as is the case here). If it is possible, 
it will be able to replace references of reg1026 with reg1029 + the larger sub-register
index.

llvm-svn: 103835
2010-05-14 23:21:14 +00:00
Dan Gohman
2859ef1a1b Add some comments about undef.
llvm-svn: 103834
2010-05-14 23:01:02 +00:00
Evan Cheng
ba77bacf48 Model VST*_UPD and VST*oddUPD pair with REG_SEQUENCE.
llvm-svn: 103833
2010-05-14 22:54:52 +00:00
Dan Gohman
4049434a04 Fast ISel trivially coalesces away no-op casts, so check for this when
setting kill flags.

llvm-svn: 103832
2010-05-14 22:53:18 +00:00
Jakob Stoklund Olesen
7a16481068 Don't bother spilling before a return
llvm-svn: 103831
2010-05-14 22:40:43 +00:00
Jakob Stoklund Olesen
ed0d357e27 RegAllocLocal can count copies too
llvm-svn: 103830
2010-05-14 22:40:40 +00:00
Bill Wendling
5fde821884 SystemZ really does mean "has calls" and not just "adjusts stack." Go ahead and
replace the check with the appropriate predicate. Modify the testcase to reflect
the correct code. (It should be saving callee-saved registers on the stack
allocated by the calling fuction.)

llvm-svn: 103829
2010-05-14 22:17:42 +00:00
Jakob Stoklund Olesen
21bd5b7fbb Track allocatable instead of reserved regs, and never take an unallocatable hint.
llvm-svn: 103828
2010-05-14 22:02:56 +00:00
Dan Gohman
97d22ade75 Don't set kill flags for instructions which the scheduler has cloned.
llvm-svn: 103827
2010-05-14 22:01:14 +00:00
Dan Gohman
8a798dcca9 BR is a barrier.
llvm-svn: 103826
2010-05-14 22:00:27 +00:00
Bill Wendling
8a2afec7c1 Several tail call tests apparently rely upon this being "adjusts stack" instead
of "has calls". That's probably wrong, but it needs further
investigation. Revert to the original behavior until this is settled.

llvm-svn: 103824
2010-05-14 21:58:35 +00:00
Jakob Stoklund Olesen
295d11f215 Avoid scanning the long tail of physreg operands on calls
llvm-svn: 103823
2010-05-14 21:55:52 +00:00
Devang Patel
e54dbcd4bf Do not forget to mark prcessed arguments.
llvm-svn: 103822
2010-05-14 21:55:50 +00:00
Jakob Stoklund Olesen
83d4c31c0b Count coalesced copies
llvm-svn: 103821
2010-05-14 21:55:50 +00:00
Jakob Stoklund Olesen
89a21b1cc3 Allow virtreg redefines when verifying for RegAllocFast
llvm-svn: 103820
2010-05-14 21:55:44 +00:00
Bill Wendling
d5fb80cbf4 This should happen if there are no calls, not if it just doesn't adjust the
stack.

llvm-svn: 103813
2010-05-14 21:38:44 +00:00
Bill Wendling
adcbee9547 Revert r103804. The comment is correct.
llvm-svn: 103808
2010-05-14 21:28:24 +00:00
Jim Grosbach
869f73322d Remove trailing whitespace
llvm-svn: 103807
2010-05-14 21:20:46 +00:00
Jim Grosbach
f15a56edfc 80 column and trailing whitespace cleanup
llvm-svn: 103806
2010-05-14 21:19:48 +00:00
Jim Grosbach
7a50cfb682 add cmd line option to leave dbgvalues in during post-RA sceduling. Useful
while debugging what's mishandled about them in the post-RA pass.

llvm-svn: 103805
2010-05-14 21:18:04 +00:00
Bill Wendling
b2c38c02ea Fix comment.
llvm-svn: 103804
2010-05-14 21:17:29 +00:00
Bill Wendling
e346a38ed4 Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what
the variable actually tracks.

N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.

llvm-svn: 103802
2010-05-14 21:14:32 +00:00
Devang Patel
6bbba26bf1 Test case for r103800.
llvm-svn: 103801
2010-05-14 21:04:45 +00:00
Dan Gohman
6517cc1dd9 Lowering of atomic instructions can result in operands being
used more than once. If ISel had put a kill flag on one of them,
it's not valid to transfer the kill flag to each new instance.

llvm-svn: 103799
2010-05-14 21:01:44 +00:00
Devang Patel
2b99c27e47 Add support to preserve type info for the variables that are removed by the optimizer.
llvm-svn: 103798
2010-05-14 21:01:35 +00:00
Jakob Stoklund Olesen
4715605740 When verifying two-address instructions, check the following:
- Kill is implicit when use and def registers are identical.
- Only virtual registers can differ.

Add a -verify-fast-regalloc to run the verifier before the fast allocator.

llvm-svn: 103797
2010-05-14 20:28:32 +00:00
Kevin Enderby
dc13d89540 Fix so "int3" is correctly accepted, added "into" and fixed "int" with an
argument, like "int $4", to not get an Assertion error.

llvm-svn: 103791
2010-05-14 19:16:02 +00:00
Evan Cheng
ab9e0f7315 Model VLD*_UPD and VLD*odd_UPD pair with REG_SEQUENCE.
llvm-svn: 103790
2010-05-14 18:54:59 +00:00
Daniel Dunbar
89a1d9036a MC/Mach-O/x86_64: Darwin's special "signed_N" relocation types should only be
used to replace a normal relocation, not a reference to a GOT entry.

llvm-svn: 103789
2010-05-14 18:53:40 +00:00
Jakob Stoklund Olesen
3eac02b22f Simplify the handling of physreg defs and uses in RegAllocFast.
This adds extra security against using clobbered physregs, and it adds kill
markers to physreg uses.

llvm-svn: 103784
2010-05-14 18:03:25 +00:00
Dan Gohman
dc05cdd475 Set isTerminator on TRAP instructions.
llvm-svn: 103778
2010-05-14 16:46:02 +00:00
Dan Gohman
c0438974b2 Don't use isBarrier for the PowerPC sync instruction. isBarrier is for
control barriers, not memory ordering barriers.

llvm-svn: 103777
2010-05-14 16:42:16 +00:00
Dan Gohman
b0f18b9c6c Add mayLoad and mayStore flags to instructions which missed them.
llvm-svn: 103776
2010-05-14 16:34:55 +00:00