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9353 Commits

Author SHA1 Message Date
Duncan Sands
850748f5de Add include files needed when building with 
gcc 4.4 (due to use of sprintf).

llvm-svn: 60209
 2008-11-28 10:20:03 +00:00
Duncan Sands
7fd4ea5847 Fix build with gcc-4.4: it doesn't like PICStyle 
being both a namespace and a variable name.

llvm-svn: 60208
 2008-11-28 09:29:37 +00:00
Nick Lewycky
f5d5d6026f Also update the README. 
llvm-svn: 60188
 2008-11-27 22:41:45 +00:00
Nick Lewycky
0064d6236e Add a synthetic missed optimization. 
llvm-svn: 60186
 2008-11-27 22:12:22 +00:00
Bill Wendling
4a6eedb51d Comment out code that isn't entirely correct. 
llvm-svn: 60156
 2008-11-27 07:18:35 +00:00
Evan Cheng
7db1955286 Eliminate a compile time warning. 
llvm-svn: 60145
 2008-11-27 02:29:25 +00:00
Evan Cheng
f18016728c On x86 favors folding short immediate into some arithmetic operations (e.g. add, and, xor, etc.) because materializing an immediate in a register is expensive in turns of code size. 
e.g.
movl 4(%esp), %eax
addl $4, %eax

is 2 bytes shorter than

movl $4, %eax
addl 4(%esp), %eax

llvm-svn: 60139
 2008-11-27 00:49:46 +00:00
Bill Wendling
c60a07dbf2 Generate something sensible for an [SU]ADDO op when the overflow/carry flag is 
the conditional for the BRCOND statement. For instance, it will generate:

    addl %eax, %ecx
    jo LOF

instead of

    addl %eax, %ecx
    ; About 10 instructions to compare the signs of LHS, RHS, and sum.
    jl LOF

llvm-svn: 60123
 2008-11-26 22:37:40 +00:00
Evan Cheng
c18e38d19f Cosmetic. 
llvm-svn: 60110
 2008-11-26 18:00:00 +00:00
Sanjiv Gupta
1fa97cc7dd Emit declaration for globals and externs. 
Custom lower AND, OR, XOR bitwise operations.

llvm-svn: 60098
 2008-11-26 10:53:50 +00:00
Dan Gohman
6a589b31f7 Fish kill flag annotations in PUSH instructions. 
llvm-svn: 60095
 2008-11-26 06:39:12 +00:00
Nick Lewycky
65d37a5d9d __fastcall and __stdcall are mingw extensions to gcc for windows. Use the 
__attribute__ notation which is supported on more platforms.

llvm-svn: 60083
 2008-11-26 03:17:27 +00:00
Scott Michel
59013b297c CellSPU: 
(a) Remove conditionally removed code in SelectXAddr. Basically, hope for the
    best that the A-form and D-form address predicates catch everything before
    the code decides to emit a X-form address.
(b) Expand vector store test cases to include the usual suspects.

llvm-svn: 60034
 2008-11-25 17:29:43 +00:00
Scott Michel
cf956c87a7 CellSPU: Relax constraints on when to generate a X-form address, evidently 
they were too tight according to bug 3126.

Fix bug 3126.

llvm-svn: 60006
 2008-11-25 04:03:47 +00:00
Scott Michel
a37c52f255 CellSPU: Fix mnemonic typo in pattern; "shlqbyi" -> "shlqby". 
llvm-svn: 59998
 2008-11-25 00:23:16 +00:00
Bill Wendling
0560ba7668 - Make lowering of "add with overflow" customizable by back-ends. 
- Mark "add with overflow" as having a custom lowering for X86. Give it a null
  lowering representation for now.

llvm-svn: 59971
 2008-11-24 19:21:46 +00:00
Scott Michel
259a64c097 CellSPU: 
(a) Slight rethink on i64 zero/sign/any extend code - use a shuffle to
    directly zero-extend i32 to i64, but use rotates and shifts for
    sign extension. Also ensure unified register consistency.
(b) Add new test harness for i64 operations: i64ops.ll

llvm-svn: 59970
 2008-11-24 18:20:46 +00:00
Scott Michel
c3965308a4 CellSPU: 
(a) Improve the extract element code: there's no need to do gymnastics with
    rotates into the preferred slot if a shuffle will do the same thing.
(b) Rename a couple of SPUISD pseudo-instructions for readability and better
    semantic correspondence.
(c) Fix i64 sign/any/zero extension lowering.

llvm-svn: 59965
 2008-11-24 17:11:17 +00:00
Duncan Sands
9816d42357 If the type legalizer actually legalized anything 
(this doesn't happen that often, since most code
does not use illegal types) then follow it by a
DAG combiner run that is allowed to generate
illegal operations but not illegal types.  I didn't
modify the target combiner code to distinguish like
this between illegal operations and illegal types,
so it will not produce illegal operations as well
as not producing illegal types.

llvm-svn: 59960
 2008-11-24 14:53:14 +00:00
Matthijs Kooijman
73be220b45 Fix comments. 
llvm-svn: 59958
 2008-11-24 11:44:00 +00:00
Evan Cheng
a19ef59d6c Move target independent td files from lib/Target/ to include/llvm/Target so they can be distributed along with the header files. 
llvm-svn: 59953
 2008-11-24 07:34:46 +00:00
Mon P Wang
c9ba9d066e Added missing description for -disable-mmx option. 
llvm-svn: 59929
 2008-11-24 02:10:43 +00:00
Duncan Sands
f9ea1124c9 Rename SetCCResultContents to BooleanContents. In 
practice these booleans are mostly produced by SetCC,
however the concept is more general.

llvm-svn: 59911
 2008-11-23 15:47:28 +00:00
Mon P Wang
0f887d148c Added -disable-mmx using a patch from Preston Gurd. 
llvm-svn: 59901
 2008-11-23 04:37:22 +00:00
Scott Michel
50e49b28f0 CellSPU: Fix bug 3056. Varadic extract_element was not implemented (nor was it 
ever conceived to occur).

llvm-svn: 59891
 2008-11-22 23:50:42 +00:00
Anton Korobeynikov
ba74a11c9b Make a convenient helper for printing offsets. 
llvm-svn: 59872
 2008-11-22 16:15:34 +00:00
Scott Michel
314d705baf CellSPU: 
(a) Fix bgs 3052, 3057
(b) Incorporate Duncan's suggestions re: i1 promotion
(c) Indentation updates.

llvm-svn: 59790
 2008-11-21 02:56:16 +00:00
Scott Michel
4026c8f44a CellSPU: 
(a) Remove moved file (SPUAsmPrinter.cpp) to make svn happy.
(b) Remove truncated stores that will never be used.
(c) Add initial support for __muldi3 as a libcall.

llvm-svn: 59734
 2008-11-20 16:36:33 +00:00
Mon P Wang
76b86c996e Allow XMM2 and XMM3 to be used for non ABI compliant code. 
llvm-svn: 59720
 2008-11-20 07:48:19 +00:00
Scott Michel
c4efcfdcd6 CellSPU: Custom lower truncating stores of i8 to i1 (should not have been 
promote), fix signed conversion of indexed offsets.

llvm-svn: 59707
 2008-11-20 05:01:09 +00:00
Scott Michel
d811d41fe7 CellSPU: Adjust spacing/tabulation 
llvm-svn: 59703
 2008-11-20 04:26:21 +00:00
Evan Cheng
bc91bb7658 Fix a thinko. MO is getOperand(i-1) so we don't have to adjust e. 
llvm-svn: 59696
 2008-11-20 02:25:51 +00:00
Evan Cheng
c8ecb037a2 Eliminate a compile time warning. 
llvm-svn: 59678
 2008-11-19 23:21:33 +00:00
Evan Cheng
b434100baa Eliminate a compile time warning. 
llvm-svn: 59677
 2008-11-19 23:21:11 +00:00
Dan Gohman
f4b2751ee6 Experimental post-pass scheduling support. Post-pass scheduling 
is currently off by default, and can be enabled with
-disable-post-RA-scheduler=false.

This doesn't have a significant impact on most code yet because it doesn't
yet do anything to address anti-dependencies and it doesn't attempt to
disambiguate memory references. Also, several popular targets
don't have pipeline descriptions yet.

The majority of the changes here are splitting the SelectionDAG-specific
code out of ScheduleDAG, so that ScheduleDAG can be moved to
libLLVMCodeGen.a. The interface between ScheduleDAG-using code and
the rest of the scheduling code is somewhat rough and will evolve.

llvm-svn: 59676
 2008-11-19 23:18:57 +00:00
Oscar Fuentes
c4345795b0 CMake: Removed source file from lib/Target/PIC16/CMakeLists.txt. 
llvm-svn: 59655
 2008-11-19 18:42:25 +00:00
Scott Michel
583eadfb46 CellSPU: Do not custom lower i1 stores, rely on type legalization to do the 
right thing and promote the store to i8.

llvm-svn: 59648
 2008-11-19 17:45:08 +00:00
Stuart Hastings
545f47a2cb <rdar://problem/6351057> 
Discourage (allocate last) use of x86_64 R12 and R13 due to their
longer instruction encodings.

llvm-svn: 59644
 2008-11-19 17:19:35 +00:00
Scott Michel
5ca4b5b653 Temporary check-in for Duncan to demonstrate CellSPU store problem. 
llvm-svn: 59637
 2008-11-19 15:24:16 +00:00
Sanjiv Gupta
e9e4de3e54 Forgot to add this in the previous commit. 
llvm-svn: 59623
 2008-11-19 12:12:49 +00:00
Sanjiv Gupta
da17b053d6 Fixed build warnings. 
llvm-svn: 59621
 2008-11-19 11:27:59 +00:00
Sanjiv Gupta
a66f48d8e9 Added a more function PIC16 backend. However to get this working a patch in 
ExpandIntegerOperand (LegalizeIntegerTypes.cpp) is needed which is yet to be reworked and submitted. 

llvm-svn: 59617
 2008-11-19 11:00:54 +00:00
Dan Gohman
e5420a0ae9 Don't set neverHasSideEffects on x86's divide instructions, since 
they trap on divide-by-zero, and this side effect is otherwise
unmodeled.

llvm-svn: 59551
 2008-11-18 21:29:14 +00:00
Dan Gohman
04e99d0f3f Add more const qualifiers. This fixes build breakage from r59540. 
llvm-svn: 59542
 2008-11-18 19:49:32 +00:00
Dale Johannesen
f56b6d64f9 Move some former testcases (low-probability codegen 
optimizations) into this wishlist.

llvm-svn: 59455
 2008-11-17 18:56:34 +00:00
Oscar Fuentes
42942c0bc5 Adds extern "C" ints to the .cpp files that use RegisterTarget, as 
well as 2 files that use "Registrator"s. These are to be used by the
MSVC builds, as the Win32 linker does not include libs that are
otherwise unreferenced, even if global constructors in the lib have
side-effects.

Patch by Scott Graham!

llvm-svn: 59378
 2008-11-15 21:36:30 +00:00
Evan Cheng
7ac8120105 Fix fuitos encoding. 
llvm-svn: 59344
 2008-11-15 00:40:57 +00:00
Evan Cheng
626e85dfc2 Fix MOVrx, MOVsrl_flag, and MOVsra_flag encodings. 
llvm-svn: 59314
 2008-11-14 20:09:11 +00:00
Dale Johannesen
29e1b2e9fd Remove unneeded stuff from GRAD register class. 
llvm-svn: 59311
 2008-11-14 18:10:48 +00:00
Richard Osborne
e30cb5908e [XCore] Remove whitespace in the description used when 
registering XCoreTargetMachine.

llvm-svn: 59308
 2008-11-14 16:19:56 +00:00
Richard Osborne
c2b2d5e6cf [XCore] Fix expansion of 64 bit add/sub. Don't custom expand 
these operations if ladd/lsub are not available on the current
subtarget.

llvm-svn: 59305
 2008-11-14 15:59:19 +00:00
Richard Osborne
8f86bb4d20 Add XCore intrinsics for getid (returns thread id) and bitrev (reverses 
bits in a word).

llvm-svn: 59296
 2008-11-14 10:12:16 +00:00
Evan Cheng
f7c1da41a1 Handle the rest of pseudo instructions. 
llvm-svn: 59275
 2008-11-13 23:36:57 +00:00
Evan Cheng
feb7615798 Lazy compilation callback save / restore VFP registers. 
llvm-svn: 59274
 2008-11-13 23:28:54 +00:00
Dale Johannesen
de9fdff884 Extend InlineAsm::C_Register to allow multiple specific registers 
(actually, code already all worked, only the comment
changed).  Use this to implement 'A' constraint on x86.
Fixes PR 1779.

llvm-svn: 59266
 2008-11-13 21:52:36 +00:00
Evan Cheng
4c8297e12b Don't forget to emit stubs for function GV's emitted in CONSTPOOL_ENTRY's. 
llvm-svn: 59258
 2008-11-13 19:22:28 +00:00
Evan Cheng
997eb67c20 fsub{d|s} encoding bugs. 
llvm-svn: 59234
 2008-11-13 07:59:48 +00:00
Evan Cheng
d67d6c4571 Missed a break statement. 
llvm-svn: 59231
 2008-11-13 07:46:59 +00:00
Evan Cheng
3c0113820b Fix pre- and post-indexed load / store encoding bugs. 
llvm-svn: 59230
 2008-11-13 07:34:59 +00:00
Dan Gohman
229c65c05b Move the code that inserts X87 FP_REG_KILL instructions from a 
special-purpose hook to a new pass. Also, add check to see if any
x87 virtual registers are used, to avoid doing any work in the
common case that no x87 code is needed.

llvm-svn: 59190
 2008-11-12 22:55:05 +00:00
Evan Cheng
4768468ec1 Remove the incorrect assertion. We don't have enough information before relocation to set U bit. 
llvm-svn: 59170
 2008-11-12 21:37:59 +00:00
Evan Cheng
9cb6f40f8f Address mode immediate offset has already been divided by 4. 
llvm-svn: 59117
 2008-11-12 08:21:12 +00:00
Evan Cheng
80d0d5cfa8 Fix a VFP binary arithmetic instruction encoding bug. 
llvm-svn: 59116
 2008-11-12 08:14:21 +00:00
Evan Cheng
a4dc0e304e Fix address mode 3 immediate offset mode encoding. 
llvm-svn: 59109
 2008-11-12 07:34:37 +00:00
Evan Cheng
7fef8cfe75 Consolidate formats; fix FCMPED etc. encodings. 
llvm-svn: 59107
 2008-11-12 07:18:38 +00:00
Evan Cheng
0966883093 Fix VFP conversion instruction encodings. 
llvm-svn: 59104
 2008-11-12 06:41:41 +00:00
Evan Cheng
39d8bf295d Fix encoding of single-precision VFP registers. 
llvm-svn: 59102
 2008-11-12 02:19:38 +00:00
Evan Cheng
cc9323ac73 VFP fld / fst immediate field is multiplied by 4. 
llvm-svn: 59100
 2008-11-12 01:02:24 +00:00
Andrew Lenharth
0e7b77369c This shouldn't be necessary 
llvm-svn: 59090
 2008-11-11 23:19:51 +00:00
Evan Cheng
8b7fefc126 Fix FMDRR encoding. 
llvm-svn: 59088
 2008-11-11 22:46:12 +00:00
Evan Cheng
95bad0db94 Handle floating point constpool_entry's. 
llvm-svn: 59087
 2008-11-11 22:19:31 +00:00
Evan Cheng
35f1477c5a Encode VFP load / store instructions. 
llvm-svn: 59084
 2008-11-11 21:48:44 +00:00
Evan Cheng
91e4ef91c5 Encode VFP conversion instructions. 
llvm-svn: 59074
 2008-11-11 19:40:26 +00:00
Evan Cheng
82b17df2b0 Add a README entry. 
llvm-svn: 59052
 2008-11-11 17:35:52 +00:00
Oscar Fuentes
e4e9531262 CMake: corrected split of Alpha and Sparc AsmPrinters. 
llvm-svn: 59050
 2008-11-11 17:10:13 +00:00
Anton Korobeynikov
fe80f44b35 Separate sparc asmprinter. This should unbreak the native build 
llvm-svn: 59047
 2008-11-11 16:42:57 +00:00
Anton Korobeynikov
e3e227b40b Separate alpha asmprinter. This should unbreak native build. 
llvm-svn: 59046
 2008-11-11 16:42:17 +00:00
Dan Gohman
fd00e20872 The 32-bit displacement field in an x86 address is signed. Arrange for it 
to be sign-extended when it is promoted to 64 bits for intermediate
offset calculations. The offset calculations are done as uint64_t so that
overflow conditions are well defined.

This fixes a problem which is currently hidden by the x86 AsmPrinter but
which was exposed by r58917 (which is temporarily reverted).  See PR3027
for details.

llvm-svn: 59044
 2008-11-11 15:52:29 +00:00
Andrew Lenharth
d096adcb5f fix another libgcc blocker 
llvm-svn: 59026
 2008-11-11 06:06:07 +00:00
Scott Michel
2ab73cf730 Unbreak the buildbot and back out (inadvertant) casting edits in CellSPU 
backend.

llvm-svn: 59018
 2008-11-11 03:06:06 +00:00
Evan Cheng
3c62bb7471 Encode VFP arithmetic instructions. 
llvm-svn: 59016
 2008-11-11 02:11:05 +00:00
Scott Michel
ecc5cc6238 CellSPU: Fix bug 3606, as well as some ongoing work. 
llvm-svn: 59009
 2008-11-10 23:43:06 +00:00
Evan Cheng
bc61b6009b Correct PIC function stub codegen. 
llvm-svn: 59006
 2008-11-10 23:14:47 +00:00
Dan Gohman
b5857c2859 Fix indentation. 
llvm-svn: 59004
 2008-11-10 22:09:58 +00:00
Mon P Wang
6792115592 Added CONVERT_RNDSAT (conversion with rounding and saturation) SDNode to 
support targets that support these conversions. Users should avoid using
this node as the current targets don't generating code for it.

llvm-svn: 59001
 2008-11-10 20:54:11 +00:00
Evan Cheng
080c1a9fac Rename isGVNonLazyPtr to isIndirectSym to reflect how it will be used. 
llvm-svn: 58949
 2008-11-10 01:08:07 +00:00
Anton Korobeynikov
cc2b340d11 Typo fix 
llvm-svn: 58928
 2008-11-09 02:54:13 +00:00
Anton Korobeynikov
a4933e408d Temporary revert my last commit: it seems it's triggering some subtle bug in backend 
and breaks llvm-gcc

llvm-svn: 58926
 2008-11-08 23:05:05 +00:00
Oscar Fuentes
4d83014ea6 CMake: corrected library target name for dependency: LLVMCellSPU -> 
LLVMCellSPUCodeGen.

llvm-svn: 58925
 2008-11-08 21:23:15 +00:00
Oscar Fuentes
a2b285ef48 CMake: Reflected changes on the CellSPU target build. May require a 
clean start.

llvm-svn: 58924
 2008-11-08 20:37:19 +00:00
Oscar Fuentes
486fd29325 Fixed a pasto. 
llvm-svn: 58923
 2008-11-08 20:34:18 +00:00
Scott Michel
4a683f438d CellSPU: Bring SPU's assembly printer more in-line with current LLVM code 
structure. Assembly printer now outputs the correct section for strings.

llvm-svn: 58921
 2008-11-08 18:59:02 +00:00
Anton Korobeynikov
e3b9284fa8 Factor out offset printing code into generic AsmPrinter. 
FIXME: it seems, that most of targets don't support
offsets wrt CPI/GlobalAddress', was it intentional?

llvm-svn: 58917
 2008-11-08 17:21:38 +00:00
Nicolas Geoffray
76100fd4de The Index field of an AttributeWithIndex is of type unsigned, not uint16_t. 
llvm-svn: 58908
 2008-11-08 15:36:01 +00:00
Anton Korobeynikov
3af4269671 StoreInst does not produce any result thus it's useless to create new 
variable for it. This greatly reduces amount of unused variables in
llvm2cpp-generated code

llvm-svn: 58905
 2008-11-08 12:58:07 +00:00
Evan Cheng
e5b6b3f81f Moved InvalidateInstructionCache to ARMJITInfo::emitFunctionStub which knows size of stub. 
llvm-svn: 58899
 2008-11-08 08:16:49 +00:00
Evan Cheng
3d9c134136 Rename startFunctionStub to startGVStub since it's also used for GV non-lazy ptr. 
llvm-svn: 58897
 2008-11-08 08:02:53 +00:00
Evan Cheng
cfa57662d1 Tell ARMJITInfo if codegen relocation is PIC. It changes how function stubs are generated. 
llvm-svn: 58896
 2008-11-08 07:38:22 +00:00
Evan Cheng
f2ebaa6a64 Fix relocation for calls to external symbols. 
llvm-svn: 58893
 2008-11-08 07:22:33 +00:00
Scott Michel
70cc5f61b2 CellSPU: Fix prologue/epilogue emission when function contains calls but 
theframe size is 0; the prologue and epilogue should be emitted in this case.

llvm-svn: 58890
 2008-11-08 05:16:20 +00:00