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Commit Graph

73 Commits

Author SHA1 Message Date
Rafael Espindola
cb9ca86245 Replace PROLOG_LABEL with a new CFI_INSTRUCTION.
The old system was fairly convoluted:
* A temporary label was created.
* A single PROLOG_LABEL was created with it.
* A few MCCFIInstructions were created with the same label.

The semantics were that the cfi instructions were mapped to the PROLOG_LABEL
via the temporary label. The output position was that of the PROLOG_LABEL.
The temporary label itself was used only for doing the mapping.

The new CFI_INSTRUCTION has a 1:1 mapping to MCCFIInstructions and points to
one by holding an index into the CFI instructions of this function.

I did consider removing MMI.getFrameInstructions completelly and having
CFI_INSTRUCTION own a MCCFIInstruction, but MCCFIInstructions have non
trivial constructors and destructors and are somewhat big, so the this setup
is probably better.

The net result is that we don't create temporary labels that are never used.

llvm-svn: 203204
2014-03-07 06:08:31 +00:00
Benjamin Kramer
e4eb1b495f [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.
Remove the old functions.

llvm-svn: 202636
2014-03-02 12:27:27 +00:00
Alp Toker
1c4b33e8e5 Fix known typos
Sweep the codebase for common typos. Includes some changes to visible function
names that were misspelt.

llvm-svn: 200018
2014-01-24 17:20:08 +00:00
Alp Toker
e845f8af67 Correct word hyphenations
This patch tries to avoid unrelated changes other than fixing a few
hyphen-related ambiguities and contractions in nearby lines.

llvm-svn: 196471
2013-12-05 05:44:44 +00:00
Juergen Ributzka
5357a6d64b [weak vtables] Remove a bunch of weak vtables
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file. The memory leaks in this version have been fixed. Thanks
Alexey for pointing them out.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

llvm-svn: 195064
2013-11-19 00:57:56 +00:00
Alexey Samsonov
3bfef6bdb6 Revert r194865 and r194874.
This change is incorrect. If you delete virtual destructor of both a base class
and a subclass, then the following code:
  Base *foo = new Child();
  delete foo;
will not cause the destructor for members of Child class. As a result, I observe
plently of memory leaks. Notable examples I investigated are:
ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl.

llvm-svn: 194997
2013-11-18 09:31:53 +00:00
Juergen Ributzka
ee3af15269 [weak vtables] Remove a bunch of weak vtables
This patch removes most of the trivial cases of weak vtables by pinning them to
a single object file.

Differential Revision: http://llvm-reviews.chandlerc.com/D2068

Reviewed by Andy

llvm-svn: 194865
2013-11-15 22:34:48 +00:00
David Blaikie
813e6b3974 DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs
Frame index handling is now target-agnostic, so delete the target hooks
for creation & asm printing of target-specific addressing in DBG_VALUEs
and any related functions.

llvm-svn: 184067
2013-06-16 20:34:27 +00:00
Bill Wendling
df29381d34 Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.

llvm-svn: 183490
2013-06-07 06:19:56 +00:00
Jyotsna Verma
f20d85d4ad Hexagon: Fix switch statements in GetDotOldOp and IsNewifyStore.
No functionality change.

llvm-svn: 181628
2013-05-10 20:58:11 +00:00
Jyotsna Verma
2dfc0b2d13 Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp.
llvm-svn: 181624
2013-05-10 20:27:34 +00:00
Jyotsna Verma
c849e91c17 Hexagon: Remove switch cases from GetDotNewPredOp and isPostIncrement functions.
No functionality change.

llvm-svn: 181535
2013-05-09 19:16:07 +00:00
Jyotsna Verma
15d448ba0c Hexagon: Use relation map for getMatchingCondBranchOpcode() and
getInvertedPredicatedOpcode() functions instead of switch cases.

llvm-svn: 181530
2013-05-09 18:25:44 +00:00
Jyotsna Verma
0ec07a2dbc Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions.
llvm-svn: 181235
2013-05-06 18:49:23 +00:00
Reid Kleckner
488fd277c1 Fix missing include in Hexagon code for Release+Asserts
llvm-svn: 180983
2013-05-03 00:54:56 +00:00
Jyotsna Verma
08d387d6f8 reverting r180953
llvm-svn: 180964
2013-05-02 22:10:59 +00:00
Jyotsna Verma
cd4db6de1c Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions.
llvm-svn: 180953
2013-05-02 21:21:57 +00:00
Jyotsna Verma
c909ae62a5 Hexagon: Honor __builtin_expect by using branch probabilities.
* lib/Target/Hexagon/HexagonInstrInfo.cpp (GetDotNewPredOp):
  Given a jump opcode return the right pred.new jump opcode with
  a taken vs not-taken hint based on branch probabilities provided
  by the target independent module.
  * lib/Target/Hexagon/HexagonVLIWPacketizer.cpp: Use the above function.
  * lib/Target/Hexagon/HexagonNewValueJump.cpp(getNewvalueJumpOpcode):
  Enhance existing function use branch probabilities like
  HexagonInstrInfo::GetDotNewPredOp but for New Value (GPR) Jumps.

llvm-svn: 180923
2013-05-02 15:39:30 +00:00
Jyotsna Verma
a3587dd6bb Hexagon: Use multiclass for Jump instructions.
llvm-svn: 180885
2013-05-01 21:37:34 +00:00
Jyotsna Verma
d290020e45 Hexagon: Clear isKill flag on the predicate register in
PredicateInstruction function.

llvm-svn: 180884
2013-05-01 21:27:30 +00:00
Jyotsna Verma
624f2e0434 Hexagon: Remove assembler mapped instruction definitions.
llvm-svn: 180133
2013-04-23 19:15:55 +00:00
Jyotsna Verma
20903a7aba Hexagon: Remove duplicate instructions to handle global/immediate values
for absolute/absolute-set addressing modes.

llvm-svn: 180120
2013-04-23 17:11:46 +00:00
Jyotsna Verma
91f1858936 Hexagon: Add emitFrameIndexDebugValue function to emit debug information.
llvm-svn: 178368
2013-03-29 21:09:53 +00:00
Jyotsna Verma
912f8ff9d4 Hexagon: Replace switch-case in isDotNewInst with TSFlags.
llvm-svn: 178281
2013-03-28 19:44:04 +00:00
Jyotsna Verma
fa7dec4e5b Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.
llvm-svn: 177747
2013-03-22 18:41:34 +00:00
Jyotsna Verma
f2d3c71cf4 Hexagon: Removed asserts regarding alignment and offset.
We are warning the user about the alignment, so we should not assert.

llvm-svn: 177103
2013-03-14 19:08:03 +00:00
Jyotsna Verma
ce778f77cd Hexagon: Use MO operand flags to mark constant extended instructions.
llvm-svn: 176500
2013-03-05 18:51:42 +00:00
Jyotsna Verma
359daa8ad9 Hexagon: Add constant extender support framework.
llvm-svn: 176358
2013-03-01 17:37:13 +00:00
Anshuman Dasgupta
a6322b9e0a Hexagon: add support for predicate-GPR copies.
llvm-svn: 175102
2013-02-13 22:56:34 +00:00
Jyotsna Verma
a382dbb48f Hexagon: Use absolute addressing mode loads/stores for global+offset
instead of redefining separate instructions for them.

llvm-svn: 175086
2013-02-13 21:38:46 +00:00
Jyotsna Verma
abd979fd30 Hexagon: Add support to generate predicated absolute addressing mode
instructions.

llvm-svn: 174973
2013-02-12 16:06:23 +00:00
Krzysztof Parzyszek
272abb00e0 Extend Hexagon hardware loop generation to handle various additional cases:
- variety of compare instructions,
- loops with no preheader,
- arbitrary lower and upper bounds.

llvm-svn: 174904
2013-02-11 21:37:55 +00:00
Krzysztof Parzyszek
b814fd5e20 Implement HexagonInstrInfo::analyzeCompare.
llvm-svn: 174901
2013-02-11 20:04:29 +00:00
Jyotsna Verma
460af8cdc9 Replace LDriu*[bhdw]_indexed_V4 instructions with "def Pats".
llvm-svn: 174193
2013-02-01 16:36:16 +00:00
Jyotsna Verma
01c6fabba6 Add indexed load/store instructions for offset validation check.
This patch fixes bug 14902 - http://llvm.org/bugs/show_bug.cgi?id=14902

llvm-svn: 172737
2013-01-17 18:42:37 +00:00
Chandler Carruth
a490793037 Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

llvm-svn: 169131
2012-12-03 16:50:05 +00:00
Jyotsna Verma
7806a44024 Use multiclass for 'transfer' instructions.
llvm-svn: 168929
2012-11-29 19:35:44 +00:00
Jyotsna Verma
5aa884e1c7 Removing some unused instruction definitions from the Hexagon backend.
llvm-svn: 168388
2012-11-20 22:14:23 +00:00
Pranav Bhandarkar
c796c7d713 Use the relationship models infrastructure to add two relations - getPredOpcode
and getPredNewOpcode. The first relates non predicated instructions with their
predicated forms and the second relates predicated instructions with their
predicate-new forms.

Patch by Jyotsna Verma!

llvm-svn: 167243
2012-11-01 19:13:23 +00:00
Kay Tiong Khoo
b631f7fd59 *typo: Cyles changed to Cycles
llvm-svn: 158404
2012-06-13 15:53:04 +00:00
Brendon Cahoon
8b14ad918f Revert 156634 upon request until code improvement changes are made.
llvm-svn: 156775
2012-05-14 19:35:42 +00:00
Benjamin Kramer
19e89a08c9 Hexagon: Initialize TBB to 0.
Found by valgrind.

llvm-svn: 156744
2012-05-13 15:13:22 +00:00
Sirish Pande
086c13aed8 Make sure new value jump is enabled for Hexagon V5 as well.
llvm-svn: 156700
2012-05-12 05:54:15 +00:00
Sirish Pande
2eadb696a5 Support for Hexagon feature, New Value Jump.
llvm-svn: 156698
2012-05-12 05:10:30 +00:00
Brendon Cahoon
90dddafa44 Hexagon constant extender support.
Patch by Jyotsna Verma.

llvm-svn: 156634
2012-05-11 19:56:59 +00:00
Sirish Pande
7fbfe4a1d6 Hexagon V5 FP Support.
llvm-svn: 156568
2012-05-10 20:20:25 +00:00
Sirish Pande
253d16b1b0 Support for target dependent Hexagon VLIW packetizer.
This patch creates and optimizes packets as per Hexagon ISA rules.

llvm-svn: 156109
2012-05-03 21:52:53 +00:00
Sirish Pande
450a68c937 Extensions of Hexagon V4 instructions.
This adds new instructions for Hexagon V4 architecture.

llvm-svn: 156071
2012-05-03 16:18:50 +00:00
Chandler Carruth
9460759e4f Revert r155365, r155366, and r155367. All three of these have regression
test suite failures. The failures occur at each stage, and only get
worse, so I'm reverting all of them.

Please resubmit these patches, one at a time, after verifying that the
regression test suite passes. Never submit a patch without running the
regression test suite.

llvm-svn: 155372
2012-04-23 18:25:57 +00:00
Sirish Pande
9f4844f7da Hexagon V5 (floating point) support.
llvm-svn: 155367
2012-04-23 17:49:40 +00:00