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Commit Graph

82 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
b94d989634 Better diagnostics when inline asm fails to allocate.
asm.c:2:7: error: ran out of registers during register allocation
  asm(""::"r"(0), "r"(1), "r"(2), "r"(3), "r"(4), "r"(5), "r"(6), "r"(7), "r"(8), "r"(9));
        ^

llvm-svn: 134310
2011-07-02 07:17:37 +00:00
Evan Cheng
4a169be530 - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.

llvm-svn: 134021
2011-06-28 19:10:37 +00:00
Jakob Stoklund Olesen
be778cece1 Print registers by name instead of by number.
llvm-svn: 134013
2011-06-28 17:24:32 +00:00
Devang Patel
8b96f42a1e After register is spilled there should not be any DBG_VALUE referring the same register.
llvm-svn: 133569
2011-06-21 23:02:36 +00:00
Devang Patel
42bd3da91f There could be more than one DBG_VALUE instructions for variables where all of them have offset based on one register.
llvm-svn: 133560
2011-06-21 22:36:03 +00:00
Jakob Stoklund Olesen
2cac2ea7a1 Be less aggressive about hinting in RAFast.
In particular, don't spill dirty registers only to satisfy a hint. It is
not worth it.

The attached test case provides an example where the fast allocator
would spill a register when other registers are available.

llvm-svn: 132900
2011-06-13 03:26:46 +00:00
Jakob Stoklund Olesen
9037bbb219 Avoid calling TRI->getAllocatableSet in RAFast.
When compiling a program with lots of small functions like
483.xalancbmk, this makes RAFast 11% faster.

Add some comments to clarify the difference between unallocatable and
reserved registers. It's quite subtle.

The fast register allocator depends on EFLAGS' not being allocatable on
x86. That way it can completely avoid tracking liveness, and it won't
mind when there are multiple uses of a single def.

llvm-svn: 132514
2011-06-02 23:41:40 +00:00
Jakob Stoklund Olesen
b5392437c8 Use RegisterClassInfo::getOrder in RAFast.
This saves two virtual function calls and an Allocatable BitVector test,
making RAFast run 2% faster.

llvm-svn: 132471
2011-06-02 18:35:30 +00:00
Evan Cheng
1f353e2438 Typo
llvm-svn: 129970
2011-04-22 01:40:20 +00:00
Eric Christopher
e1103d0a86 Fix a bug where we were counting the alias sets as completely used
registers for fast allocation a different way. This has us updating
used registers only when we're using that exact register.

Fixes rdar://9207598

llvm-svn: 129711
2011-04-18 19:26:25 +00:00
Eric Christopher
147cad907a Temporarily revert r129408 to see if it brings the bots back.
llvm-svn: 129417
2011-04-13 00:20:59 +00:00
Eric Christopher
c72bd6024f Fix a bug where we were counting the alias sets as completely used
registers for fast allocation.

Fixes rdar://9207598

llvm-svn: 129408
2011-04-12 23:23:14 +00:00
Eric Christopher
553418ccd4 Add more comments... err debug statements to the fast allocator.
llvm-svn: 129400
2011-04-12 22:17:44 +00:00
Eric Christopher
72a09952de Fix typo.
llvm-svn: 129334
2011-04-12 00:48:08 +00:00
Nick Lewycky
a4f2b5a934 Mark that the return is using EAX so that we don't use it for some other
purpose. Fixes PR9080!

llvm-svn: 124903
2011-02-04 22:44:08 +00:00
Jakob Stoklund Olesen
32f1783ca1 Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.
These functions not longer assert when passed 0, but simply return false instead.

No functional change intended.

llvm-svn: 123155
2011-01-10 02:58:51 +00:00
Jakob Stoklund Olesen
785d31a2d2 Remove MachineRegisterInfo::getLastVirtReg(), it was giving wrong results
when no virtual registers have been allocated.

It was only used to resize IndexedMaps, so provide an IndexedMap::resize()
method such that

 Map.grow(MRI.getLastVirtReg());

can be replaced with the simpler

 Map.resize(MRI.getNumVirtRegs());

This works correctly when no virtuals are allocated, and it bypasses the to/from
index conversions.

llvm-svn: 123130
2011-01-09 21:58:20 +00:00
Jakob Stoklund Olesen
ed53ab1635 Replace TargetRegisterInfo::printReg with a PrintReg class that also works without a TRI instance.
Print virtual registers numbered from 0 instead of the arbitrary
FirstVirtualRegister. The first virtual register is printed as %vreg0.
TRI::NoRegister is printed as %noreg.

llvm-svn: 123107
2011-01-09 03:05:53 +00:00
Eric Christopher
77d3a7b3fb Fix comment.
llvm-svn: 121285
2010-12-08 21:35:09 +00:00
Owen Anderson
46990c17f7 Get rid of static constructors for pass registration. Instead, every pass exposes an initializeMyPassFunction(), which
must be called in the pass's constructor.  This function uses static dependency declarations to recursively initialize
the pass's dependencies.

Clients that only create passes through the createFooPass() APIs will require no changes.  Clients that want to use the
CommandLine options for passes will need to manually call the appropriate initialization functions in PassInitialization.h
before parsing commandline arguments.

I have tested this with all standard configurations of clang and llvm-gcc on Darwin.  It is possible that there are problems
with the static dependencies that will only be visible with non-standard options.  If you encounter any crash in pass
registration/creation, please send the testcase to me directly.

llvm-svn: 116820
2010-10-19 17:21:58 +00:00
Devang Patel
346f59b31c Add DEBUG message.
llvm-svn: 113614
2010-09-10 20:32:09 +00:00
Jim Grosbach
f61aac8c15 previous patch was a little too tricky for its own good. Don't try to
overload UserInInstr. Explicitly check Allocatable. The early exit in the
condition will mean the performance impact of the extra test should be
minimal.

llvm-svn: 113016
2010-09-03 21:45:15 +00:00
Jim Grosbach
4672574f24 The register allocator shouldn't consider allocating reserved registers.
llvm-svn: 112728
2010-09-01 19:28:41 +00:00
Jim Grosbach
f727f525cd tidy up a few 80-column and trailing whitespace bits.
llvm-svn: 112726
2010-09-01 19:16:29 +00:00
Jakob Stoklund Olesen
d76e5132e7 Ignore unallocatable registers in RegAllocFast.
llvm-svn: 112632
2010-08-31 19:54:25 +00:00
Eli Friedman
64c0b96dd3 Delete dead comment.
llvm-svn: 111744
2010-08-21 20:19:51 +00:00
Owen Anderson
f2fea95f2f Reapply r110396, with fixes to appease the Linux buildbot gods.
llvm-svn: 110460
2010-08-06 18:33:48 +00:00
Devang Patel
14cb55ddfe While emitting DBG_VALUE for registers spilled at the end of a block do not use location of MBB->end(). If a block does not have terminator then incoming iterator points to end().
llvm-svn: 110411
2010-08-06 00:26:18 +00:00
Owen Anderson
aadd8a89ca Revert r110396 to fix buildbots.
llvm-svn: 110410
2010-08-06 00:23:35 +00:00
Owen Anderson
b9762c07cb Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static
ID member as the sole unique type identifier.  Clean up APIs related to this change.

llvm-svn: 110396
2010-08-05 23:42:04 +00:00
Devang Patel
cd5912c7bf While spilling live registers at the end of block check whether they are used by DBG_VALUE machine instructions or not. If a spilled register is used by DBG_VALUE machine instruction then insert a new DBG_VALUE machine instruction to encode variable's new location on stack.
llvm-svn: 110235
2010-08-04 18:42:02 +00:00
Jakob Stoklund Olesen
7f337a8e64 Fix a bug in the -regalloc=fast handling of exotic two-address instruction with
multiple defs, like t2LDRSB_POST.

The first def could accidentally steal the physreg that the second, tied def was
required to be allocated to.

Now, the tied use-def is treated more like an early clobber, and the physreg is
reserved before allocating the other defs.

This would never be a problem when the tied def was the only def which is the
usual case.

This fixes MallocBench/gs for thumb2 -O0.

llvm-svn: 109715
2010-07-29 00:52:19 +00:00
Devang Patel
3b57155acd Fix memory leak reported by valgrind.
Do not visit operands of old instruction. Visit all operands of new instruction.

llvm-svn: 108767
2010-07-19 23:25:39 +00:00
Jakob Stoklund Olesen
bcee53a2b8 Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway.
TII::isMoveInstr is going tobe completely removed.

llvm-svn: 108507
2010-07-16 04:45:42 +00:00
Devang Patel
118d642573 Update DBG_VALUE to refer appropriate stack slot in case of a spill.
llvm-svn: 108023
2010-07-09 21:48:31 +00:00
Jakob Stoklund Olesen
dba28ee3d8 Detect and handle COPY in many places.
This code is transitional, it will soon be possible to eliminate
isExtractSubreg, isInsertSubreg, and isMoveInstr in most places.

llvm-svn: 107547
2010-07-03 00:04:37 +00:00
Jakob Stoklund Olesen
fff50dd31d Fix the handling of partial redefines in the fast register allocator.
A partial redefine needs to be treated like a tied operand, and the register
must be reloaded while processing use operands.

This fixes a bug where partially redefined registers were processed as normal
defs with a reload added. The reload could clobber another use operand if it was
a kill that allowed register reuse.

llvm-svn: 107193
2010-06-29 19:15:30 +00:00
Jakob Stoklund Olesen
2ec7bf335a Add more special treatment for inline asm in RegAllocFast.
When an instruction has tied operands and physreg defines, we must take extra
care that the tied operands conflict with neither physreg defs nor uses.

The special treatment is given to inline asm and instructions with tied operands
/ early clobbers and physreg defines.

This fixes PR7509.

llvm-svn: 107043
2010-06-28 18:34:34 +00:00
Jakob Stoklund Olesen
88e1f2b2b5 Avoid processing early clobbers twice in RegAllocFast.
Early clobbers defining a virtual register were first alocated to a physreg and
then processed as a physreg EC, spilling the virtreg.

This fixes PR7382.

llvm-svn: 105998
2010-06-15 16:20:57 +00:00
Jakob Stoklund Olesen
90af6a44c3 Keep track of the call instructions whose clobber lists were skipped during fast
register allocation.

Process all of the clobber lists at the end of the function, marking the
registers as used in MachineRegisterInfo.

This is necessary in case the calls clobber callee-saved registers (sic).

llvm-svn: 105473
2010-06-04 18:08:29 +00:00
Jakob Stoklund Olesen
f41b1697fe Add support for partial redefs to the fast register allocator.
A partial redef now triggers a reload if required. Also don't add
<imp-def,dead> operands for physical superregisters.

Kill flags are still treated as full register kills, and <imp-use,kill> operands
are added for physical superregisters as before.

llvm-svn: 104167
2010-05-19 21:36:05 +00:00
Jakob Stoklund Olesen
1d0a54cb9d Properly handle multiple definitions of a virtual register in the same
instruction.

This can happen on ARM:

>> %reg1035:5<def>, %reg1035:6<def> = VLD1q16 %reg1028, 0, pred:14, pred:%reg0
Regs: Q0=%reg1032* R0=%reg1028* R1=%reg1029* R2 R3=%reg1031*
Killing last use: %reg1028
Allocating %reg1035 from QPR
Assigning %reg1035 to Q1
<< %D2<def>, %D3<def> = VLD1q16 %R0<kill>, 0, pred:14, pred:%reg0, %Q1<imp-def>

llvm-svn: 104056
2010-05-18 21:10:50 +00:00
Jakob Stoklund Olesen
7182505241 Pull the UsedInInstr.test() calls into calcSpillCost() and remember aliases.
This fixes the miscompilations of MultiSource/Applications/JM/l{en,de}cod.
Clang now successfully self hosts in a debug build with the fast register allocator.

llvm-svn: 103975
2010-05-17 21:02:08 +00:00
Jakob Stoklund Olesen
7fdbac6a38 Remove debug option. Add comment on spill order determinism.
llvm-svn: 103961
2010-05-17 20:01:22 +00:00
Jakob Stoklund Olesen
c07fd51d56 Avoid allocating the same physreg to multiple virtregs in one instruction.
While that approach works wonders for register pressure, it tends to break
everything.

This should unbreak the arm-linux builder and fix a number of miscompilations.

llvm-svn: 103946
2010-05-17 17:18:59 +00:00
Jakob Stoklund Olesen
c97d3f5b78 Minor optimizations. DenseMap::begin() is surprisingly slow on an empty map.
llvm-svn: 103940
2010-05-17 15:30:37 +00:00
Jakob Stoklund Olesen
a9f77dbb8f Extract spill cost calculation to a new method, and use definePhysReg() to clear
out aliases when allocating. Clean up allocVirtReg().

Use calcSpillCost() to allow more aggressive hinting. Now the hint is always
taken unless blocked by a reserved register. This leads to more coalescing,
lower register pressure, and less spilling.

llvm-svn: 103939
2010-05-17 15:30:32 +00:00
Jakob Stoklund Olesen
40545bf117 Only use clairvoyance when defining a register, and then only if it has one use.
This makes allocation independent on the ordering of use-def chains.

llvm-svn: 103935
2010-05-17 04:50:57 +00:00
Jakob Stoklund Olesen
f7bef21e58 Eliminate a hash table probe when killing virtual registers.
llvm-svn: 103934
2010-05-17 03:26:09 +00:00
Jakob Stoklund Olesen
ab401cc7c3 Execute virtreg kills immediately instead of after processing all uses.
This is safe to do because the physreg has been marked UsedInInstr and the kill flag will be set on the last operand using the virtreg if there are more then one.

llvm-svn: 103933
2010-05-17 03:26:06 +00:00