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Commit Graph

232 Commits

Author SHA1 Message Date
Owen Anderson
69cbf2e8b7 Now with fewer extraneous semicolons!
llvm-svn: 115996
2010-10-07 22:25:06 +00:00
Owen Anderson
f8addbb0a1 Fix batch of converting RegisterPass<> to INTIALIZE_PASS().
llvm-svn: 109045
2010-07-21 22:09:45 +00:00
Jakob Stoklund Olesen
755ba2ee84 Use the right floating point load/store instructions in PPCInstrInfo::foldMemoryOperandImpl().
The PowerPC floating point registers can represent both f32 and f64 via the
two register classes F4RC and F8RC. F8RC is considered a subclass of F4RC to
allow cross-class coalescing. This coalescing only affects whether registers
are spilled as f32 or f64.

Spill slots must be accessed with load/store instructions corresponding to the
class of the spilled register. PPCInstrInfo::foldMemoryOperandImpl was looking
at the instruction opcode which is wrong.

X86 has similar floating point register classes, but doesn't try to fold
memory operands, so there is no problem there.

llvm-svn: 97262
2010-02-26 21:09:24 +00:00
Dan Gohman
92b6122204 Fix "the the" and similar typos.
llvm-svn: 95781
2010-02-10 16:03:48 +00:00
David Greene
99517775a2 Change errs() to dbgs().
llvm-svn: 92587
2010-01-05 01:25:45 +00:00
David Greene
58e7c6145b Add a bool flag to StackObjects telling whether they reference spill
slots.  The AsmPrinter will use this information to determine whether to
print a spill/reload comment.

Remove default argument values.  It's too easy to pass a wrong argument
value when multiple arguments have default values.  Make everything
explicit to trap bugs early.

Update all targets to adhere to the new interfaces..

llvm-svn: 87022
2009-11-12 20:49:22 +00:00
Lang Hames
deed780bc6 The Indexes Patch.
This introduces a new pass, SlotIndexes, which is responsible for numbering
instructions for register allocation (and other clients). SlotIndexes numbering
is designed to match the existing scheme, so this patch should not cause any
changes in the generated code.

For consistency, and to avoid naming confusion, LiveIndex has been renamed
SlotIndex.

The processImplicitDefs method of the LiveIntervals analysis has been moved
into its own pass so that it can be run prior to SlotIndexes. This was
necessary to match the existing numbering scheme.

llvm-svn: 85979
2009-11-03 23:52:08 +00:00
Evan Cheng
5ab1ccfaee Distinquish stack slots from other stack objects. They (and fixed objects) get FixedStack PseudoSourceValues.
llvm-svn: 84326
2009-10-17 09:20:14 +00:00
Chris Lattner
e22a1d941e remove some uses of llvm/Support/Streams.h
llvm-svn: 79842
2009-08-23 08:43:55 +00:00
Daniel Dunbar
339c88008f Move more to raw_ostream, provide support for writing MachineBasicBlock,
LiveInterval, etc to raw_ostream.

llvm-svn: 76965
2009-07-24 10:36:58 +00:00
Evan Cheng
3219c7fbe5 Part 1.
- Change register allocation hint to a pair of unsigned integers. The hint type is zero (which means prefer the register specified as second part of the pair) or entirely target dependent.
- Allow targets to specify alternative register allocation orders based on allocation hint.

Part 2.
- Use the register allocation hint system to implement more aggressive load / store multiple formation.
- Aggressively form LDRD / STRD. These are formed *before* register allocation. It has to be done this way to shorten live interval of base and offset registers. e.g.
v1025 = LDR v1024, 0
v1026 = LDR v1024, 0
=>
v1025,v1026 = LDRD v1024, 0

If this transformation isn't done before allocation, v1024 will overlap v1025 which means it more difficult to allocate a register pair.

- Even with the register allocation hint, it may not be possible to get the desired allocation. In that case, the post-allocation load / store multiple pass must fix the ldrd / strd instructions. They can either become ldm / stm instructions or back to a pair of ldr / str instructions.

This is work in progress, not yet enabled.

llvm-svn: 73381
2009-06-15 08:28:29 +00:00
Evan Cheng
1607bd1fa9 Move register allocation preference (or hint) from LiveInterval to MachineRegisterInfo. This allows more passes to set them.
llvm-svn: 73346
2009-06-14 20:22:55 +00:00
Evan Cheng
9df9768ee5 Make sure to color with only allocatable registers for the specific register class.
llvm-svn: 70821
2009-05-04 03:30:11 +00:00
Evan Cheng
28aa6c41d1 In some rare cases, the register allocator can spill registers but end up not utilizing registers at all. The fundamental problem is linearscan's backtracking can end up freeing more than one allocated registers. However, reloads and restores might be folded into uses / defs and freed registers might not be used at all.
VirtRegMap keeps track of allocations so it knows what's not used. As a horrible hack, the stack coloring can color spill slots with *free* registers. That is, it replace reload and spills with copies from and to the free register. It unfold instructions that load and store the spill slot and replace them with register using variants.

Not yet enabled. This is part 1. More coming.

llvm-svn: 70787
2009-05-03 18:32:42 +00:00
Bill Wendling
1c40c8c242 Oy! When reverting r68073, I added in experimental code. Sorry...
llvm-svn: 68099
2009-03-31 08:41:31 +00:00
Bill Wendling
4706abded2 Revert r68073. It's causing a failure in the Apple-style builds.
llvm-svn: 68092
2009-03-31 08:26:26 +00:00
Daniel Dunbar
2cdac55ad0 Add newlines at end of file (this can annoy gcov)
llvm-svn: 67000
2009-03-14 01:53:05 +00:00
Owen Anderson
dd7e4f8c43 Convert VirtRegMap to a MachineFunctionPass.
llvm-svn: 66870
2009-03-13 05:55:11 +00:00
Owen Anderson
fb5980b6ab Reorganization: Move the Spiller out of VirtRegMap.cpp into its own files. No (intended) functionality change.
llvm-svn: 66720
2009-03-11 22:31:21 +00:00
Evan Cheng
8b47b553f9 Yet another case where the spiller marked two uses of the same register on the same instruction as kill. This fixes PR3706.
llvm-svn: 66428
2009-03-09 19:00:05 +00:00
Evan Cheng
483ece4d2e If a MI uses the same register more than once, only mark one of them as 'kill'.
llvm-svn: 66363
2009-03-08 03:58:35 +00:00
Evan Cheng
9c3ce7905e Last commit accidentially deleted this code.
llvm-svn: 65679
2009-02-28 06:02:14 +00:00
Evan Cheng
86fc9440db The last commit was overly conservative. It's ok to reuse value that's already marked livein.
llvm-svn: 65498
2009-02-26 03:02:21 +00:00
Evan Cheng
435dbd4665 If an available register falls through to a succ block, unset the last kill. Sorry, it's impossible to reduce a sensible test case. It basically requires the moon and stars to align in order to cause a failure.
llvm-svn: 65497
2009-02-26 02:30:42 +00:00
Evan Cheng
2e0cf05ad2 A couple of places where reused use operands should be marked kill. This is exposed by recent availability fallthrough changes.
llvm-svn: 64745
2009-02-17 06:41:03 +00:00
Bill Wendling
40e4b271af Revert this. It was breaking stuff.
llvm-svn: 64428
2009-02-13 02:16:35 +00:00
Bill Wendling
83b6edd760 Turn off the old way of handling debug information in the code generator. Use
the new way, where all of the information is passed on SDNodes and machine
instructions.

llvm-svn: 64427
2009-02-13 02:01:04 +00:00
Dan Gohman
3c296f6bd0 Adjust the sizes for a few SmallVectors to reflect their usage.
llvm-svn: 64381
2009-02-12 17:29:01 +00:00
Evan Cheng
91c27ec711 It's (currently) not safe to keep certain physical registers live across basic blocks, e.g. x86 fp stack registers.
llvm-svn: 64374
2009-02-12 10:32:17 +00:00
Evan Cheng
04558ecc90 If availability info is kept when fallthrough into a bb, add the available registers to live-in set.
llvm-svn: 64372
2009-02-12 09:43:23 +00:00
Evan Cheng
a34255f910 Remove a bogus assertion. It's possible a live-in available value is used by a previous instruction.
llvm-svn: 64339
2009-02-11 23:41:57 +00:00
Evan Cheng
cfa084930b Implement PR3495: local spiller optimization. The local spiller can now keep availability information over BB boundaries. It visits BB's in depth first order. After visiting a BB if it find a successor which has a single predecessor it visits the successor next without clearing the availability information. This allows the successor to omit reloads or change them into copies.
llvm-svn: 64298
2009-02-11 08:24:21 +00:00
Bill Wendling
e496361cf5 Explicitly pass in debug location information to BuildMI.
llvm-svn: 63599
2009-02-03 02:29:34 +00:00
Evan Cheng
b3c82db63d Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well.
llvm-svn: 62600
2009-01-20 19:12:24 +00:00
Evan Cheng
39d7e00ff9 Fix PR3124: overly strict assert.
llvm-svn: 60392
2008-12-02 02:15:36 +00:00
Evan Cheng
7792ca759d Fix PR2898. Spiller delete a store for reuse before it knows for sure the reuse happened.
Patch by Lang Hames!

llvm-svn: 57720
2008-10-17 20:56:41 +00:00
Evan Cheng
5fe2abfee8 Fix a very subtle spiller bug: UpdateKills should not forget to track defs of aliases.
llvm-svn: 57673
2008-10-17 06:16:07 +00:00
Dan Gohman
9543edc4ef Fix command-line option printing to print two spaces where needed,
instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.

llvm-svn: 57521
2008-10-14 20:25:08 +00:00
Dan Gohman
8b33abdd5b Don't dereference the end() iterator. Thanks to
ENABLE_EXPENSIVE_CHECKS for finding this.

llvm-svn: 57181
2008-10-06 18:00:07 +00:00
Dan Gohman
30c5ce1b7d Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.

llvm-svn: 57006
2008-10-03 15:45:36 +00:00
Evan Cheng
b879f93ba5 Propagate subreg index when promoting a load to a copy.
llvm-svn: 56085
2008-09-11 01:02:12 +00:00
Evan Cheng
474ba35954 Fix PR2664 - spiller GetRegForReload wasn't respecting sub-register indices on machine operands.
llvm-svn: 56065
2008-09-10 20:08:45 +00:00
Evan Cheng
dcce925eb1 Fix an overly strict assertion. Source register of a copy may not be killed, it may be killed by an implicit super-register use.
llvm-svn: 55762
2008-09-04 05:43:55 +00:00
Owen Anderson
c68a43890f Make SimpleSpiller respect subregister indices.
llvm-svn: 54968
2008-08-19 01:05:33 +00:00
Evan Cheng
a07795a0c3 Fix PR2596: out of bound reference.
llvm-svn: 54375
2008-08-05 21:51:46 +00:00
Dan Gohman
e119f3db46 Fix a LocalSpiller leak. This fixes tramp3d-v4.
llvm-svn: 53766
2008-07-18 18:28:56 +00:00
Dan Gohman
cd25487258 Pool-allocation for MachineInstrs, MachineBasicBlocks, and
MachineMemOperands. The pools are owned by MachineFunctions.

This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.

llvm-svn: 53212
2008-07-07 23:14:23 +00:00
Evan Cheng
cba32609d2 Cosmetic.
llvm-svn: 52450
2008-06-18 07:47:28 +00:00
Evan Cheng
93d91a771c Fix read after free found by valgrind.
llvm-svn: 52309
2008-06-16 07:34:17 +00:00
Evan Cheng
2e99c9cbf8 Teach the spiller to commute instructions in order to fold a reload. This hits 410 times on 444.namd and 122 times on 252.eon.
llvm-svn: 52266
2008-06-13 23:58:02 +00:00