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197084 Commits

Author SHA1 Message Date
Michal Paszkowski
71a369861c Revert "Added a new IRCanonicalizer pass."
This reverts commit 14d358537f124a732adad1ec6edf3981dc9baece.
2020-05-23 13:51:43 +02:00
Michal Paszkowski
3e0dd903f1 Revert "[gn build] Port 14d358537f1"
This reverts commit a0c7108b99f834cd7571ae57872116a4ef2682d9.
2020-05-23 13:51:07 +02:00
LLVM GN Syncbot
c534a27833 [gn build] Port 14d358537f1 2020-05-23 11:05:09 +00:00
Michal Paszkowski
bf322ed671 Added a new IRCanonicalizer pass.
Summary:
Added a new IRCanonicalizer pass which aims to transform LLVM modules into
a canonical form by reordering and renaming instructions while preserving the
same semantics. The canonicalizer makes it easier to spot semantic differences
when diffing two modules which have undergone different passes.

Presentation: https://www.youtube.com/watch?v=c9WMijSOEUg

Reviewed by: plotfi

Differential Revision: https://reviews.llvm.org/D66029
2020-05-23 12:45:53 +02:00
Nikita Popov
be31ff3754 [TargetPassConfig] Don't add alias analysis at optnone
When performing codegen at optnone, don't add alias analysis to
the pipeline. We don't need it, but it causes an unnecessary
dominator tree calculation.

I've also moved the module verifier call to the top so that a bunch
of disabled-at-optnone passes group more nicely.

Differential Revision: https://reviews.llvm.org/D80378
2020-05-23 10:35:03 +02:00
Craig Topper
c8f290ffea [Align] Remove operations on MaybeAlign that asserted that it had a defined value.
If the caller needs to reponsible for making sure the MaybeAlign
has a value, then we should just make the caller convert it to an Align
with operator*.

I explicitly deleted the relational comparison operators that
were being inherited from Optional. It's unclear what the meaning
of two MaybeAligns were one is defined and the other isn't
should be. So make the caller reponsible for defining the behavior.

I left the ==/!= operators from Optional. But now that exposed a
weird quirk that ==/!= between Align and MaybeAlign required the
MaybeAlign to be defined. But now we use the operator== from
Optional that takes an Optional and the Value.

Differential Revision: https://reviews.llvm.org/D80455
2020-05-22 21:54:28 -07:00
Fangrui Song
48f882c32b [MC] Drop unneeded std::abs for DW_def_cfa_offset in DarwinX86AsmBackend::generateCompactUnwindEncoding
This clean-up is available after double negation bugs are fixed.
2020-05-22 21:12:47 -07:00
Fangrui Song
db346498ae [MC] Fix double negation of DW_CFA_def_cfa
Negations are incorrectly added in numerous places and the code just happens to work.
Also fix a missed DW_CFA_def_cfa_offset negation in c693b9c321d5a40d012340619674cf790c9ac86c:
ARMAsmBackendDarwin::generateCompactUnwindEncoding
2020-05-22 21:02:53 -07:00
Fangrui Song
85df10d8f5 [MC] Fix double negation of DW_CFA_def_cfa_offset
Negations are incorrectly added in two places and the code works just
because the negations cancel each other.
2020-05-22 20:01:40 -07:00
Tony
886a960f92 [AMDGPU] DWARF Proposal For Heterogeneous Debugging
- Change title to "DWARF Proposal For Heterogeneous Debugging".
2020-05-22 22:29:57 -04:00
Tony
31a2f563ae [AMDGPU] DWARF For Heterogeneous Debugging
- Change title to "DWARF For Heterogeneous Debugging".
- Add "Examples" section that references the AMDGPUUsage DWARF section.
- Make the "References" section a top level section.

Differential Revision: https://reviews.llvm.org/D70523
2020-05-22 22:14:20 -04:00
Fangrui Song
ad1024e5f7 [MC] Change MCCFIInstruction::createDefCfaOffset to cfiDefCfaOffset which does not negate Offset
The negative Offset has caused a bunch of problems and confused quite a
few call sites. Delete the unneeded negation and fix all call sites.
2020-05-22 17:07:11 -07:00
Fangrui Song
985b9e2acb [MC] Change MCCFIInstruction::createDefCfa to cfiDefCfa which does not negate Offset
The negative Offset has caused a bunch of problems and confused quite a
few call sites. Delete the unneeded negation and fix all call sites.
2020-05-22 15:47:26 -07:00
Stephen Neuendorffer
b899bacfbc Reapply "[lit] GoogleTest framework should report failures if test binary crashes"
This reverts commit 78dea0e8fb6cc5c0fae64d65b7f40560cab7b329.

The offending lldb test (which is a real bug exposed by this patch)
has been disabled on windows (see a67b2faa7c4cfbceffb4213f46769c45a5a9291a)
and lldb is queued for inclusion into precommit testing, which would
have caught this.

Differential Revision: https://reviews.llvm.org/D80389
2020-05-22 14:01:08 -07:00
Stanislav Mekhanoshin
fe80ca6cf5 [AMDGPU] Define 6 dword subregs
This prevents autogeneration of degenerate names for these.

Differential Revision: https://reviews.llvm.org/D80451
2020-05-22 13:53:29 -07:00
Sanjay Patel
13a25dc6e3 [VectorCombine] set preserve alias analysis
As noted in D80236, moving the pass in the pipeline exposed this
shortcoming. Extra work to recalculate the alias results showed
up as a compile-time slowdown.
2020-05-22 16:25:16 -04:00
Ahsan Saghir
f0ac57d4ec [PowerPC] Add support for vmsumudm
This patch adds support for Vector Multiply-Sum Unsigned Doubleword Modulo
instruction; vmsumudm.

Differential Revision: https://reviews.llvm.org/D80294
2020-05-22 14:35:13 -05:00
Jean-Michel Gorius
2d66ce0e5e Revert "[CodeGen] Add support for multiple memory operands in MachineInstr::mayAlias"
This temporarily reverts commit 7019cea26dfef5882c96f278c32d0f9c49a5e516.

It seems that, for some targets, there are instructions with a lot of memory operands (probably more than would be expected). This causes a lot of buildbots to timeout and notify failed builds. While investigations are ongoing to find out why this happens, revert the changes.
2020-05-22 21:26:46 +02:00
Florian Hahn
026831af5d [DSE,MSSA] Add additional multiblock tests. 2020-05-22 18:24:43 +01:00
Sanjay Patel
75863edb6f [VectorCombine] position pass after SLP in the optimization pipeline rather than before
There are 2 known problem patterns shown in the test diffs here:
vector horizontal ops (an x86 specialization) and vector reductions.

SLP has greater ability to match and fold those than vector-combine,
so let SLP have first chance at that.

This is a quick fix while we continue to improve vector-combine and
possibly canonicalize to reduction intrinsics.

In the longer term, we should improve matching of these patterns
because if they were created in the "bad" forms shown here, then we
would miss optimizing them.

I'm not sure what is happening with alias analysis on the addsub test.
The old pass manager now shows an extra line for that, and we see an
improvement that comes from SLP vectorizing a store. I don't know
what's missing with the new pass manager to make that happen.
Strangely, I can't reproduce the behavior if I compile from C++ with
clang and invoke the new PM with "-fexperimental-new-pass-manager".

Differential Revision: https://reviews.llvm.org/D80236
2020-05-22 12:22:44 -04:00
Pengxuan Zheng
5674128261 [RISCV] Register null target streamer for RISC-V
Summary:
This fixes two llc crashes with the following tests when RISC-V is the default
target.

LLVM :: DebugInfo/Generic/global.ll
LLVM :: DebugInfo/Generic/inlined-strings.ll

Reviewers: HsiangKai

Reviewed By: HsiangKai

Subscribers: hiraditya, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, lenary, s.egerton, sameer.abuasal, apazos, luismarques, evandro, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80352
2020-05-22 09:18:23 -07:00
Simon Pilgrim
6d0676a479 [CGP] Ensure address offset is representable as int64_t
AddressingModeMatcher::matchAddr was calling getSExtValue for a constant before ensuring that we can actually represent the value as int64_t

Fixes PR46004 / OSSFuzz#22357
2020-05-22 17:00:22 +01:00
Sanjay Patel
56d9dc66a3 [InstCombine] (A + B) + B --> A + (B << 1)
This eliminates a use of 'B', so it can enable follow-on transforms
as well as improve analysis/codegen.

The PhaseOrdering test was added for D61726, and that shows
the limits of instcombine vs. real reassociation. We would
need to run some form of CSE to collapse that further.

The intermediate variable naming here is intentional because
there's a test at llvm/test/Bitcode/value-with-long-name.ll
that would break with the usual nameless value. I'm not sure
how to improve that test to be more robust.

The naming may also be helpful to debug regressions if this
change exposes weaknesses in the reassociation pass for example.
2020-05-22 11:46:59 -04:00
Sanjay Patel
844f86bb66 [InstCombine] add tests for adds with common operand; NFC 2020-05-22 11:46:59 -04:00
Denis Antrushin
0fed823734 [SCEV] Constant fold MultExpr before applying depth limit.
Summary:
Users of SCEV reasonably assume that multiplication of two constant
SCEVs will in turn be constant.
However, that is not always the case:
First, we can get here with reached depth limit, and will create
MultExpr SCEV `C1 * C2` and cache it.
Then, we can get here with the same operands, but with small depth
level. But this time we will find existing MultExpr SCEV and return
it, instead of expected constant SCEV.

This patch changes getMultExpr to not apply depth limit to all constant
operands expression, allowing them to be folded.

Reviewers: reames, mkazantsev

Subscribers: hiraditya, javed.absar, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79893
2020-05-22 18:34:32 +03:00
Xiangling_Liao
54e5f13eee [NFC][AIX] Remove spaces after the comma for '.csect' directive
To be consistent with other directives like '.comm', '.lcomm', we remove
the spaces after the comma for '.csect' on AIX.

Differential Revision: https://reviews.llvm.org/D80247
2020-05-22 11:10:32 -04:00
Matt Arsenault
118f1c92ca AMDGPU/GlobalISel: Fix masked control flow with fallthrough blocks
Unlike SelectionDAGBuilder, IRTranslator omits the unconditional
branch in fallthrough cases. Confusingly, the control flow pseudos
function in the opposite way the intrinsics are used, and the branch
targets always need to be swapped. We're inverting the target blocks,
so we need to figure out the old fallthrough block and insert a branch
to the original unconditional branch target.
2020-05-22 10:31:44 -04:00
Sanjay Patel
d83df96cc7 [PhaseOrdering] regenerate test checks; NFC
Remove some redundant/unnecessary bits too.
2020-05-22 10:10:47 -04:00
Anh Tuyen Tran
9605e01df8 Title: [LV] Handle Fold-Tail of loops with vectorizarion factor equal to 1
Summary:
When handling loops whose VF is 1, fold-tail vectorization sets the
backedge taken count of the original loop with a vector of a single
element. This causes type-mismatch during instruction generartion.

The purpose of this patch is toto address the case of VF==1.

Reviewer: Ayal (Ayal Zaks), bmahjour (Bardia Mahjour), fhahn (Florian Hahn), gilr (Gil Rapaport), rengolin (Renato Golin)

Reviewed By: Ayal (Ayal Zaks), bmahjour (Bardia Mahjour), fhahn (Florian Hahn)

Subscribers: Ayal (Ayal Zaks), rkruppe (Hanna Kruppe), bmahjour (Bardia Mahjour), rogfer01 (Roger Ferrer Ibanez), vkmr (Vineet Kumar), bollu (Siddharth Bhat), hiraditya (Aditya Kumar), llvm-commits (Mailing List llvm-commits)

Tag: LLVM

Differential Revision: https://reviews.llvm.org/D79976
2020-05-22 13:30:56 +00:00
Simon Pilgrim
344aeed6be TargetLowering.h - remove unnecessary includes. NFC.
Replace with forward declarations and move SizeOpts.h down to TargetLoweringBase.cpp
2020-05-22 14:26:27 +01:00
Simon Pilgrim
ab43ee87ac [TargetLowering] Move TargetLoweringBase::isJumpTableRelative() implementation into TargetLoweringBase.cpp. NFC.
This will help with reducing header dependencies in TargetLowering.h in a future patch.
2020-05-22 14:26:27 +01:00
Sanjay Patel
28cc084559 [SLP] fix verification check for valid IR
This is a fix for PR45965 - https://bugs.llvm.org/show_bug.cgi?id=45965 -
which was left out of D80106 because of a test failure.

SLP does its own mini-CSE after potentially creating redundant instructions,
so we need to wait for that to complete before running the verifier.
Otherwise, we will see a test failure for
test/Transforms/SLPVectorizer/X86/crash_vectorizeTree.ll (not changed here)
because a phi temporarily has identical but different incoming values for
the same incoming block.

A related, but independent, test that would have been altered here was
fixed with:
rG880df55

The test was escaping verification in SLP without this change because we
were not running verifyFunction() unless SLP actually changed the IR.

Differential Revision: https://reviews.llvm.org/D80401
2020-05-22 09:15:27 -04:00
Sanjay Patel
e4c5c934ef [SLP] fix test to have valid IR; NFC
This test was failing verification because the
metadata is ill-formed. This commit is split
from D80401 because it is an independent fix
(although the test would break with that change).
2020-05-22 09:06:02 -04:00
Nemanja Ivanovic
b018518e5c [PowerPC] Add missing handling for half precision
The fix for PR39865 took care of some of the handling for half precision
but it missed a number of issues that still exist. This patch fixes the
remaining issues that cause crashes in the PPC back end.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=45776

Differential revision: https://reviews.llvm.org/D79283
2020-05-22 07:50:11 -05:00
Marek Kurdej
5b5d7d8bc7 [CMake] Fix typos. NFC 2020-05-22 14:40:43 +02:00
Marek Kurdej
d0d6be08d8 [Target] Fix typos. NFC 2020-05-22 14:40:43 +02:00
Matt Arsenault
222f337a17 InstCombine: Add constant folding/simplify for amdgcn.ldexp intrinsic
This really belongs in InstructionSimplify since it doesn't introduce
new instructions. Put it in instcombine to avoid increasing the number
of passes considering target intrinsics.

I also noticed that we seem to now be interpreting strictfp attributes
on call sites, so try to handle that.
2020-05-22 08:21:38 -04:00
Jon Roelofs
d0f0991d73 Revert "[llvm][test] Add COM: directives before colon-less non-CHECKs in comments. NFC"
This reverts commit 183d6af081899973f00fc24aeafcfc32de732f02.

Revert pending further consensus building: https://reviews.llvm.org/D79963#2050521
2020-05-22 05:36:15 -06:00
Simon Pilgrim
5e623df3e9 [AVR] Remove unsigned <= 0 checks. NFCI.
D77207 changed the bounds checks resulting in tests for positive unsigned values - dropping the superfluous check to fix gcc+Werror "error: comparison of unsigned expression >= 0 is always true [-Werror=type-limits]" warning.
2020-05-22 12:28:39 +01:00
Dmitry Preobrazhensky
e4b61f917e [AMDGPU][MC][GFX8+] Enabled clamp for v_mul_i32_i24_e64 and v_mul_u32_u24_e64
See bug 45925: https://bugs.llvm.org/show_bug.cgi?id=45925

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D80287
2020-05-22 14:11:31 +03:00
QingShan Zhang
214d7fcde4 [NFC][Test] Add test coverage for fsqrt on PowerPC 2020-05-22 10:59:27 +00:00
Victor Campos
1f4dc2785e Revert "[ARM] Improve codegen of volatile load/store of i64"
This reverts commit 8a12553223180246eeafaa0fa7bfa11e834d34b6.

A bug has been found when generating code for Thumb2. In some very
specific cases, the prologue/epilogue emitter generates erroneous stack
offsets for the new LDRD instructions that access the stack.

This bug does not seem to be caused by the reverted patch though. Likely
the latter has made an undiscovered issue emerge in the
prologue/epilogue emission pass. Nevertheless, this reversion is
necessary since it is blocking users of the ARM backend.
2020-05-22 11:01:57 +01:00
Simon Pilgrim
e6e40f3015 StatepointLowering.h - remove unused includes. NFC. 2020-05-22 10:49:11 +01:00
Simon Pilgrim
103e684408 Fix msvc "switch statement contains 'default' but no 'case' labels" warning. NFC.
Stripped out the switch statement, but kept case labels as comments for future reference.
2020-05-22 10:49:10 +01:00
Simon Pilgrim
7d9d6788ba MILexer.h/cpp - remove unused includes. NFC.
Remove duplicates in MILexer.cpp that are already included in MILexer.h.
2020-05-22 10:49:10 +01:00
Roman Lebedev
fa9cedd479 [NFC] InstCombineNegator: use auto where type is obvious from the cast 2020-05-22 11:14:54 +03:00
Max Kazantsev
23bde48f84 [InstCombine] Sink pure instructions down to return and unreachable blocks
If the only user of `Instr` is in a return or unreachable block, we can
sink `Instr` to the`User` safely (unless it reads/writes memory).
Return or unreachable blocks are guaranteed to execute zero
or one time, and `Instr` always dominates `User`, so they either will
be executed together (execution of `User` always implies execution
of `Instr`) or not executed at all.

Differential Revision: https://reviews.llvm.org/D80120
Reviewed By: asbirlea, jdoerfert
2020-05-22 14:33:42 +07:00
LLVM GN Syncbot
23c2f4acc8 [gn build] Port 2e40cf06df0 2020-05-22 04:58:19 +00:00
Craig Topper
1df7b9f0e6 [X86] Allow avx512vp2intersect to be used with __builtin_cpu_supports.
compiler-rt and trunk libgcc support this now.
2020-05-21 21:54:54 -07:00
Lang Hames
ee91e79e53 [JITLink] Initial implementation of ELF / x86-64 support for JITLink.
This initial implementation supports section and symbol parsing, but no
relocation support. It enables JITLink to link and execute ELF relocatable
objects that do not require relocations.

Patch by Jared Wyles. Thanks Jared!

Differential Revision: https://reviews.llvm.org/D79832
2020-05-21 21:44:00 -07:00