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Commit Graph

179960 Commits

Author SHA1 Message Date
David Bolvansky
72adb13a04 [NFC] Added test from PR42084 for D63058
llvm-svn: 362906
2019-06-09 14:56:46 +00:00
Nikita Popov
6c17587199 [InstCombine] Add tests for usub.sat(x,y)+y etc; NFC
For PR42178.

llvm-svn: 362905
2019-06-09 14:39:47 +00:00
Sanjay Patel
b22b368718 [InstSimplify] reduce code duplication for fcmp folds; NFC
llvm-svn: 362904
2019-06-09 13:58:46 +00:00
Sanjay Patel
1361930fcb [InstSimplify] enhance fcmp fold with never-nan operand
This is another step towards correcting our usage of fast-math-flags when applied on an fcmp.
In this case, we are checking for 'nnan' on the fcmp itself rather than the operand of
the fcmp. But I'm leaving that clause in until we're more confident that we can stop
relying on fcmp's FMF.

By using the more general "isKnownNeverNaN()", we gain a simplification shown on the
tests with 'uitofp' regardless of the FMF on the fcmp (uitofp never produces a NaN).
On the tests with 'fabs', we are now relying on the FMF for the call fabs instruction
in addition to the FMF on the fcmp.

This is a continuation of D62979 / rL362879.

llvm-svn: 362903
2019-06-09 13:48:59 +00:00
Sanjay Patel
132a7dcd28 [InstSimplify] add tests for fcmp with known-never-nan operands; NFC
Opposite predicate for rL362742 / rL362879 / D62979

llvm-svn: 362902
2019-06-09 13:30:14 +00:00
Anton Afanasyev
f14d26089e [MIR] Add simple PRE pass to MachineCSE
This is the second part of the commit fixing PR38917 (hoisting
partitially redundant machine instruction). Most of PRE (partitial
redundancy elimination) and CSE work is done on LLVM IR, but some of
redundancy arises during DAG legalization. Machine CSE is not enough
to deal with it. This simple PRE implementation works a little bit
intricately: it passes before CSE, looking for partitial redundancy
and transforming it to fully redundancy, anticipating that the next
CSE step will eliminate this created redundancy. If CSE doesn't
eliminate this, than created instruction will remain dead and eliminated
later by Remove Dead Machine Instructions pass.

The third part of the commit is supposed to refactor MachineCSE,
to make it more clear and to merge MachinePRE with MachineCSE,
so one need no rely on further Remove Dead pass to clear instrs
not eliminated by CSE.

First step: https://reviews.llvm.org/D54839

Fixes llvm.org/PR38917

This is fixed recommit of r361356 after PowerPC64 multistage build failure.

llvm-svn: 362901
2019-06-09 12:15:47 +00:00
Ayke van Laethem
172706e7f2 [CaptureTracking] Don't let comparisons against null escape inbounds pointers
Pointers that are in-bounds (either through dereferenceable_or_null or
thorough a getelementptr inbounds) cannot be captured with a comparison
against null. There is no way to construct a pointer that is still in
bounds but also NULL.

This helps safe languages that insert null checks before load/store
instructions. Without this patch, almost all pointers would be
considered captured even for simple loads. With this patch, an icmp with
null will not be seen as escaping as long as certain conditions are met.

There was a lot of discussion about this patch. See the Phabricator
thread for detals.

Differential Revision: https://reviews.llvm.org/D60047

llvm-svn: 362900
2019-06-09 10:20:33 +00:00
Ayke van Laethem
7d6b8741a2 [bindings/go] Add wrappers for atomic operations.
This patch adds Go bindings for atomic operations in LLVM.

Differential Revision: https://reviews.llvm.org/D61034

llvm-svn: 362899
2019-06-09 10:06:35 +00:00
Jatin Bhateja
5a376274f5 [X86] NFCI : Comment updation for EVEX to VEX translation.
Reviewers: llvm-commits, jbhateja

Reviewed By: jbhateja

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63055

llvm-svn: 362898
2019-06-09 09:59:26 +00:00
Simon Pilgrim
7d2803248c Use for-range loop. NFCI.
llvm-svn: 362897
2019-06-09 09:07:30 +00:00
Amara Emerson
d1dff45e07 [AArch64][GlobalISel] Select immediate forms of cmp instructions.
A simple re-use of the immediate operand matcher and renderer functions.

rdar://43795178

llvm-svn: 362896
2019-06-09 07:31:25 +00:00
Craig Topper
d284452f0a [X86] Remove (store (f32 (extractelt (v4f32))) isel patterns which is redundant.
We emit a MOVSSmr and a COPY_TO_REGCLASS, but that's what we would get from
selecting the store and extractelt independently.

llvm-svn: 362895
2019-06-09 03:21:33 +00:00
Craig Topper
a4b4a052d7 [X86] Mutate scalar fceil/ffloor/ftrunc/fnearbyint/frint into X86ISD::RNDSCALE during PreProcessIselDAG to cut down on number of isel patterns.
Similar was done for vectors in r362535. Removes about 1200 bytes from the isel table.

llvm-svn: 362894
2019-06-08 23:53:31 +00:00
Ayke van Laethem
4390ba5b81 [bindings/go] Add bindings to LLVMGet?CmpPredicate
Add bindings so that predicates on comparisons (icmp/fcmp) can be
inspected from IR.

Note: I considered adding Value.ICmpPredicate() etc. instead but
Value.IntPredicate() seemed easier to read and matches the name of the
returned type.

(This change was also pushed two commits ago but accidentally had the
wrong title and description.)

Revision: https://reviews.llvm.org/D53884
llvm-svn: 362893
2019-06-08 22:21:37 +00:00
Ayke van Laethem
31cbc86342 Revert "[bindings/go] Add Go bindings for CalledValue"
This reverts commit f675a60ca7a93f22e22dd4209504a9846dd04630.
The commit had the wrong title/description. Sorry about the mess!

llvm-svn: 362892
2019-06-08 22:17:51 +00:00
Ayke van Laethem
bdf7e2e7bd [bindings/go] Add Go bindings for CalledValue
This is very useful for inspecting generated IR, there appears to be no
other way to get the called function from a CallInst.

Differential Revision: https://reviews.llvm.org/D52972

llvm-svn: 362891
2019-06-08 22:15:38 +00:00
Ayke van Laethem
06a69245a1 [bindings/go] Add Go bindings for CalledValue
This is very useful for inspecting generated IR, there appears to be no
other way to get the called function from a CallInst.

Revision: https://reviews.llvm.org/D52972
llvm-svn: 362890
2019-06-08 22:08:52 +00:00
Ayke van Laethem
a1af64264e [bindings/go] Add EraseFromParent
After using ReplaceAllUsesWith on an instruction, it may be necessary to
erase it even though it is dead.

llvm-svn: 362889
2019-06-08 22:00:19 +00:00
Ayke van Laethem
fa896f12c9 [NFC] Test commit
Add a newline, which is missing according to go fmt.

llvm-svn: 362888
2019-06-08 21:42:00 +00:00
Roman Lebedev
801d3ed1c5 [X86][Codegen] Add missed pattern that may be a lea+neg
llvm-svn: 362886
2019-06-08 19:38:14 +00:00
Simon Pilgrim
bc9b63be1d [DAGCombine] visitAND - merge (zext_inreg ((s)extload x)) -> (zextload x) combines. NFCI.
Same codegen, only differ by the oneuse limit for the sextload case.

llvm-svn: 362880
2019-06-08 17:02:00 +00:00
Sanjay Patel
e61275cc46 [InstSimplify] enhance fcmp fold with never-nan operand
This is 1 step towards correcting our usage of fast-math-flags when applied on an fcmp.
In this case, we are checking for 'nnan' on the fcmp itself rather than the operand of
the fcmp. But I'm leaving that clause in until we're more confident that we can stop
relying on fcmp's FMF.

By using the more general "isKnownNeverNaN()", we gain a simplification shown on the
tests with 'uitofp' regardless of the FMF on the fcmp (uitofp never produces a NaN).
On the tests with 'fabs', we are now relying on the FMF for the call fabs instruction
in addition to the FMF on the fcmp.

I'll update the 'ult' case below here as a follow-up assuming no problems here.

Differential Revision: https://reviews.llvm.org/D62979

llvm-svn: 362879
2019-06-08 15:12:33 +00:00
Sylvestre Ledru
168855d61c fix a typo unavaliable=>unavailable
llvm-svn: 362878
2019-06-08 15:07:55 +00:00
David Bolvansky
43d7a48a61 [NFC] Added tests for D63038
llvm-svn: 362875
2019-06-08 12:07:59 +00:00
David Green
09c3fe91e2 [ARM] Adjust isLegalT1AddressImmediate for non-legal types
Types such as float and i64's do not have legal loads in Thumb1, but will still
be loaded with a LDR (or potentially multiple LDR's). As such we can treat the
cost of addressing mode calculations the same as an i32 and get some optimisation
benefits.

Differential Revision: https://reviews.llvm.org/D62968

llvm-svn: 362874
2019-06-08 10:32:53 +00:00
David Green
9b21f6c6fa [ARM] Add MVE addressing to isLegalT2AddressImmediate
Now with MVE being added, we can add the vector addressing mode costs for it.
These are generally imm7 multiplied by the size of the type being loaded /
stored.

Differential Revision: https://reviews.llvm.org/D62967

llvm-svn: 362873
2019-06-08 10:18:23 +00:00
David Green
98901f37bd [ARM] Add fp16 addressing to isLegalT2AddressImmediate
The fp16 version of VLDR takes a imm8 multiplied by 2. This updates the costs
to account for those, and adds extra testing. It is dependant upon hasFPRegs16
as this is what the load/store instructions require.

Differential Revision: https://reviews.llvm.org/D62966

llvm-svn: 362872
2019-06-08 10:09:02 +00:00
David Green
c7795989ed [ARM] Add extra gep costmodel tests for MVE and half float. NFC
llvm-svn: 362871
2019-06-08 09:58:05 +00:00
David Green
5da34ba7c6 [ARM] Add HasNEON for all Neon patterns in ARMInstrNEON.td. NFCI
We are starting to add an entirely separate vector architecture to the ARM
backend. To do that we need at least some separation between the existing NEON
and the new MVE code. This patch just goes through the Neon patterns and
ensures that they are predicated on HasNEON, giving MVE a stable place to start
from.

No tests yet as this is largely an NFC, and we don't have the other target that
will treat any of these intructions as legal.

Differential Revision: https://reviews.llvm.org/D62945

llvm-svn: 362870
2019-06-08 09:36:49 +00:00
Jonas Paulsson
78588c9702 [SystemZ] Fix CMakeLists.txt for alphabetical order (NFC).
llvm-svn: 362869
2019-06-08 06:42:02 +00:00
Jonas Paulsson
0f000465c2 [SystemZ, RegAlloc] Favor 3-address instructions during instruction selection.
This patch aims to reduce spilling and register moves by using the 3-address
versions of instructions per default instead of the 2-address equivalent
ones. It seems that both spilling and register moves are improved noticeably
generally.

Regalloc hints are passed to increase conversions to 2-address instructions
which are done in SystemZShortenInst.cpp (after regalloc).

Since the SystemZ reg/mem instructions are 2-address (dst and lhs regs are
the same), foldMemoryOperandImpl() can no longer trivially fold a spilled
source register since the reg/reg instruction is now 3-address. In order to
remedy this, new 3-address pseudo memory instructions are used to perform the
folding only when the dst and lhs virtual registers are known to be allocated
to the same physreg. In order to not let MachineCopyPropagation run and
change registers on these transformed instructions (making it 3-address), a
new target pass called SystemZPostRewrite.cpp is run just after
VirtRegRewriter, that immediately lowers the pseudo to a target instruction.

If it would have been possibe to insert a COPY instruction and change a
register operand (convert to 2-address) in foldMemoryOperandImpl() while
trusting that the caller (e.g. InlineSpiller) would update/repair the
involved LiveIntervals, the solution involving pseudo instructions would not
have been needed. This is perhaps a potential improvement (see Phabricator
post).

Common code changes:

* A new hook TargetPassConfig::addPostRewrite() is utilized to be able to run a
target pass immediately before MachineCopyPropagation.

* VirtRegMap is passed as an argument to foldMemoryOperand().

Review: Ulrich Weigand, Quentin Colombet
https://reviews.llvm.org/D60888

llvm-svn: 362868
2019-06-08 06:19:15 +00:00
Nico Weber
879d32d933 gn build: Merge r362857
llvm-svn: 362864
2019-06-08 01:27:47 +00:00
Seiya Nuta
e8847eb003 [llvm-objcopy][MachO] Recompute and update offset/size fields in the writer
Summary:
Recompute and update offset/size fields so that we can implement llvm-objcopy options like --only-section.

This patch is the first step and focuses on supporting load commands that covered by existing tests: executable files and
dynamic libraries are not supported.

Reviewers: alexshap, rupprecht, jhenderson

Reviewed By: alexshap, rupprecht

Subscribers: compnerd, jakehehrlich, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62652

llvm-svn: 362863
2019-06-08 01:22:54 +00:00
Mike Spertus
c3996c8313 Visualizer for APInt and remove obsolete visualizer
Visualizer for the simple case of APInt (uints < 2^64)
as will be required  for Clang ConstantArrayType visualizer.
Also, removed obsolete VS2013 SmallVectorVisualizer as VS2013
is no longer supported.

llvm-svn: 362860
2019-06-08 00:23:08 +00:00
Amara Emerson
d06a69ea1d Factor out SelectionDAG's switch analysis and lowering into a separate component.
In order for GlobalISel to re-use the significant amount of analysis and
optimization code in SDAG's switch lowering, we first have to extract it and
create an interface to be used by both frameworks.

No test changes as it's NFC.

Differential Revision: https://reviews.llvm.org/D62745

llvm-svn: 362857
2019-06-08 00:05:17 +00:00
Matt Arsenault
8fe55c2087 LoopDistribute: Add testcase where SCEV wants to insert a runtime
check.

Only the memory based checks were being tested. Prepare for fix in
convergent handling.

llvm-svn: 362854
2019-06-07 23:17:38 +00:00
Keno Fischer
3460115c23 [GVN] non-functional code movement
Summary: Move some code around, in preparation for later fixes
to the non-integral addrspace handling (D59661)

Patch By Jameson Nash <jameson@juliacomputing.com>

Reviewed By: reames, loladiro
Differential Revision: https://reviews.llvm.org/D59729

llvm-svn: 362853
2019-06-07 23:08:38 +00:00
Matt Arsenault
f47f332c7d AMDGPU: Force skips around traps
llvm-svn: 362852
2019-06-07 23:02:52 +00:00
Reid Kleckner
f53930f5f7 [COFF] Fix /export:foo=bar when bar is a weak alias
Summary:
When handling exports from the command line or from .def files, the
linker does a "fuzzy" string lookup to allow finding mangled symbols.
However, when the symbol is re-exported under a new name, the linker has
to transfer the decorations from the exported symbol over to the new
name. This is implemented by taking the mangled symbol that was found in
the object and replacing the original symbol name with the export name.

Before this patch, LLD implemented the fuzzy search by adding an
undefined symbol with the unmangled name, and then during symbol
resolution, checking if similar mangled symbols had been added after the
last round of symbol resolution. If so, LLD makes the original symbol a
weak alias of the mangled symbol. Later, to get the original symbol
name, LLD would look through the weak alias and forward it on to the
import library writer, which copies the symbol decorations. This
approach doesn't work when bar is itself a weak alias, as is the case in
asan. It's especially bad when the aliasee of bar contains the string
"bar", consider "bar_default". In this case, we would end up exporting
the symbol "foo_default" when we should've exported just "foo".

To fix this, don't look through weak aliases to find the mangled name.
Save the mangled name earlier during fuzzy symbol lookup.

Fixes PR42074

Reviewers: mstorsjo, ruiu

Subscribers: thakis, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62984

llvm-svn: 362849
2019-06-07 22:05:12 +00:00
Alexander Shaposhnikov
da34c35eb9 [llvm-lipo] Add docs for llvm-lipo
Add docs (llvm-lipo.rst) for llvm-lipo.

Test plan:
make -j8 sphinx 
check that ./docs/html/CommandGuide/llvm-lipo.html is built correctly and looks okay.

Differential revision: https://reviews.llvm.org/D62706

llvm-svn: 362848
2019-06-07 22:03:02 +00:00
Jordan Rupprecht
dc8bb21cae [llvm-objdump] Fix Bugzilla ID 41862 to support checking addresses of disassembled object
Summary:
This fixes the bugzilla id,41862 to support dealing with checking
stop address against start address to support this not being a
proper object to check the disasembly against like gnu objdump
currently does.

Reviewers: jakehehrlich, rupprecht, echristo, jhenderson, grimar

Reviewed By: jhenderson

Subscribers: MaskRay, smeenai, rupprecht, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61969

Patch by Nicholas Krause!

llvm-svn: 362847
2019-06-07 21:49:26 +00:00
Adrian McCarthy
fbf8ada68a Fix string literals to avoid deprecation warnings in regexp patterns
In LLDB, where tests run with the debug version of Python, we get a
series of deprecation warnings because escape sequences like `\(` are
being treated as part of the string literal rather than an escape for
the regexp pattern.

NFC intended.

Differential Revision: https://reviews.llvm.org/D62882

llvm-svn: 362846
2019-06-07 21:14:33 +00:00
Shoaib Meenai
720baf9a35 [llvm-lipo] Drop unneeded braces. NFC
llvm-svn: 362841
2019-06-07 20:52:17 +00:00
Shoaib Meenai
2365b4ea23 [llvm-lipo] Implement -archs
Displays the architecture names of an input file.
Unknown architectures are represented by unknown(cputype,cpusubtype).

Patch by Anusha Basana <anusha.basana@gmail.com>

Differential Revision: https://reviews.llvm.org/D62753

llvm-svn: 362840
2019-06-07 20:47:58 +00:00
Alina Sbirlea
2d127b3a65 [DomTreeUpdater] Add all insert before all delete updates to reduce compile time.
Summary:
The cleanup in D62751 introduced a compile-time regression due to the way DT updates are performed.
Add all insert edges then all delete edges in DTU to match the previous compile time.
Compile time on the test provided by @mstorsjo before and after this patch on my machine:
113.046s vs 35.649s
Repro: clang -target x86_64-w64-mingw32 -c -O3 glew-preproc.c; on https://martin.st/temp/glew-preproc.c.

Reviewers: kuhar, NutshellySima, mstorsjo

Subscribers: jlebar, mstorsjo, dmgreen, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62981

llvm-svn: 362839
2019-06-07 20:43:55 +00:00
Michael Pozulp
81f7bafd0c [llvm-objdump] Add warning if --disassemble-functions specifies an unknown symbol
Summary:
Fixes Bug 41904 https://bugs.llvm.org/show_bug.cgi?id=41904

Re-land r362768 after it was reverted in r362826.

Reviewers: jhenderson, rupprecht, grimar, MaskRay

Reviewed By: jhenderson, rupprecht, MaskRay

Subscribers: dexonsmith, rupprecht, kristina, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62275

llvm-svn: 362838
2019-06-07 20:34:31 +00:00
Craig Topper
459dbc030a [X86] Remove unnecessary new line escape from the end of a macro. NFC
llvm-svn: 362837
2019-06-07 20:30:40 +00:00
Michael Pozulp
e4566d8d18 [ADT] Enable set_difference() to be used on StringSet
Summary: Re-land r362766 after it was reverted in r362823.

Reviewers: jhenderson, dsanders, aaron.ballman, MatzeB, lhames, dblaikie

Reviewed By: dblaikie

Subscribers: smeenai, mgrang, mgorny, dexonsmith, kristina, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62369

llvm-svn: 362835
2019-06-07 20:23:03 +00:00
Volkan Keles
08d50eb0d7 [GlobalISel] IRTranslator: Translate the intrinsics ignored by CodeGen
Summary:
Translate `llvm.assume`, `llvm.var.annotation` and `llvm.sideeffect` to nothing
as they have no effect on CodeGen.

Reviewers: qcolombet, aditya_nandakumar, dsanders, paquette, aemerson, arsenm

Reviewed By: arsenm

Subscribers: hiraditya, wdng, rovka, kristof.beyls, javed.absar, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63022

llvm-svn: 362834
2019-06-07 20:19:27 +00:00
Nick Desaulniers
deb150af5c [APFloat] APFloat::Storage::Storage - refix use after move
Summary:
Re-land r360675 after it was reverted in r360770.

This was reported in:
https://llvm.org/reports/scan-build/

Based on feedback in:
https://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20190513/652286.html

Reviewers: RKSimon, efriedma

Reviewed By: RKSimon, efriedma

Subscribers: eli.friedman, hiraditya, llvm-commits, srhines

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62767

llvm-svn: 362833
2019-06-07 19:51:22 +00:00