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194438 Commits

Author SHA1 Message Date
Zuojian Lin
74834f3b5b Remove the additional constant which requires an extra register for statepoint lowering.
The newly-created constant zero will need an extra register to hold it
in the current statepoint lowering implementation. Remove it if there
exists one.
2020-04-05 11:22:09 -04:00
Apelete Seketeli
45cf93703e [scan-build] fix dead store warnings emitted on LLVM AMDGPU code base
This fixes dead store warnings of the type "dead assignment" reported
by Clang Static Analyzer.
2020-04-05 11:19:03 -04:00
Matt Arsenault
a93c5df5e6 AMDGPU/GlobalISel: Add some G_INSERT/G_EXTRACT select tests 2020-04-05 10:54:24 -04:00
Oliver Stannard
89cccc020b [ARM] Add data gathering hint instruction
Summary:
This patch upstreams support the optional ARMv8.0 Data Gathering Hint (DGH)
extension, which adds the Data Gathering Hint instruction to the hint
space.

See ARMv8.0-DGH in the Arm Architecture Reference Manual Armv8 for more
information.

Reviewers: t.p.northover, rengolin, SjoerdMeijer, ab, danielkiss, samparker

Reviewed By: SjoerdMeijer

Subscribers: LukeGeeson, ostannard, kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77097
2020-04-05 15:21:00 +01:00
Oliver Stannard
cf2bc6f40e [ARM] Add enhanced counter virtualization system registers
Summary:
This patch upstreams support for the ARMv8.6A Enhanced Counter Virtualization
(ECV) extension, which adds 6 new system registers.

See ARMv8.6-ECV in the Arm Architecture Reference Manual Armv8 for more
information.

Reviewers: t.p.northover, rengolin, SjoerdMeijer, pcc, ab, chill

Reviewed By: SjoerdMeijer

Subscribers: LukeGeeson, ostannard, kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77094
2020-04-05 15:18:35 +01:00
Sanjay Patel
6660b7b194 [InstCombine] convert bitcast-shuffle to vector trunc
As discussed in D76983, that patch can turn a chain of insert/extract
with scalar trunc ops into bitcast+extract and existing instcombine
vector transforms end up creating a shuffle out of that (see the
PhaseOrdering test for an example). Currently, that process requires
at least this sequence: -instcombine -early-cse -instcombine.

Before D76983, the sequence of insert/extract would reach the SLP
vectorizer and become a vector trunc there.

Based on a small sampling of public targets/types, converting the
shuffle to a trunc is better for codegen in most cases (and a
regression of that form is the reason this was noticed). The trunc is
clearly better for IR-level analysis as well.

This means that we can induce "spontaneous vectorization" without
invoking any explicit vectorizer passes (at least a vector cast op
may be created out of scalar casts), but that seems to be the right
choice given that we started with a chain of insert/extract, and the
backend would expand back to that chain if a target does not support
the op.

Differential Revision: https://reviews.llvm.org/D77299
2020-04-05 09:48:02 -04:00
Oliver Stannard
27d5de4f6b [ARM] Add ARMv8.6 Fine Grain Traps system registers
Summary:
This patch upstreams support for the ARMv8.6A Fine Grain Traps (FGT)
extension, which adds 5 new system registers.

See ARMv8.6-FGT in the Arm Architecture Reference Manual Armv8 for more
information.

Reviewers: t.p.northover, rengolin, SjoerdMeijer, ab, momchil.velikov

Reviewed By: SjoerdMeijer

Subscribers: LukeGeeson, ostannard, kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76991
2020-04-05 14:28:18 +01:00
Sanjay Patel
9a14d9afe1 [InstCombine] enhance freelyNegateValue() by handling 'not'
This patch extends D77230. If we have a 'not' instruction inside a
negated expression, we can ignore extra uses of that op because the
negation has a one-to-one replacement: negate becomes increment.

Alive2 examples of the test cases:
http://volta.cs.utah.edu:8080/z/T5-u9P
http://volta.cs.utah.edu:8080/z/eT89L6

Differential Revision: https://reviews.llvm.org/D77459
2020-04-05 09:16:19 -04:00
Sanjay Patel
e9fc5c66f0 [ValueTracking] enhance matching of smin/smax with 'not' operands
The cmyk tests are based on the known regression that resulted from:
rGf2fbdf76d8d0

So this improvement in analysis might be enough to restore that commit.
2020-04-05 08:54:12 -04:00
Diogo Sampaio
9781bbe27f [ARM] add ARMv8.6-A Activity monitors virtualization extension
Summary:
This patch upstreams v8.6A activity monitors virtualization
assembler support, which consists of 32 new system
registers (two groups, each with 16 numbered registers).

See ARMv8.6-AMU in the Arm Architecture Reference Manual Armv8 for more
information.

Reviewers: t.p.northover, rengolin, SjoerdMeijer, ab, john.brawn, ostannard

Reviewed By: ostannard

Subscribers: LukeGeeson, dnsampaio, ostannard, kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76998
2020-04-05 13:31:06 +01:00
Benjamin Kramer
5e69ec1678 [X86] Roll some loops. NFCI. 2020-04-05 13:59:50 +02:00
Florian Hahn
1e0d9ddb20 [ValueTracking] Use Inst::comesBefore in isValidAssumeForCtx (NFC).
D51664 added Instruction::comesBefore which should provide better
performance than the manual check.

Reviewers: rnk, nikic, spatel

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D76228
2020-04-05 12:38:04 +01:00
David Zarzycki
e1695a56c4 Revert "Test had incorrect check for nonzero count"
This reverts commit 210f40fe9a30212396311d265904b2d73859c53d.
2020-04-05 07:16:47 -04:00
Simon Pilgrim
025b774a7d [X86][SSE] Generalize shuffle(HORIZOP,HORIZOP) -> HORIZOP combine
Our existing combine allows to merge the shuffle of 2 similar 64-bit wide 'horizontal ops' (HADD/PACK/etc.) if the shuffle was a UNPCK/MOVSD.

This patch generalizes this to decode any target shuffle mask that can be widened to a 128-bit repeating v2*64 mask, which helps us catch PBLENDW/PBLENDD cases.
2020-04-05 12:09:19 +01:00
Simon Pilgrim
7907ee6fb1 [X86][SSE] truncateVectorWithPACK - upper undef for 128->64 packing
If we're packing from 128-bits to 64-bits then we don't need the RHS argument. This helps with register allocation, especially as we avoid repeating a use of the input value.
2020-04-05 11:47:36 +01:00
vgxbj
bd9ded14fa [llvm-objdump] Simplify conditional statements (isa<...>(Obj) => Obj->isSomeFile())
Summary: Simplify some conditional statements.

Reviewers: jhenderson, MaskRay, rupprecht

Reviewed By: MaskRay, rupprecht

Subscribers: rupprecht, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75899
2020-04-05 12:31:22 +08:00
vgxbj
e12448d5b3 [llvm-nm] Add test for --debug-syms --dynamic
Summary: This test ensures that `llvm-nm` will omit NULL symbol.

Reviewers: jhenderson, MaskRay, grimar

Reviewed By: jhenderson, grimar

Subscribers: rupprecht, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76213
2020-04-05 12:15:30 +08:00
vgxbj
74e56f5cdb [llvm-objdump][test] Recommit unimplemented-features.test
Recommit test case that removed by rG685bf42e9e0cc79cff6d26cf44749db98f148270
2020-04-05 11:47:27 +08:00
vgxbj
b6fcf8975a [llvm-objdump][test] Remove unimplemented-features.test
Seems that this test breaks build bots.
http://lab.llvm.org:8011/builders/lld-x86_64-win7/builds/41418

Commit it later.
2020-04-05 11:03:34 +08:00
vgxbj
4e26366ac1 [llvm-objdump] Teach llvm-objdump dump dynamic symbols.
Summary:
This patch is to teach `llvm-objdump` dump dynamic symbols (`-T` and `--dynamic-syms`). Currently, this patch is not fully compatible with `gnu-objdump`, but I would like to continue working on this in next few patches. It has two issues.

1. Some symbols shouldn't be marked as global(g). (`-t/--syms` has same issue as well) (Fixed by D75659)
2. `gnu-objdump` can dump version information and *dynamically* insert before symbol name field.

`objdump -T a.out` gives:

```
DYNAMIC SYMBOL TABLE:
0000000000000000  w   D  *UND*  0000000000000000              _ITM_deregisterTMCloneTable
0000000000000000      DF *UND*  0000000000000000  GLIBC_2.2.5 printf
0000000000000000      DF *UND*  0000000000000000  GLIBC_2.2.5 __libc_start_main
0000000000000000  w   D  *UND*  0000000000000000              __gmon_start__
0000000000000000  w   D  *UND*  0000000000000000              _ITM_registerTMCloneTable
0000000000000000  w   DF *UND*  0000000000000000  GLIBC_2.2.5 __cxa_finalize
```

`llvm-objdump -T a.out` gives:

```
DYNAMIC SYMBOL TABLE:
0000000000000000  w   D  *UND*  0000000000000000 _ITM_deregisterTMCloneTable
0000000000000000 g    DF *UND*  0000000000000000 printf
0000000000000000 g    DF *UND*  0000000000000000 __libc_start_main
0000000000000000  w   D  *UND*  0000000000000000 __gmon_start__
0000000000000000  w   D  *UND*  0000000000000000 _ITM_registerTMCloneTable
0000000000000000  w   DF *UND*  0000000000000000 __cxa_finalize
```

Reviewers: jhenderson, grimar, MaskRay, espindola

Reviewed By: jhenderson, grimar

Subscribers: emaste, rupprecht, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75756
2020-04-05 10:46:59 +08:00
Matt Arsenault
b1f5813526 AMDGPU: Fix annotate kernel features through casted calls
I thought I was testing this before, but the workitem id x
case isn't great since it's mandatory in the parent kernel.
2020-04-04 20:44:44 -04:00
Shinji Okumura
72788d66f4 [Attributor] AAReachability : use isPotentiallyReachable in isKnownReachable
`isKnownReachable` had only interface (always returns true).
 Changed it to call `isPotentiallyReachable`.
This change enables deductions of other Abstract Attributes depending on
AAReachability to use reachability information obtained from CFG, and it
can make them stronger.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D76210
2020-04-04 19:16:17 -05:00
Shinji Okumura
fbb9bfcd51 [Attributor] Make use of analysis in the MustBeExecutedExplorer
This commit was made to settle [[ https://github.com/llvm/llvm-project/issues/175 | this issue on GitHub ]].
I added analysis getters for LoopInfo, DominatorTree, and
PostDominatorTree. And I added a test to show an improvement of the
deduction of `dereferenceable` attribute.

Reviewed By: jdoerfert, uenoku

Differential Revision: https://reviews.llvm.org/D76378
2020-04-04 19:08:44 -05:00
Matt Arsenault
f2d158d7a0 AMDGPU: Add feature for fast f32 denormals 2020-04-04 20:01:24 -04:00
Stefanos Baziotis
0e9a095779 [Attributor] AAUndefinedBehavior: Use AAValueSimplify in memory accessing instructions.
Query AAValueSimplify on pointers in memory accessing instructions to take
advantage of the constant propagation (or any other value simplification) of such values.
2020-04-05 02:46:26 +03:00
Simon Pilgrim
f0c307facd [CostModel][X86] Add some insert subvector cost tests for vXf32/vXi32/vXi16/vXi8 types 2020-04-04 22:46:57 +01:00
Simon Pilgrim
3925336f16 [X86] Cleanup vectorcall test checks
PR32397 still needs to be fixed for the update script to process this
2020-04-04 22:46:56 +01:00
Jonathan Roelofs
0840b74ee5 Revert "[DAG] Fix PR45049: LegalizeTypes crash"
This reverts commit 17673ae0b2cbf8d48973b673d413fb8591d8aae7.
2020-04-04 13:47:22 -06:00
Jonathan Roelofs
4d91cb7030 [DAG] Fix PR45049: LegalizeTypes crash
Sometimes LegalizeTypes knows about common subexpressions before SelectionDAG
does, leading to accidental SDValue removal before its reference count was
truly zero.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=45049

https://reviews.llvm.org/D76994
2020-04-04 13:36:22 -06:00
Sanjay Patel
1e300cdd8c [ValueTracking] add tests for smin/smax; NFC 2020-04-04 13:44:06 -04:00
Sanjay Patel
024f788a82 [InstCombine] add more tests for min/max folding; NFC 2020-04-04 13:44:06 -04:00
Florian Hahn
16f85870fd [LV] Simplify tryToWiden as recipes are not re-used (NFC).
After 49d00824bbbb, VPWidenRecipe only stores a single instruction.
tryToWiden can simply return the widen recipe, like other helpers in
VPRecipeBuilder.
2020-04-04 18:30:50 +01:00
Heejin Ahn
b34315963f [WebAssembly] Fix a sanitizer error in WasmEHPrepare
Summary:
D77423 started using a dominator tree in WasmEHPrepare, but we deleted
BBs in `prepareThrows` before we used the domtree in `prepareEHPads`,
and those CFG changes were not reflected in the domtree. This uses
`DomTreeUpdater` to make sure we update the domtree every time we delete
BBs from the CFG. This fixes ubsan/msan/expensive_check errors caught in
LLVM buildbots.

Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77465
2020-04-04 09:57:07 -07:00
Nikita Popov
59ebc3b1d3 [InstCombine] Don't limit uses in eraseInstFromFunction()
eraseInstFromFunction() adds the operands of the erased instructions,
as those might now be dead as well. However, this is limited to
instructions with less than 8 operands.

This check doesn't make a lot of sense to me. As the instruction
gets removed afterwards, I don't see a potential for anything
overly pathological happening here (as we can only add those
operands to the worklist once). The impact on CTMark is in
the noise. We also have the same code in instruction sinking
and don't limit the operand count there.

Differential Revision: https://reviews.llvm.org/D77325
2020-04-04 18:37:30 +02:00
Luofan Chen
981bfd3954 [Attributor] Deduce attributes for non-exact functions
This patch is based on D63312 and D63319. For now we create shallow wrappers for all functions that are IPO amendable.
See also [this github issue](https://github.com/llvm/llvm-project/issues/172).

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D76404
2020-04-04 11:34:58 -05:00
Nico Weber
e9d1f14be0 Disable relative paths in lit.site.cfg in presence of symlinks
See https://reviews.llvm.org/D77184#1961208
2020-04-04 12:35:40 -04:00
Heejin Ahn
9f0b3d7141 [WebAssembly] Fix wasm.lsda() optimization in WasmEHPrepare
Summary:
When we insert a call to the personality function wrapper
(`_Unwind_CallPersonality`) for a catch pad, we store some necessary
info in `__wasm_lpad_context` struct and pass it. One of the info is the
LSDA address for the function. For this, we insert a call to
`wasm.lsda()`, which will be lowered down to the address of LSDA, and
store it in a field in `__wasm_lpad_context`.

There are exceptions to this personality call insertion: catchpads for
`catch (...)` and cleanuppads (for destructors) don't need personality
function calls, because we don't need to figure out whether the current
exception should be caught or not. (They always should.)

There was a little optimization to `wasm.lsda()` call insertion. Because
the LSDA address is the same throughout a function, we don't need to
insert a store of `wasm.lsda()` return value in every catchpad. For
example:
```
try {
  foo();
} catch (int) {
  // wasm.lsda() call and a store are inserted here, like, in
  // pseudocode,
  // %lsda = wasm.lsda();
  // store %lsda to a field in __wasm_lpad_context
  try {
    foo();
  } catch (int) {
    // We don't need to insert the wasm.lsda() and store again, because
    // to arrive here, we have already stored the LSDA address to
    // __wasm_lpad_context in the outer catch.
  }
}
```
So the previous algorithm checked if the current catch has a parent EH
pad, we didn't insert a call to `wasm.lsda()` and its store.

But this was incorrect, because what if the outer catch is `catch (...)`
or a cleanuppad?
```
try {
  foo();
} catch (...) {
  // wasm.lsda() call and a store are NOT inserted here
  try {
    foo();
  } catch (int) {
    // We need wasm.lsda() here!
  }
}
```
In this case we need to insert `wasm.lsda()` in the inner catchpad,
because the outer catchpad does not have one.

To minimize the number of inserted `wasm.lsda()` calls and stores, we
need a way to figure out whether we have encountered `wasm.lsda()` call
in any of EH pads that dominates the current EH pad. To figure that
out, we now visit EH pads in BFS order in the dominator tree so that we
visit parent BBs first before visiting its child BBs in the domtree.

We keep a set named `ExecutedLSDA`, which basically means "Do we have
`wasm.lsda()` either in the current EH pad or any of its parent EH
pads in the dominator tree?". This is to prevent scanning the domtree up
to the root in the worst case every time we examine an EH pad: each EH
pad only needs to examine its immediate parent EH pad.

- If any of its parent EH pads in the domtree has `wasm.lsda()`, this
  means we don't need `wasm.lsda()` in the current EH pad. We also insert
  the current EH pad in `ExecutedLSDA` set.
- If none of its parent EH pad has `wasm.lsda()`
  - If the current EH pad is a `catch (...)` or a cleanuppad, done.
  - If the current EH pad is neither a `catch (...)` nor a cleanuppad,
    add `wasm.lsda()` and the store in the current EH pad, and add the
    current EH pad to `ExecutedLSDA` set.

Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77423
2020-04-04 07:02:50 -07:00
Simon Pilgrim
e534f63a3b [CostModel][X86] Add shuffle cost tests for sub-128bit vectors 2020-04-04 13:08:25 +01:00
Simon Pilgrim
47a6dd97f5 [CostModel][X86] Add insert/extract cost tests for sub-128bit vXi8/vXi16 vectors 2020-04-04 13:08:25 +01:00
Simon Pilgrim
66f51ec795 [X86][SSE] lowerV8I16Shuffle - lower compaction shuffles using PACKUSDW(PBLENDW,PBLENDW) on SSE41+
Similar to the lowerV16I8Shuffle implementation, for binary compaction v8i16 shuffles we can avoid the PUNPCKLDQ(PSHUFB,PSHUFB) pattern on SSE41+ targets by using PACKUSDW and PBLENDW. Before SSE41 we would need to use PACKSSDW but that requires sign extension that seems to destroy any gains, even on targets without PSHUFB.

This is a bigger gain on AMD than Intel targets but should never be a regression, and avoiding the shuffle mask load(s) is always useful.

Noticed in codegen while dealing with PR31443.
2020-04-04 13:08:25 +01:00
Nikita Popov
8d10f18654 [IRBuilder] Move some code into the cpp file; NFC
Since D73835 we no longer need to define the whole IRBuilder
implementation in the header. This patch moves some of the larger
methods out of line, into the C++ file.

Differential Revision: https://reviews.llvm.org/D77332
2020-04-04 12:52:56 +02:00
Nikita Popov
677df00dcf [VNCoercion] Use IRBuilderBase; NFC
And remove include from header.
2020-04-04 12:44:50 +02:00
vgxbj
0f8b127b0f [Object] object::ELFObjectFile::dynamic_symbol_begin(): skip symbol index 0
Summary:
Note: This revision is very similar to D62296.

In D75756, we need `getDynamicSymbolIterators()` to skip first NULL symbol in `.dynsym`. And I believe it might be worth pointing this out in a separate patch to gather you experts' opinions.

I have checked that current code base will not be affected by this change.

```
dynamic_symbol_begin()
|- dynamic_symbol_end(): Ok
`- getDynamicSymbolIterators()
   |- addDynamicElfSymbols(): llvm/tools/llvm-objdump/llvm-objdump.cpp, Line 934
   |                          Ok, NULL symbol will be omitted by Line 945-947
   |                          StringRef Name = unwrapOrError(Symbol.getName(), Obj->getName());
   |                          if (Name.empty()) continue;
   |- dumpSymbolNameFromObject(): llvm/tools/llvm-nm/llvm-nm.cpp, Line 1192
   |                          There's no test for dumping dynamic debugging symbol. This patch helps improve llvm-nm behavior. (we should add test for this later)
   `- computeSymbolSizes(): llvm/lib/Object/SymbolSize.cpp, Line 52
      |- OProfileJITEventListener::notifyObjectLoaded(): llvm/lib/ExecutionEngine/OProfileJIT/OProfileJITEventListener.cpp, Line 92
      |                                                  Ok, NULL symbol will be omitted by Line 94-95
      |                                                  if (!Sym.getType() || *Sym.getType() != SF_Function) continue;
      |- IntelJITEventListener::notifyObjectLoaded(): llvm/lib/ExecutionEngine/IntelJITEvents/IntelJITEventListener.cpp, Line 98
      |                                               Ok, NULL symbol will be omitted by Line 124-126 (same as previous one)
      |- PerfJITEventListener::notifyObjectLoaded(): llvm/lib/ExecutionEngine/PerfJITEvents/PerfJITEventListener.cpp, Line 244
      |                                              Ok, NULL symbol will be omitted by Line 254-256, (same as previous one)
      |- SymbolizableObjectFile::create(): llvm/lib/DebugInfo/Symbolize/SymbolizableObjectFile.cpp, Line 73
      |                                    Ok, NULL symbol will be omitted by Line 75
      |                                    res->addSymbol()
      |                                    In addSymbol(), Line 167-168
      |                                    if (!Sec || (Obj && Obj->section_end() == *Sec)) return std::error_code();
      |- dumpCXXData(): llvm/tools/llvm-cxxdump/llvm-cxxdump.cpp, Line 189
      |                 Ok, NULL symbol will be omitted by Line 199-202
      |                 object::section_iterator SecI = *SecIOrErr;
      |                 // Skip external symbols.
      |                 if (SecI == Obj->section_end())
      |                   continue;
      `- printLineInfoForInput(): llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp, Line 418
                                  Ok, NULL symbol will be omitted by Line 430-477
                                  if (Type == object::SymbolRef::ST_Function) {
                                    ...
                                  }
```

Reviewers: grimar, jhenderson, MaskRay

Reviewed By: jhenderson, MaskRay

Subscribers: rupprecht, arphaman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76081
2020-04-04 18:45:52 +08:00
Nikita Popov
ed72276673 [Reassociate] Use IRBuilderBase; NFC
And remove now unnecessary IRBuilder.h include in header.
2020-04-04 12:34:16 +02:00
Nikita Popov
b87bc671ab [IVDescriptors] Remove IRBuilder.h include; NFC
IVDescriptors.h itself does not reference IRBuilder at all.
Move the include into transformation passes that do.
2020-04-04 12:07:57 +02:00
Nikita Popov
34ec684e36 [IVDescriptors] Remove unnecessary DemandedBits.h include; NFC
Forward declare DemandedBits in IVDescriptors, and move include
into the cpp file. Also drop the include from LoopUtils, which
does not need it at all.
2020-04-04 12:07:57 +02:00
Matt Arsenault
e41d374974 AMDGPU: Fix a few more tests with old denormal subtarget features 2020-04-03 23:42:13 -04:00
Mehdi Amini
27adb21285 Add mention of advantages of arc in the Phabricator doc.
Differential Revision: https://reviews.llvm.org/D76952
2020-04-04 03:22:29 +00:00
Nemanja Ivanovic
5c1da92dff [NFC][PowerPC] Pre-commit a test case for D77448
Pre-committing the new test case so the review shows only the diffs.
2020-04-03 20:43:04 -05:00
Eli Friedman
7ed9262dbb [llvm-stress][opaque pointers] Remove use of deprecated constructor
(See also D76269.)
2020-04-03 18:00:33 -07:00