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189057 Commits

Author SHA1 Message Date
Richard Smith
762e58de3b llvm-cxxmap: fix support for remapping non-mangled names.
Remappings involving extern "C" names were already supported in the
context of <local-name>s, but this support didn't work for remapping the
complete mangling itself. (Eg, we would remap X<foo> but not foo itself,
if foo is an extern "C" function.)
2019-12-18 10:47:02 -08:00
Craig Topper
a0b4517f3d [SelectionDAGBuilder] Use getConstant instead of getTargetConstant to build the offset for struct types in getUniformBase.
getTargetConstant prevents any optimizations from operating on the
value and basically says its already been iseled. But since we
want the index to be in a register, this isn't true.

Prior to this we were generating a vbroadcast with an immediate
argument which is illegal and was flagged by the expensive checks
bot.
2019-12-18 10:44:28 -08:00
Stefan Pintilie
2637a8977b [PowerPC][NFC] Refactor splat of constant to vector.
Refactor the splatting of a constant to a vector so that common code is used
both for Power9 and Power8.

Patch by: Anil Mahmud

Differential Revision: https://reviews.llvm.org/D71481
2019-12-18 12:43:19 -06:00
Danilo Carvalho Grael
c2cf175a3a [AArch64][SVE] Fix gather scatter dag combine test. 2019-12-18 13:44:25 -05:00
Danilo Carvalho Grael
a9e95212be [AArch64][SVE] Replace integer immediate intrinsics with splat vector variant
Summary: Replace the integer immediate intrisics with splat vector variants so they can be applied as optimizations for the C/C++ intrinsics.

Reviewers: sdesmalen, huntergr, rengolin, efriedma, c-rhodes, mgudim, kmclaughlin

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, llvm-commits, amehsan

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71614
2019-12-18 13:11:21 -05:00
Michael Trent
721829227e [ MC ] Match labels to existing fragments even when switching sections.
(This commit restores the original branch (4272372c571) and applies an
additional change dropped from the original in a bad merge. This change
should address the previous bot failures. Both changes reviewed by pete.)

Summary:
This commit builds upon Derek Schuff's 2014 commit for attaching labels to
existing fragments ( Diff Revision: http://reviews.llvm.org/D5915 )

When temporary labels appear ahead of a fragment, MCObjectStreamer will
track the temporary label symbol in a "Pending Labels" list. Labels are
associated with fragments when a real fragment arrives; otherwise, an empty
data fragment will be created if the streamer's section changes or if the
stream finishes.

This commit moves the "Pending Labels" list into each MCStream, so that
this label-fragment matching process is resilient to section changes. If
the streamer emits a label in a new section, switches to another section to
do other work, then switches back to the first section and emits a
fragment, that initial label will be associated with this new fragment.
Labels will only receive empty data fragments in the case where no other
fragment exists for that section.

The downstream effects of this can be seen in Mach-O relocations. The
previous approach could produce local section relocations and external
symbol relocations for the same data in an object file, and this mix of
relocation types resulted in problems in the ld64 Mach-O linker. This
commit ensures relocations triggered by temporary labels are consistent.

Reviewers: pete, ab, dschuff

Reviewed By: pete, dschuff

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71368
2019-12-18 09:55:54 -08:00
Sanjay Patel
03cf0be0b6 [AArch64] add tests for bitcasted DUPLANE; NFC
See D63815 for context/motivation.
2019-12-18 12:14:20 -05:00
Raphael Isemann
d9fc20a215 Fix modules build by adding missing includes to LTO/Config.h 2019-12-18 17:43:19 +01:00
stozer
52b363d22e Reapply: [DebugInfo] Correctly handle salvaged casts and split fragments at ISel
This reverts commit 1f3dd83cc1f2b8f72b9d59e2b4221b12fb7f9a95, reapplying
commit bb1b0bc4e57428ce364d3d6c075ff03cb8973462.

The original commit failed on some builds seemingly due to the use of a
bracketed constructor with an std::array, i.e. `std::array<> arr({...})`.
2019-12-18 16:26:42 +00:00
Guillaume Chatelet
19f7efb5d3 [llvm-exegesis][NFC] internal changes
Summary:
BitVectors are now cached to lower memory utilization.
Instructions have reference semantics.

Reviewers: courbet

Subscribers: sdardis, tschuett, jrtc27, atanasyan, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71653
2019-12-18 17:24:07 +01:00
Mircea Trofin
883118572a [NFC][InlineCost] Run clang-format on InlineCost.cpp
Reviewers: davidxl

Reviewed By: davidxl

Subscribers: Jim, eraman, hiraditya, haicheng, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71646
2019-12-18 08:10:44 -08:00
Sanjay Patel
1bc3b1c5ed [AArch64] update test checks; NFC
The common prefix reduces a bunch of replication; not sure why it
didn't happen before.
2019-12-18 11:05:06 -05:00
LLVM GN Syncbot
1818a82d8d gn build: Merge 9883d7edc65 2019-12-18 16:00:24 +00:00
Whitney Tsang
ffd2241e43 [LoopUtils] Updated deleteDeadLoop() to handle loop nest.
Reviewer: kariddi, sanjoy, reames, Meinersbur, bmahjour, etiotto,
kbarton
Reviewed By: Meinersbur
Subscribers: mgorny, hiraditya, llvm-commits
Tag: LLVM
Differential Revision: https://reviews.llvm.org/D70939
2019-12-18 15:59:45 +00:00
evgeny
0c4768b2e9 [ThinLTO] Show preserved symbols in DOT files
Differential revision: https://reviews.llvm.org/D71608
2019-12-18 18:33:15 +03:00
Daniel Sanders
62f5c5bff1 [globalisel] Small correction to the fixup in 0a0813962d6. The two ID's are not the same size
The rule ID is a uint64_t as it has global scope but the UID is scoped to
the rule and expected to be much smaller so it's only unsigned.
2019-12-18 14:56:23 +00:00
Daniel Sanders
365070365b [gicombiner] Import tryCombineIndexedLoadStore()
Summary:
Now that arbitrary data is supported, import tryCombineIndexedLoadStore()

Depends on D69147

Reviewers: bogner, volkan

Reviewed By: volkan

Subscribers: hiraditya, arphaman, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69151
2019-12-18 14:41:38 +00:00
Roman Lebedev
a76742bf85 [NFC][InstCombine] Autogenerate assume.ll test 2019-12-18 17:16:19 +03:00
Daniel Sanders
1e69efeb0a [globalisel] Attempt to fix ARM bots that emit the correct number in the wrong place 2019-12-18 14:15:11 +00:00
Sanjay Patel
d0f75ba65a [AArch64] match fcvtl2 with bitcasted extract
This should eliminate a regression seen in D63815.

If we are FP extending the high half extract of a vector,
we should be able to peek through a bitcast sitting
between the extract and extend.

This replaces tablegen patterns with a more general
DAG to DAG override, so we can handle any casted type.

Differential Revision: https://reviews.llvm.org/D71515
2019-12-18 08:47:07 -05:00
Sanjay Patel
3d2cabef27 [InstCombine] add tests for copysign; NFC 2019-12-18 07:56:36 -05:00
Daniel Sanders
1ee93efcd0 [gicombiner] Add support for arbitrary match data being passed from match to apply
Summary:
This is used by the extending_loads combine to tell the apply step which
use is the preferred one to fold and the other uses should be re-written
to consume.

Depends on D69117

Reviewers: volkan, bogner

Reviewed By: volkan

Subscribers: hiraditya, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69147
2019-12-18 12:27:29 +00:00
stozer
3ed183d768 Revert "[DebugInfo] Correctly handle salvaged casts and split fragments at ISel"
Reverted due to build failure on windows bots.

This reverts commit bb1b0bc4e57428ce364d3d6c075ff03cb8973462.
2019-12-18 11:46:10 +00:00
LLVM GN Syncbot
8152a84c90 gn build: Merge 7ea2e5195a8 2019-12-18 11:37:45 +00:00
Daniel Sanders
c57301aa25 Revert "Temporarily Revert "[gicombiner] Add the MatchDag structure and parse instruction DAG's from the input""
This reverts commit e62e760f29567fe0841af870c65a4f8ef685d217.

The issue @uweigand raised should have been fixed by iterating over the
vector that owns the operand list data instead of the FoldingSet.

The MSVC issue raised by @thakis should have been fixed by relaxing the
regexes a little. I don't have a Windows machine available to test that so
I tested it by using `perl -p -e 's/0x([0-9a-f]+)/\U\1\E/g' to convert the
output of %p to the windows style.

I've guessed at the issue @phosek raised as there wasn't enough information
to investigate it. What I think is happening on that bot is the -debug
option isn't available because the second stage build is a release build.
I'm not sure why other release-mode bots didn't report it though.
2019-12-18 11:37:12 +00:00
LLVM GN Syncbot
b852062701 gn build: Merge 1ad15046dcf 2019-12-18 11:25:51 +00:00
stozer
1187611a04 [DebugInfo] Correctly handle salvaged casts and split fragments at ISel
Previously, LLVM had no functional way of performing casts inside of a
DIExpression(), which made salvaging cast instructions other than Noop
casts impossible. This patch enables the salvaging of casts by using the
DW_OP_LLVM_convert operator for SExt and Trunc instructions.

There is another issue which is exposed by this fix, in which fragment
DIExpressions (which are preserved more readily by this patch) for
values that must be split across registers in ISel trigger an assertion,
as the 'split' fragments extend beyond the bounds of the fragment
DIExpression causing an error. This patch also fixes this issue by
checking the fragment status of DIExpressions which are to be split, and
dropping fragments that are invalid.
2019-12-18 11:09:18 +00:00
Victor Campos
dec2c4786b [AArch64] Improve codegen of volatile load/store of i128
Summary:
Instead of generating two i64 instructions for each load or store of a
volatile i128 value (two LDRs or STRs), now emit a single LDP or STP.

Reviewers: labrinea, t.p.northover, efriedma

Reviewed By: efriedma

Subscribers: kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D69559
2019-12-18 10:03:12 +00:00
Jay Foad
84a719b414 [AArch64] Enable clustering memory accesses to fixed stack objects
Summary:
r347747 added support for clustering mem ops with FI base operands
including support for fixed stack objects in shouldClusterFI, but
apparently this was never tested.

This patch fixes shouldClusterFI to work with scaled as well as
unscaled load/store instructions, and fixes the ordering of memory ops
in MemOpInfo::operator< to ensure that memory addresses always
increase, regardless of which direction the stack grows.

Subscribers: MatzeB, kristof.beyls, hiraditya, javed.absar, arphaman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71334
2019-12-18 09:46:11 +00:00
Miloš Stojanović
4659cb8849 [llvm-exegesis][mips] Add lit test
Adding a basic lit test for MIPS.

Differential Revision: https://reviews.llvm.org/D71605
2019-12-18 10:21:06 +01:00
Anna Welker
6061965980 [NFC][TTI] Add Alignment for isLegalMasked[Gather/Scatter]
Add an extra parameter so alignment can be taken under
consideration in gather/scatter legalization.

Differential Revision: https://reviews.llvm.org/D71610
2019-12-18 09:14:39 +00:00
David Stenberg
4327030c9f [cmake] Add llvm-locstats to LLVM_TEST_DEPENDS
Summary:
Make sure that llvm-locstats is updated before running lit tests even
when it's not an explicit target.

Reviewers: djtodoro, krisb, spatel

Reviewed By: djtodoro

Subscribers: mgorny, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71611
2019-12-18 09:54:21 +01:00
Georgii Rymar
06ca00d637 [llvm-readobj][test] - Move a comment. NFC.
I've forgot to address this review comment.
2019-12-18 11:50:08 +03:00
Georgii Rymar
d904448876 [llvm-readob] - Refactor printing of sections flags. NFCI.
This is a natural clean-up after D71462/D71464.
It allows to define known section letters used for GNU style
in one place.

Differential revision: https://reviews.llvm.org/D71591
2019-12-18 11:43:52 +03:00
Georgii Rymar
00a4dbe1da [llvm-readobj][test] - Cleanup hash-histogram.test
In this test case we use 3 precompiled objects to
test how we print a histogram for an GNU hash section.
It does not make sense to use precompiled objects
for that. Also we could have 2 tests: one for 32 and
another for 64 bits target.

This patch does this change. It is not possible to remove
these precompiled objects because they are used elsewhere.

Differential revision: https://reviews.llvm.org/D71606
2019-12-18 11:36:49 +03:00
Georgii Rymar
5230a68fc8 [llvm-readelf] - Change letters used for SHF_ARM_PURECODE and SHF_X86_64_LARGE flags.
GNU uses `l` for SHF_X86_64_LARGE and `y` for SHF_ARM_PURECODE.
Lets follow.

To do this I had to refactor and refine how we print the help flags description.
It was too generic and inconsistent with GNU readelf.

Differential revision: https://reviews.llvm.org/D71464
2019-12-18 11:31:58 +03:00
Georgii Rymar
f754b93e01 [llvm-readelf][llvm-readobj] - Reimplement the logic of section flags dumping.
Our logic that dumped the flags was buggy.

For LLVM style it dumped SHF_MASKPROC/SHF_MASKOS named constants, though
they are not flags, but masks.

For GNU style it was just very inconsistent with GNU which has logic
that is not straightforward. Imagine we have sh_flags == 0x90000000.
SHF_EXCLUDE ("E") has a value of 0x80000000 and SHF_MASKPROC is 0xf0000000.
GNU readelf will not print "E" or "Ep" in this case, but will print just
"p". It only will print "E" when no other processor flag is set.
I had to investigate the GNU source to find the algorithm and now our logic should
match it.

Differential revision: https://reviews.llvm.org/D71462
2019-12-18 10:44:40 +03:00
Wang, Pengfei
7777570cd1 [X86] Add calculation for elements in structures in getting uniform base for the Gather/Scatter intrinsic.
Summary: Add calculation for elements in structures in getting uniform
base for the Gather/Scatter intrinsic.

Reviewers: craig.topper, c-rhodes, RKSimon

Subscribers: hiraditya, llvm-commits, annita.zhang, LuoYuanke

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71442
2019-12-18 12:24:58 +08:00
Wang, Pengfei
b39ba5468d [X86] Add strict fma support
Summary: Add strict fma support

Reviewers: craig.topper, RKSimon, LiuChen3

Subscribers: hiraditya, llvm-commits, LuoYuanke

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71604
2019-12-18 11:44:00 +08:00
Justin Bogner
fff5769629 [docs] Remove git llvm push and git llvm revert from GettingStarted
These sections aren't accurate since the github move.

Differential Revision: https://reviews.llvm.org/D71640
2019-12-17 17:16:20 -08:00
Nemanja Ivanovic
900a92f3eb [PowerPC] Add missing legalization for vector BSWAP
We somehow missed doing this when we were working on Power9 exploitation.
This just adds the missing legalization and cost for producing the vector
intrinsics.

Differential revision: https://reviews.llvm.org/D70436
2019-12-17 19:07:34 -06:00
LLVM GN Syncbot
f7ddeeeea4 gn build: Merge e62e760f295 2019-12-18 00:29:06 +00:00
Eric Christopher
3a4584f42c Temporarily Revert "[gicombiner] Add the MatchDag structure and parse instruction DAG's from the input"
and follow-on patches.

This is breaking a few build bots and local builds with follow-up already
on the patch thread.

This reverts commits 390c8baa5440dda8907688d9ef860f6982bd925f and
520e3d66e7257c77f1226185504bbe1cb90afcfa.
2019-12-17 16:23:29 -08:00
Craig Topper
10ff0b86fe [X86] Manually format some setOperationAction calls to line up arguments to improve readability. NFC 2019-12-17 16:11:31 -08:00
Xiaoqing Wu
c4f9702f3a [AArch64][GlobalISel]: Fix a crash in GlobalIsel in dealing with 16bit uadd.with.overflow.
Summary: AArch64 doesn't support uadd.with.overflow.i16 natively. This change adds a legalization rule to convert the 32bit add result to 16bit. This should fix PR43981.

Reviewers: arsenm, qcolombet, paquette, aemerson

Reviewed By: paquette

Subscribers: wdng, rovka, kristof.beyls, hiraditya, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71587
2019-12-17 16:05:00 -08:00
Craig Topper
c108d18eaa [FPEnv][LegalizeTypes] Make ScalarizeVecOp_STRICT_FP_ROUND do its own replacements and return SDValue()
The caller will assert for nodes with more than 2 results unless
we return a null SDValue.

I tried to test this by copying an AArch64 test for ScalarizeVecOp_FP_ROUND.
While it did hit the assert and this commited fixed that. It also
hit a later problem that couldn't be fixed without adding strict
FP support to AArch64.
2019-12-17 15:17:43 -08:00
Stanislav Mekhanoshin
5d423671d1 [AMDGPU] Fixed cost model for packed 16 bit ops
Differential Revision: https://reviews.llvm.org/D71622
2019-12-17 15:14:17 -08:00
Thomas Lively
a355453a29 [WebAssembly] Implement SIMD {i8x16,i16x8}.avgr_u instructions
Summary:
These instructions were added to the spec proposal in
https://github.com/WebAssembly/simd/pull/126. Their semantics are
equivalent to `(a + b + 1) / 2`. The opcode for the experimental
i32x4.dot_i16x8_s is also bumped due to a collision with the
i8x16.avgr_u opcode.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71628
2019-12-17 15:05:50 -08:00
Mitch Phillips
1024f30fcf Revert "[ MC ] Match labels to existing fragments even when switching sections."
This reverts commit 4272372c571cd33edc77a8844b0a224ad7339138.

Caused an MSan buildbot failure. More information available in the patch
that introduced the bug: https://reviews.llvm.org/D71368
2019-12-17 15:04:26 -08:00
Craig Topper
3b00524ed6 [FPEnv][LegalizeTypes][LegalizeDAG][AArch64] Few fixes/improvements for legalizing fp<->int conversion nodes.
This started with adding a test to support get code coverage on
ScalarizeVecOp_UnaryOp_StrictFP by copying an existing AArch64 test
and using constrained sitofp/uitofp intrinsics.

This found 3 separate issues:
-ScalarizeVecOp_UnaryOp_StrictFP needs to do its own replacement
 because the caller can't handle replacing multiple results.
-Missing integer promotion support for sitofp/uitofp
-Chain result not always assigned in ExpandLegalINT_TO_FP.

Committing them together so I can add the test case.
2019-12-17 14:37:00 -08:00