Dan Gohman
cabaec582f
Rename MRegisterInfo to TargetRegisterInfo.
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llvm-svn: 46930
2008-02-10 18:45:23 +00:00
Chris Lattner
ad9a6ccb83
Remove attribution from file headers, per discussion on llvmdev.
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llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Anton Korobeynikov
8e8473c783
Use TableGen to emit information for dwarf register numbers.
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This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,
llvm-svn: 43997
2007-11-11 19:50:10 +00:00
Evan Cheng
3d2cfd8bb1
Added ARM::CPSR to represent ARM CPSR status register.
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llvm-svn: 37897
2007-07-05 07:17:13 +00:00
Evan Cheng
20c6a03b60
Specify S registers as D registers' sub-registers.
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llvm-svn: 36280
2007-04-20 21:20:10 +00:00
Evan Cheng
393fd04eb4
Change register allocation order to Dale's suggestion.
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llvm-svn: 35021
2007-03-08 02:56:40 +00:00
Evan Cheng
493960579f
ARM always use register scavenger. No longer reserves R12.
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llvm-svn: 34999
2007-03-07 02:46:23 +00:00
Evan Cheng
db591ecaa8
Make requiresRegisterScavenging determination on a per MachineFunction basis.
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llvm-svn: 34711
2007-02-28 00:59:19 +00:00
Evan Cheng
cfb0f8cfc6
Temporary: make R12 available in ARM mode if RegScavenger is being used.
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llvm-svn: 34709
2007-02-28 00:22:44 +00:00
Evan Cheng
4357509984
Minor tweak. Allocate r0 to r3 in reverse order, r3 is least likely to be livein to a function.
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llvm-svn: 34701
2007-02-27 23:03:55 +00:00
Evan Cheng
903e98b477
Comment.
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llvm-svn: 33633
2007-01-29 22:23:02 +00:00
Evan Cheng
d9d93832b0
hasFP() is now a virtual method of MRegisterInfo.
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llvm-svn: 33455
2007-01-23 00:57:47 +00:00
Evan Cheng
a6803554ab
Clean up ARM PEI code.
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llvm-svn: 33389
2007-01-20 02:09:25 +00:00
Evan Cheng
c6e1d453d3
ARM backend contribution from Apple.
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llvm-svn: 33353
2007-01-19 07:51:42 +00:00
Rafael Espindola
99322ef58c
initial support for frame pointers
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llvm-svn: 31197
2006-10-26 13:31:26 +00:00
Rafael Espindola
36c3e0028b
fix the names of the 64bit fp register
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initial support for returning 64bit floating point numbers
llvm-svn: 30692
2006-10-02 19:30:56 +00:00
Rafael Espindola
1b39270c95
add floating point registers
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implement SINT_TO_FP
llvm-svn: 30673
2006-09-29 21:20:16 +00:00
Chris Lattner
db290f7479
Constify some methods. Patch provided by Anton Vayvod, thanks!
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llvm-svn: 29756
2006-08-17 22:00:08 +00:00
Rafael Espindola
14a59f5b6e
initial implementation of ARMRegisterInfo::eliminateFrameIndex
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fixes test/Regression/CodeGen/ARM/ret_arg5.ll
llvm-svn: 28854
2006-06-18 00:08:07 +00:00
Rafael Espindola
dd49dfc0df
added a skeleton of the ARM backend
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llvm-svn: 28301
2006-05-14 22:18:28 +00:00
