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Commit Graph

6894 Commits

Author SHA1 Message Date
Nicolai Haehnle
2079f988a9 TableGen: Add !ne, !le, !lt, !ge, and !gt comparisons
Change-Id: I8e2ece677268972d578a787467f7ef52a1f33a71

Differential revision: https://reviews.llvm.org/D44114

llvm-svn: 327496
2018-03-14 11:00:57 +00:00
Nicolai Haehnle
5962b8bbf7 TableGen: Type-check BinOps
Additionally, allow more than two operands to !con, !add, !and, !or
in the same way as is already allowed for !listconcat and !strconcat.

Change-Id: I9659411f554201b90cd8ed7c7e004d381a66fa93

Differential revision: https://reviews.llvm.org/D44112

llvm-svn: 327494
2018-03-14 11:00:43 +00:00
Nicolai Haehnle
bf9d16116d TableGen: Allow ? in lists
This makes using !dag more convenient in some cases.

Change-Id: I0a8c35e15ccd1ecec778fd1c8d64eee38d74517c

Differential revision: https://reviews.llvm.org/D44111

llvm-svn: 327493
2018-03-14 11:00:33 +00:00
Nicolai Haehnle
fb41efa751 TableGen: Add !dag function for construction
This allows constructing DAG nodes with programmatically determined
names, and can simplify constructing DAG nodes in other cases as
well.

Also, add documentation and some very simple tests for the already
existing !con.

Change-Id: Ida61cd82e99752548d7109ce8da34d29da56a5f7

Differential revision: https://reviews.llvm.org/D44110

llvm-svn: 327492
2018-03-14 11:00:26 +00:00
Vedant Kumar
637b806500 Remove the LoopInstSimplify pass (-loop-instsimplify)
LoopInstSimplify is unused and untested. Reading through the commit
history the pass also seems to have a high maintenance burden.

It would be best to retire the pass for now. It should be easy to
recover if we need something similar in the future.

Differential Revision: https://reviews.llvm.org/D44053

llvm-svn: 327329
2018-03-12 20:49:42 +00:00
Dmitry Preobrazhensky
0c3596a4f8 [AMDGPU][MC][DOC] Updated AMD GPU assembler description
See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572

Differential Revision: https://reviews.llvm.org/D44020

Reviewers: artem.tamazov, vpykhtin
llvm-svn: 327288
2018-03-12 15:55:08 +00:00
Puyan Lotfi
15af41a330 Updating MIR Language Reference to include new syntax for symbols and physregs.
External symbols now get the sigil '&' while physical registers get the sigil
'$' for their prefix.

llvm-svn: 327276
2018-03-12 14:51:19 +00:00
Sanjay Patel
a5102714e6 [LangRef] make it clear that FP instructions do not have side effects
Also, fix the undef vs. UB example to use 'sdiv' because that can trigger div-by-zero UB.

The existing text for the constrained intrinsics says:
"By default, LLVM optimization passes assume that the rounding mode is round-to-nearest 
and that floating point exceptions will not be monitored. Constrained FP intrinsics are 
used to support non-default rounding modes and accurately preserve exception behavior 
without compromising LLVM’s ability to optimize FP code when the default behavior is 
used."
...so the additional text with the normal FP opcodes should make the different modes
clear.

Differential Revision: https://reviews.llvm.org/D44216

llvm-svn: 327138
2018-03-09 15:27:48 +00:00
Nicolai Haehnle
33d8a7c561 TableGen: Add a defset statement
Allows capturing a list of concrete instantiated defs.

This can be combined with foreach to create parallel sets of def
instantiations with less repetition in the source. This purpose is
largely also served by multiclasses, but in some cases multiclasses
can't be used.

The motivating example for this change is having a large set of
intrinsics, which are generated from the IntrinsicsBackend.td file
included by Intrinsics.td, and a corresponding set of instruction
selection patterns, which are generated via the backend's .td files.

Multiclasses cannot be used to eliminate the redundancy in this case,
because a multiclass cannot span both LLVM's common .td files and
the backend .td files at the same time.

Change-Id: I879e35042dceea542a5e6776fad23c5e0e69e76b

Differential revision: https://reviews.llvm.org/D44109

llvm-svn: 327121
2018-03-09 12:24:42 +00:00
Nicolai Haehnle
1ebb6681e2 TableGen: Allow arbitrary list values as ranges of foreach
The changes to FieldInit are required to make field references (Def.field)
work inside a ForeachDeclaration: previously, Def.field wasn't resolved
immediately when Def was already a fully resolved DefInit.

Change-Id: I9875baec2fc5aac8c2b249e45b9cf18c65ae699b
llvm-svn: 327120
2018-03-09 12:24:30 +00:00
Nicolai Haehnle
f6565225c2 TableGen: add !isa operation
Change-Id: Iddb724c3ae706d82933a2d82c91d07e0e36b30e3

Differential revision: https://reviews.llvm.org/D44105

llvm-svn: 327117
2018-03-09 12:24:06 +00:00
Ed Maste
517c1e5898 Use ellipsis ... to indicate omitted commands
In an example like "clang -fxray-instrument .." the .. could be confused
with a literal .. (parent directory), which is used in commands like
"cmake -GNinja .."

llvm-svn: 327000
2018-03-08 13:52:04 +00:00
Andrea Di Biagio
355fd6f55a Add llvm-mca.rst to the table of contents in docs/CommandGuide.
This should fix the documentation error reported by builder llvm-sphinx-docs
(build #16407) after r326998.

llvm-svn: 326999
2018-03-08 13:43:11 +00:00
Andrea Di Biagio
45f0e5261e [llvm-mca] LLVM Machine Code Analyzer.
llvm-mca is an LLVM based performance analysis tool that can be used to
statically measure the performance of code, and to help triage potential
problems with target scheduling models.

llvm-mca uses information which is already available in LLVM (e.g. scheduling
models) to statically measure the performance of machine code in a specific cpu.
Performance is measured in terms of throughput as well as processor resource
consumption. The tool currently works for processors with an out-of-order
backend, for which there is a scheduling model available in LLVM.

The main goal of this tool is not just to predict the performance of the code
when run on the target, but also help with diagnosing potential performance
issues.

Given an assembly code sequence, llvm-mca estimates the IPC (instructions per
cycle), as well as hardware resources pressure. The analysis and reporting style
were mostly inspired by the IACA tool from Intel.

This patch is related to the RFC on llvm-dev visible at this link:
http://lists.llvm.org/pipermail/llvm-dev/2018-March/121490.html

Differential Revision: https://reviews.llvm.org/D43951

llvm-svn: 326998
2018-03-08 13:05:02 +00:00
Jonas Devlieghere
e7334c5b3d [dsymutil] Embed toolchain in dSYM bundle
Allow us to embed the (Xcode) toolchain in the dSYM bundle's property
list.

Differential revision: https://reviews.llvm.org/D44151

llvm-svn: 326994
2018-03-08 10:39:12 +00:00
Tony Tye
8ad3f17b78 [AMDGPU] Update AMDGOUUsage.rst descriptions
- Improve description of XNACK ELF flag.
- Rename all uses of wave to wavefront to be consistent.

Differential Revision: https://reviews.llvm.org/D43983

llvm-svn: 326989
2018-03-08 05:46:01 +00:00
Sanjay Patel
41e5308354 [LangRef] fix formatting in FP descriptions; NFC
This is a clean-up step to reduce diffs ahead of real
changes to the FP semantics as discussed on llvm-dev:
http://lists.llvm.org/pipermail/llvm-dev/2018-February/121444.html

llvm-svn: 326913
2018-03-07 17:18:22 +00:00
Nicolai Haehnle
89d4955b62 TableGen: Add !foldl operation
Change-Id: I63d67bf6e0b315e2d3360e47e3b62c9517f38987
llvm-svn: 326790
2018-03-06 13:49:16 +00:00
Nicolai Haehnle
f579c9339d TableGen: Allow !cast of records, cleanup conversion machinery
Summary:
Distinguish two relationships between types: is-a and convertible-to.
For example, a bit is not an int or vice versa, but they can be
converted into each other (with range checks that you can think of
as "dynamic": unlike other type checks, those range checks do not
happen during parsing, but only once the final values have been
established).

Actually converting initializers between types is subtle: even
when values of type A can be converted to type B (e.g. int into
string), it may not be possible to do so with a concrete initializer
(e.g., a VarInit that refers to a variable of type int cannot
be immediately converted to a string).

For this reason, distinguish between getCastTo and convertInitializerTo:
the latter implements the actual conversion when appropriate, while
the former will first try to do the actual conversion and fall back
to introducing a !cast operation so that the conversion will be
delayed until variable references have been resolved.

To make the approach of adding !cast operations to work, !cast needs
to fallback to convertInitializerTo when the special string <-> record
logic does not apply.

This enables casting records to a subclass, although that new
functionality is only truly useful together with !isa, which will be
added in a later change.

The test is removed because it uses !srl on a bit sequence,
which cannot really be supported consistently, but luckily
isn't used anywhere either.

Change-Id: I98168bf52649176654ed2ec61a29bdb29970cfe7

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D43753

llvm-svn: 326785
2018-03-06 13:48:39 +00:00
Nicolai Haehnle
44c4846682 TableGen: Reimplement !foreach using the resolving mechanism
Summary:
This changes the syntax of !foreach so that the first "parameter" is
a new syntactic variable: !foreach(x, lst, expr) will define the
variable x within the scope of expr, and evaluation of the !foreach
will substitute elements of the given list (or dag) for x in expr.

Aside from leading to a nicer syntax, this allows more complex
expressions where x is deeply nested, or even constant expressions
in which x does not occur at all.

!foreach is currently not actually used anywhere in trunk, but I
plan to use it in the AMDGPU backend. If out-of-tree targets are
using it, they can adjust to the new syntax very easily.

Change-Id: Ib966694d8ab6542279d6bc358b6f4d767945a805

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits, tpr

Differential Revision: https://reviews.llvm.org/D43651

llvm-svn: 326705
2018-03-05 15:21:04 +00:00
Florian Hahn
d312d1153a [Docs] Add LLVM for Grad Students to Contributing page.
Adrian Sampson's blog post provides a good and relatively up-do-date
introduction to LLVM. I think this post could be helpful for people wanting
to get started with LLVM.

Reviewers: asb, tonic, silvas, probinson, kristof.beyls, rengolin

Reviewed By: rengolin

Differential Revision: https://reviews.llvm.org/D42904

llvm-svn: 326576
2018-03-02 14:35:02 +00:00
Martin Storsjo
a857601765 [AArch64] Add support for secrel add/load/store relocations for COFF
Differential Revision: https://reviews.llvm.org/D43288

llvm-svn: 326480
2018-03-01 20:42:28 +00:00
Saleem Abdulrasool
8c60842d3a build: add the ability to create a symlink for dsymutil
Add a `LLVM_INSTALL_CCTOOLS_SYMLINKS` to mirror
`LLVM_INSTALL_BINUTILS_SYMLINKS`.  For now, this allows us to create
symlinks for `dsymutil` to `llvm-dsymutil`.  This option is off by
default, but the user can enable it.

llvm-svn: 326381
2018-02-28 23:00:50 +00:00
Scott Linder
03316a5291 [DebugInfo] Support DWARF v5 source code embedding extension
In DWARF v5 the Line Number Program Header is extensible, allowing values with
new content types. In this extension a content type is added,
DW_LNCT_LLVM_source, which contains the embedded source code of the file.

Add new optional attribute for !DIFile IR metadata called source which contains
source text. Use this to output the source to the DWARF line table of code
objects. Analogously extend METADATA_FILE in Bitcode and .file directive in ASM
to support optional source.

Teach llvm-dwarfdump and llvm-objdump about the new values. Update the output
format of llvm-dwarfdump to make room for the new attribute on file_names
entries, and support embedded sources for the -source option in llvm-objdump.

Differential Revision: https://reviews.llvm.org/D42765

llvm-svn: 325970
2018-02-23 23:01:06 +00:00
Hans Wennborg
740ebeb8fa Support for the mno-stack-arg-probe flag
Adds support for this flag. There is also another piece for clang
(separate review). More info:
https://bugs.llvm.org/show_bug.cgi?id=36221

By Ruslan Nikolaev!

Differential Revision: https://reviews.llvm.org/D43107

llvm-svn: 325900
2018-02-23 13:46:25 +00:00
Nicolai Haehnle
fd97bfd063 TableGen: Add !size operation
Summary:
Returns the size of a list. I have found this to be rather useful in some
development for the AMDGPU backend where we could simplify our .td files
by concatenating list<LLVMType> for complex intrinsics. Doing so requires
us to compute the position argument for LLVMMatchType.

Basically, the usage is in a pattern that looks somewhat like this:

    list<LLVMType> argtypes =
        !listconcat(base,
                    [llvm_any_ty, LLVMMatchType<!size(base)>]);

Change-Id: I360a0b000fd488d18bea412228230fd93722bd2c

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits, tpr

Differential Revision: https://reviews.llvm.org/D43553

llvm-svn: 325883
2018-02-23 10:46:07 +00:00
Matt Morehouse
d05a121e48 [libFuzzer] Include TEMP_MAX_LEN in Fuzzer::PrintStats.
Reviewers: kcc

Reviewed By: kcc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D43597

llvm-svn: 325817
2018-02-22 19:00:17 +00:00
Dylan McKay
ab1efa5f6d Add default address space for functions to the data layout (1/3)
Summary:
This adds initial support for letting targets specify which address
spaces their functions should reside in by default.

If a function is created by a frontend, it will get the default address space specified in the DataLayout, unless the frontend explicitly uses a more general `llvm::Function` constructor. Function address spaces will become a part of the bitcode and textual IR forms, as we do not have access to a data layout whilst parsing LL.

It will be possible to write IR that explicitly has `addrspace(n)` on a function. In this case, the function will reside in the specified space, ignoring the default in the DL.

This is the first step towards placing functions into the correct
address space for Harvard architectures.

Full patchset
* Add program address space to data layout D37052
* Require address space to be specified when creating functions D37054
* [clang] Require address space to be specified when creating functions D37057

Reviewers: pcc, arsenm, kparzysz, hfinkel, theraven

Reviewed By: theraven

Subscribers: arichardson, simoncook, rengolin, wdng, uabelho, bjope, asb, llvm-commits

Differential Revision: https://reviews.llvm.org/D37052

llvm-svn: 325479
2018-02-19 09:56:22 +00:00
Konstantin Zhuravlyov
65fd4d6316 AMDGPU: Bring elf flags in sync with the spec
- Add MACH flags
- Add XNACK flag
- Add reserved flags
- Minor cleanups in docs

Differential Revision: https://reviews.llvm.org/D43356

llvm-svn: 325399
2018-02-16 22:33:59 +00:00
Pablo Barrio
e5fbe2c41d [ARM] Allow 64- and 128-bit types with 't' inline asm constraint
Summary:
In LLVM, 't' selects a floating-point/SIMD register and only supports
32-bit values. This is appropriately documented in the LLVM Language
Reference Manual. However, this behaviour diverges from that of GCC, where
't' selects the s0-s31 registers and its qX and dX variants depending on
additional operand modifiers (q/P).

For example, the following C code:

#include <arm_neon.h>
float32x4_t a, b, x;
asm("vadd.f32 %0, %1, %2" : "=t" (x) : "t" (a), "t" (b))

results in the following assembly if compiled with GCC:

vadd.f32 s0, s0, s1

whereas LLVM will show "error: couldn't allocate output register for
constraint 't'", since a, b, x are 128-bit variables, not 32-bit.

This patch extends the use of 't' to mean that of GCC, thus allowing
selection of the lower Q vector regs and their D/S variants. For example,
the earlier code will now compile as:

vadd.f32 q0, q0, q1

This behaviour still differs from that of GCC but I think it is actually
more correct, since LLVM picks up the right register type based on the
datatype of x, while GCC would need an extra operand modifier to achieve
the same result, as follows:

asm("vadd.f32 %q0, %q1, %q2" : "=t" (x) : "t" (a), "t" (b))

Since this is only an extension of functionality, existing code should not
be affected by this change. Note that operand modifiers q/P are already
supported by LLVM, so this patch should suffice to support inline
assembly with constraint 't' originally built for GCC.

Reviewers: grosbach, rengolin

Reviewed By: rengolin

Subscribers: rogfer01, efriedma, olista01, aemerson, javed.absar, eraman, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D42962

llvm-svn: 325244
2018-02-15 14:44:22 +00:00
Elena Demikhovsky
966bb89b1a Adding a width of the GEP index to the Data Layout.
Making a width of GEP Index, which is used for address calculation, to be one of the pointer properties in the Data Layout.
p[address space]:size:memory_size:alignment:pref_alignment:index_size_in_bits.
The index size parameter is optional, if not specified, it is equal to the pointer size.

Till now, the InstCombiner normalized GEPs and extended the Index operand to the pointer width.
It works fine if you can convert pointer to integer for address calculation and all registered targets do this.
But some ISAs have very restricted instruction set for the pointer calculation. During discussions were desided to retrieve information for GEP index from the Data Layout.
http://lists.llvm.org/pipermail/llvm-dev/2018-January/120416.html

I added an interface to the Data Layout and I changed the InstCombiner and some other passes to take the Index width into account.
This change does not affect any in-tree target. I added tests to cover data layouts with explicitly specified index size.

Differential Revision: https://reviews.llvm.org/D42123

llvm-svn: 325102
2018-02-14 06:58:08 +00:00
Yaxun Liu
c6e831c09d [AMDGPU] Change constant addr space to 4
Differential Revision: https://reviews.llvm.org/D43170

llvm-svn: 325030
2018-02-13 18:00:25 +00:00
Matt Arsenault
006d5f5a93 Reapply "AMDGPU: Add 32-bit constant address space"
This reverts r324494 and reapplies r324487.

llvm-svn: 324747
2018-02-09 16:57:57 +00:00
Yaxun Liu
de0e359a34 [AMDGPU] Updae documentation about address space
llvm-svn: 324617
2018-02-08 15:41:19 +00:00
Jonas Devlieghere
bfe7f62e6b Re-land [dsymutil] Upstream update feature
This commit attempts to re-land the r324480 which was reverted in
r324493 because it broke the Windows bots. For now I disabled the two
update tests on Windows until I'm able to debug this.

Differential revision: https://reviews.llvm.org/D42880

llvm-svn: 324592
2018-02-08 10:48:54 +00:00
Rafael Espindola
f39bd4dd4b Revert "AMDGPU: Add 32-bit constant address space"
This reverts commit r324487.

It broke clang tests.

llvm-svn: 324494
2018-02-07 18:09:35 +00:00
Jonas Devlieghere
6d4147311f Revert dsymutil -update commits
Revert "[dsymutil][test] Check the updated dSYM instead of companion file."
Revert "[dsymutil] Upstream update feature."

llvm-svn: 324493
2018-02-07 17:35:27 +00:00
Marek Olsak
1556374f7f AMDGPU: Add 32-bit constant address space
Note: This is a candidate for LLVM 6.0, because it was planned to be
      in that release but was delayed due to a long review period.

Merge conflict in release_60 - resolution:
    Add "-p6:32:32" into the second (non-amdgiz) string.

Only scalar loads support 32-bit pointers. An address in a VGPR will
fail to compile. That's OK because the results of loads will only be used
in places where VGPRs are forbidden.

Updated AMDGPUAliasAnalysis and used SReg_64_XEXEC.
The tests cover all uses cases we need for Mesa.

Reviewers: arsenm, nhaehnle

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D41651

llvm-svn: 324487
2018-02-07 16:01:00 +00:00
Jonas Devlieghere
09c78f3176 [dsymutil] Upstream update feature.
Now that dsymutil can generate accelerator tables, we can upstream the
update logic that, as the name implies, updates the accelerator tables
in an existing dSYM bundle. In combination with `-minimize` this can be
used to remove redundant .debug_(inlines|pubtypes|pubnames).

Differential revision: https://reviews.llvm.org/D42880

llvm-svn: 324480
2018-02-07 13:51:29 +00:00
Lang Hames
4bb11498d2 [docs] Add out-of-date warnings to the BuildingAJIT tutorial text.
The text will be updated once the ORC API churn dies down.

llvm-svn: 324406
2018-02-06 21:25:20 +00:00
Daniel Neilson
e238cdd2dd Add release note on change to memcpy/memmove/memset builtin signatures
Summary:
The signatures for the builtins @llvm.memcpy, @llvm.memmove, and @llvm.memset
where changed in rL322965. The number of arguments has decreased from five to
four with the removal of the alignment argument. Alignment is now conveyed
by supplying the align parameter attribute on the destination and/or source of
the cpy/move/set.

llvm-svn: 324265
2018-02-05 19:39:38 +00:00
David Blaikie
1f3c1d599a Coding Standards: Document library layering requirements & header isolation.
(I suppose these two pieces could be separated - but seemed related
enough)

As discussed on llvm-dev, this documents the general expectation of how
library layering should be handled. There are a few existing cases where
these constraints are not met, but as with most style guide things -
this is forward looking and provides guidance when cleaning up existing
code, it doesn't immediately require that all previous code be cleaned
up to match. (see: naming conventions, etc)

Differential Revision: https://reviews.llvm.org/D42771

llvm-svn: 324004
2018-02-01 21:03:35 +00:00
Saleem Abdulrasool
dbc48913a8 docs: wordsmith some of the linker option extension
Apply the grammatical improvements suggested by Rafael Avila de
Espindola in post-commit review.

llvm-svn: 323839
2018-01-31 00:16:23 +00:00
Tony Tye
8b0cbc46f7 [AMDGPU] Update relocation documentation and elf flag machine architecture numbers
Differential Revision: https://reviews.llvm.org/D42714

llvm-svn: 323835
2018-01-30 23:59:43 +00:00
Rui Ueyama
01de3d8363 Rename path libpath in .linker-options.
"path" is too generic name for -L or --library-path because a lot of
linker options take paths as arguments. This change renames the option
to avoid confusion.

Differential Revision: https://reviews.llvm.org/D42705

llvm-svn: 323833
2018-01-30 23:49:27 +00:00
Tony Tye
b2b28fd7ec [AMDGPU] Clarify ReqdWorkGroupSize and MaxFlatWorkGroupSize metadata
- If ReqdWorkGroupSize is present it must have all elements >=1.
- If MaxFlatWorkGroupSize must be consistent with ReqdWorkGroupSize.
- Remove FixedWorkGroupSize as now equivalent to ReqdWorkGroupSize.

llvm-svn: 323829
2018-01-30 23:07:10 +00:00
Jonas Devlieghere
7aeeea08b8 [dsymutil] Enable -minimize feature.
Passing -minimize to dsymutil prevents the emission of .debug_inlines,
.debug_pubnames, and .debug_pubtypes in favor of the Apple accelerator
tables.

The actual check in the DWARF linker was added in r323655. This patch
simply enables it.

Differential revision: https://reviews.llvm.org/D42688

llvm-svn: 323812
2018-01-30 19:54:16 +00:00
Saleem Abdulrasool
9599f4edb3 CodeGen: support an extension to pass linker options on ELF
Introduce an extension to support passing linker options to the linker.
These would be ignored by older linkers, but newer linkers which support
this feature would be able to process the linker.

Emit a special discarded section `.linker-option`.  The content of this
section is a pair of strings (key, value).  The key is a type identifier for
the parameter.  This allows for an argument free parameter that will be
processed by the linker with the value being the parameter.  As an example,
`lib` identifies a library to be linked against, traditionally the `-l`
argument for Unix-based linkers with the parameter being the library name.

Thanks to James Henderson, Cary Coutant, Rafael Espinolda, Sean Silva
for the valuable discussion on the design of this feature.

llvm-svn: 323783
2018-01-30 16:29:29 +00:00
Hiroshi Inoue
628b900993 [NFC] fix trivial typos in comments and documents
"to to" -> "to"

llvm-svn: 323628
2018-01-29 05:17:03 +00:00
Vedant Kumar
47f060e72a [LangRef] Update out-of-date instrprof names
llvm-svn: 323575
2018-01-26 23:54:25 +00:00