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Author SHA1 Message Date
Chris Lattner
77d657ae6a add the missing aliases for fp stack cmovs, rdar://8456391 
llvm-svn: 114531
 2010-09-22 04:56:20 +00:00
Chris Lattner
26d11d7501 reimplement elf TLS support in terms of addressing modes, eliminating SegmentBaseAddress. 
llvm-svn: 114529
 2010-09-22 04:39:11 +00:00
Chris Lattner
2e61516c5a Fix rdar://8456364 - llvm-mc rejects '%CS' 
llvm-svn: 114528
 2010-09-22 04:11:10 +00:00
Chris Lattner
2d350c46e2 fix rdar://8456389 - llvm-mc mismatch with 'as' on 'fstp' 
-This line, and those below, will be ignored--

M    test/MC/AsmParser/X86/x86_instructions.s
M    lib/Target/X86/AsmParser/X86AsmParser.cpp

llvm-svn: 114527
 2010-09-22 04:04:03 +00:00
Chris Lattner
f43f09693e fix rdar://8456361 - llvm-mc rejects 'rep movsd' 
llvm-svn: 114526
 2010-09-22 03:50:32 +00:00
Chris Lattner
c81dcbec9e convert the last 4 X86ISD nodes that should have memoperands to have them. 
llvm-svn: 114523
 2010-09-22 01:28:21 +00:00
Chris Lattner
29754fc406 give X86ISD::FNSTCW16m a memoperand, since it touches memory. It only 
can access the stack due to how it is generated though.

llvm-svn: 114522
 2010-09-22 01:11:26 +00:00
Chris Lattner
fee1ac61bd give FP_TO_INT16_IN_MEM and friends a memoperand. They are only 
used with stack slots, but hey, lets be safe.

llvm-svn: 114521
 2010-09-22 01:05:16 +00:00
Chris Lattner
d42791ad4a linux has a different stack alignment than the mac, relax this a bit. 
llvm-svn: 114519
 2010-09-22 00:46:26 +00:00
Chris Lattner
e52da86fab give VZEXT_LOAD a memory operand, it now works with segment registers. 
llvm-svn: 114515
 2010-09-22 00:34:38 +00:00
Chris Lattner
706b9206da revert r114386 now that address modes work correctly, we get a nice 
call through gs-relative memory now.

llvm-svn: 114510
 2010-09-22 00:11:31 +00:00
Chris Lattner
f9861312cb give LCMPXCHG_DAG[8] a memory operand, allowing it to work with addrspace 256/257 
llvm-svn: 114508
 2010-09-21 23:59:42 +00:00
Chris Lattner
08b4ce2b31 filecheckize 
llvm-svn: 114507
 2010-09-21 23:57:27 +00:00
Evan Cheng
1d58965067 OptimizeCompareInstr should avoid iterating pass the beginning of the MBB when the 'and' instruction is after the comparison. 
llvm-svn: 114506
 2010-09-21 23:49:07 +00:00
Jim Grosbach
b2d256e696 Add start of support for MC instruction printer of ARM jump tables. Filling in 
the rest of it is next up.

llvm-svn: 114500
 2010-09-21 23:28:16 +00:00
Owen Anderson
d9fd152c3a Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that this makes 
irrelevant, but add a new test for the new, improved functionality.

llvm-svn: 114494
 2010-09-21 22:51:46 +00:00
Jakob Stoklund Olesen
c5ea87bca7 Build the complement interval dupli after the split intervals instead of 
creating it before and subtracting split ranges.

This way, the SSA update code in LiveIntervalMap can properly create and use new
phi values in dupli. Now it is possible to create split regions where a value
escapes along two different CFG edges, creating phi values outside the split
region.

This is a work in progress and probably quite broken.

llvm-svn: 114492
 2010-09-21 22:32:21 +00:00
Chris Lattner
b227ae4ddb reimplement support for GS and FS relative address space matching 
by having X86DAGToDAGISel::SelectAddr get passed in the parent node
of the operand match (the load/store/atomic op) and having it get
the address space from that, instead of having special FS/GS addr
mode operations that require duplicating the entire instruction set
to support.

This makes FS and GS relative accesses *far* more predictable and
work much better.  It also simplifies the X86 backend a bit, more
to come.

There is still a pending issue with nodes like ISD::PREFETCH and
X86ISD::FLD, which really should be MemSDNode's but aren't.

llvm-svn: 114491
 2010-09-21 22:07:31 +00:00
John Thompson
5c363e0ebf Fixed pr20314-2.c failure, added E, F, p constraint letters. 
llvm-svn: 114490
 2010-09-21 22:04:54 +00:00
Chris Lattner
6543dacfac Rework passing parent pointers into complexpatterns, I forgot 
that complex patterns are matched after the entire pattern has
a structural match, therefore the NodeStack isn't in a useful
state when the actual call to the matcher happens.

llvm-svn: 114489
 2010-09-21 22:00:25 +00:00
Bob Wilson
a22747a563 Move a sign-extend or a zero-extend of a load to the same basic block as the 
load when the type of the load is not legal, even if truncates are not free.
The load is going to be legalized to an extending load anyway.

llvm-svn: 114488
 2010-09-21 21:54:27 +00:00
Bob Wilson
064f6a1a3d Clarify a comment. 
llvm-svn: 114487
 2010-09-21 21:44:14 +00:00
Dan Gohman
008676d2ee Add some utility routines. 
llvm-svn: 114483
 2010-09-21 21:20:13 +00:00
Devang Patel
904f538a7a Add insertAfter. This should have accompanied previous check-in. 
llvm-svn: 114481
 2010-09-21 21:10:42 +00:00
Devang Patel
a6b9c79c24 If only user of a vreg is an copy instruction to export copy of vreg out of current basic block then insert DBG_VALUE so that debug value of the variable is also transfered to new vreg. 
Testcase is in r114476.
This fixes radar 8412415.

llvm-svn: 114478
 2010-09-21 20:56:33 +00:00
Devang Patel
53b709a85c Use FileCheck 
llvm-svn: 114475
 2010-09-21 20:50:32 +00:00
Chris Lattner
7798a97041 correct this logic. 
llvm-svn: 114474
 2010-09-21 20:46:40 +00:00
Owen Anderson
f6dd8e7f5c Reimplement r114460 in target-independent DAGCombine rather than target-dependent, by using 
the predicate to discover the number of sign bits.  Enhance X86's target lowering to provide
a useful response to this query.

llvm-svn: 114473
 2010-09-21 20:42:50 +00:00
Chris Lattner
a911c9ed3a just like they can opt into getting the root of the pattern being 
matched, allow ComplexPatterns to opt into getting the parent node
of the operand being matched.

llvm-svn: 114472
 2010-09-21 20:37:12 +00:00
Chris Lattner
55043ef46a fix a long standing wart: all the ComplexPattern's were being 
passed the root of the match, even though only a few patterns
actually needed this (one in X86, several in ARM [which should
be refactored anyway], and some in CellSPU that I don't feel 
like detangling).   Instead of requiring all ComplexPatterns to
take the dead root, have targets opt into getting the root by
putting SDNPWantRoot on the ComplexPattern.

llvm-svn: 114471
 2010-09-21 20:31:19 +00:00
Jakob Stoklund Olesen
cb8f334578 Refix MSVC9 and upper_bound. It actually needs a fully symmetric comparator. 
llvm-svn: 114469
 2010-09-21 20:16:12 +00:00
Chris Lattner
c153d48869 even though I'm about to rip it out, simplify the address mode stuff 
llvm-svn: 114468
 2010-09-21 19:41:58 +00:00
Chris Lattner
32ec32b690 finish pushing MachinePointerInfo through selectiondags. At this point, 
I think I've audited all uses, so it should be dependable for address spaces,
and the pointer+offset info should also be accurate when there.

llvm-svn: 114464
 2010-09-21 18:58:22 +00:00
Chris Lattner
3dde58c15a convert a couple more places to use the new getStore() 
llvm-svn: 114463
 2010-09-21 18:51:21 +00:00
Chris Lattner
8cdc5e75f7 update a bunch of code to use the MachinePointerInfo version of getStore. 
llvm-svn: 114461
 2010-09-21 18:41:36 +00:00
Owen Anderson
97a8fdc19c When adding the carry bit to another value on X86, exploit the fact that the carry-materialization 
(sbbl x, x) sets the registers to 0 or ~0.  Combined with two's complement arithmetic, we can fold
the intermediate AND and the ADD into a single SUB.

This fixes <rdar://problem/8449754>.

llvm-svn: 114460
 2010-09-21 18:41:19 +00:00
Jakob Stoklund Olesen
d09d4a9693 Don't pollute the global namespace. 
llvm-svn: 114459
 2010-09-21 18:34:17 +00:00
Jakob Stoklund Olesen
375867aa60 MSVC9 does not support upper_bound with an asymmetric comparator. 
llvm-svn: 114455
 2010-09-21 18:24:30 +00:00
Bob Wilson
c4345abcc0 Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON load 
and store intrinsics are represented with MemIntrinsicSDNodes.

llvm-svn: 114454
 2010-09-21 17:56:22 +00:00
Chris Lattner
5f584efd31 eliminate some uses of the getStore overload. 
llvm-svn: 114453
 2010-09-21 17:50:43 +00:00
Chris Lattner
86b3f287ce eliminate an old SelectionDAG::getTruncStore method, propagating 
MachinePointerInfo around more.

llvm-svn: 114452
 2010-09-21 17:42:31 +00:00
Chris Lattner
bf98f86fed eliminate last SelectionDAG::getLoad old entrypoint, on to stores. 
llvm-svn: 114450
 2010-09-21 17:28:52 +00:00
Chris Lattner
8af4fb7aed fix the code that infers SV info to be correct when dealing 
with an indexed load/store that has an offset in the index.

llvm-svn: 114449
 2010-09-21 17:24:05 +00:00
Jakob Stoklund Olesen
03451a0e51 Add LiveInterval::find and use it for most LiveRange searching operations 
instead of calling lower_bound or upper_bound directly.

This cleans up the search logic a bit because {lower,upper}_bound compare
LR->start by default, and it is usually simpler to search LR->end.

Funnelling all searches through one function also makes it possible to replace
the search algorithm with something faster than binary search.

llvm-svn: 114448
 2010-09-21 17:12:18 +00:00
Jakob Stoklund Olesen
73d2940daa Remove dead method. 
llvm-svn: 114447
 2010-09-21 17:12:15 +00:00
Chris Lattner
cdfd993df0 propagate MachinePointerInfo through various uses of the old 
SelectionDAG::getExtLoad overload, and eliminate it.

llvm-svn: 114446
 2010-09-21 17:04:51 +00:00
Jim Grosbach
32cfcf5bba Fix errant printing of [v]ldm instructions that aren't a pop 
llvm-svn: 114445
 2010-09-21 16:45:31 +00:00
Benjamin Kramer
98e1aab5a8 Simplify code. 
llvm-svn: 114444
 2010-09-21 16:41:29 +00:00
Chris Lattner
0d430648ae continue MachinePointerInfo'izing, eliminating use of one of the old 
getLoad overloads.

llvm-svn: 114443
 2010-09-21 16:36:31 +00:00
Chris Lattner
5c0bdf4543 convert dagcombine off the old form of getLoad. This fixes several bugs 
with SVOffset computation.

llvm-svn: 114442
 2010-09-21 16:08:50 +00:00