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Author SHA1 Message Date
Chris Lattner
7a61ff2741 Add a bunch of info about the isel autogenerator. Review appreciated! 
llvm-svn: 23763
 2005-10-16 20:02:19 +00:00
Chris Lattner
35e81a9487 Fill this out some more. Add description of MBB/MF. Fix some broken links, 
turn some broken <a name> into <a href>'s.

llvm-svn: 23762
 2005-10-16 18:31:08 +00:00
Chris Lattner
d1242aeb9a Add a stub for the TargetSubtarget class. Jim, please fill a blurb in here 
when you get a chance.

llvm-svn: 23761
 2005-10-16 17:06:07 +00:00
Chris Lattner
970b6b9d13 Update this significantly, mention subtarget and isel generation support. 
llvm-svn: 23760
 2005-10-16 17:03:22 +00:00
Nate Begeman
723637974b More PPC32 -> PPC changes, as well as merging some classes that were 
redundant after the change.

llvm-svn: 23759
 2005-10-16 05:39:50 +00:00
Chris Lattner
a4dc9eda40 Make the generated code significantly more memory efficient, by using 
SelectNodeTo instead of getTargetNode when possible.

llvm-svn: 23758
 2005-10-16 01:41:58 +00:00
Chris Lattner
1f2ca991c4 update this a little bit to talk about the dag combiner and remove inaccuracies. 
This still doesn't talk about autogen much

llvm-svn: 23757
 2005-10-16 00:36:38 +00:00
Chris Lattner
d22af0377d Fix this logic. 
llvm-svn: 23756
 2005-10-15 22:35:40 +00:00
Chris Lattner
f2d781b780 Add a case we were missing that was causing us to fail CodeGen/PowerPC/rlwinm.ll:test3 
llvm-svn: 23755
 2005-10-15 22:18:08 +00:00
Nate Begeman
0eeb198d81 Remove some dead code now that the dag combiner exists. 
llvm-svn: 23754
 2005-10-15 22:08:02 +00:00
Chris Lattner
4893eb3b04 Remove some dead code: the ORI/ORIS cases are autogen'd. This makes 
SelectIntImmediateExpr dead.

llvm-svn: 23753
 2005-10-15 22:06:18 +00:00
Chris Lattner
4e08151e9b prune #includes 
llvm-svn: 23752
 2005-10-15 21:58:54 +00:00
Chris Lattner
6f97b0bb81 These instructions are now autogenerated 
llvm-svn: 23751
 2005-10-15 21:44:56 +00:00
Chris Lattner
114941504c Add a pattern for FSQRTS 
llvm-svn: 23750
 2005-10-15 21:44:15 +00:00
Chris Lattner
c9479e899a remove dead code 
llvm-svn: 23749
 2005-10-15 21:40:12 +00:00
Chris Lattner
5a4ed7e8ab Implement the last major missing piece in the DAG isel generator: when emitting 
a pattern match, make sure to emit the (minimal number of) type checks that
verify the pattern matches this specific instruction.  This allows FMA32
patterns to not match double expressions for example.

llvm-svn: 23748
 2005-10-15 21:34:21 +00:00
Chris Lattner
346dc6fed1 Use getExtLoad here instead of getNode, as extloads produce two values. This 
fixes a legalize failure on SPASS for itanium.

llvm-svn: 23747
 2005-10-15 20:24:07 +00:00
Chris Lattner
b632f70353 remove broken SRA/rlwimi case 
llvm-svn: 23746
 2005-10-15 19:04:48 +00:00
Chris Lattner
d3946bbea6 Rename PPC32*.h to PPC*.h 
This completes the grand PPC file renaming

llvm-svn: 23745
 2005-10-14 23:59:06 +00:00
Chris Lattner
e870e24352 Merge PPCJITInfo.h and PPC32JITInfo.h. Note that the PowerPCJITInfo 
and PPC32JITInfo classes should be merged.

llvm-svn: 23744
 2005-10-14 23:53:41 +00:00
Chris Lattner
0405f3388f Rename PowerPC*.h to PPC*.h 
llvm-svn: 23743
 2005-10-14 23:51:18 +00:00
Chris Lattner
7bcc93b6c1 Rename PowerPCInstrBuilder.h -> PPC* 
llvm-svn: 23742
 2005-10-14 23:45:43 +00:00
Chris Lattner
4857375695 Nuke the PowerPCTargetMachine.h header. Note that the PowerPCTargetMachine 
still should be merged into the PPC32TargetMachine class

llvm-svn: 23741
 2005-10-14 23:44:05 +00:00
Chris Lattner
11127fcf98 Rename PowerPC*.td -> PPC*.td 
llvm-svn: 23740
 2005-10-14 23:40:39 +00:00
Chris Lattner
841f66a2d3 These are dead 
llvm-svn: 23739
 2005-10-14 23:38:51 +00:00
Chris Lattner
612940b7b0 Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td 
llvm-svn: 23738
 2005-10-14 23:37:35 +00:00
Chris Lattner
0250038010 Like the comment says... 
llvm-svn: 23737
 2005-10-14 22:48:24 +00:00
Chris Lattner
1f9360318d Nuke PowerPCInstrFormats.h, its contents are dead. Remove the definitions 
from the .td file that correspond to it

llvm-svn: 23736
 2005-10-14 22:44:13 +00:00
Nate Begeman
3b6c2df603 Properly split f32 and f64 into separate register classes for scalar sse fp 
fixing a bunch of nasty hackery

llvm-svn: 23735
 2005-10-14 22:06:00 +00:00
Nate Begeman
27cce12802 Remove an unnecsesary file. PPC32 and PPC64 share architected registers. 
We will decide with subtarget support whether we ever use an i64 register
class.

llvm-svn: 23734
 2005-10-14 18:58:46 +00:00
Chris Lattner
664dd0c80e add the integer truncate/extension operations 
llvm-svn: 23733
 2005-10-14 06:40:20 +00:00
Chris Lattner
19cff97f32 Make sure targets depend on TargetSelectionDAG.td 
llvm-svn: 23732
 2005-10-14 06:31:58 +00:00
Chris Lattner
102b6e76e6 These are now autogenerated 
llvm-svn: 23731
 2005-10-14 06:26:29 +00:00
Chris Lattner
3aa7a188b9 Now that we have int/fp lattice values, implement the SDTCisOpSmallerThanOp 
type constraint.  This lets tblgen realize that it doesn't need any dynamic
type checks for fextend/fround on PPC (and many other targets), because there
are only two fp types.

llvm-svn: 23730
 2005-10-14 06:25:00 +00:00
Chris Lattner
28621890d9 Fairly serious rework of the typing code to add new int/fp lattice values. 
Overall, no functionality change yet though.

llvm-svn: 23729
 2005-10-14 06:12:03 +00:00
Chris Lattner
c5dbaceaee simplify the code a bit 
llvm-svn: 23728
 2005-10-14 05:08:37 +00:00
Chris Lattner
35002513b5 Add patterns for FP round/extend 
llvm-svn: 23727
 2005-10-14 04:55:50 +00:00
Chris Lattner
1a001d068a add a new SDTCisOpSmallerThanOp type constraint, and implement fround/fextend in terms of it 
llvm-svn: 23726
 2005-10-14 04:55:10 +00:00
Chris Lattner
d83bbd0f14 Add basic support for recognizing a new SDTCisOpSmallerThanOp type constraint 
llvm-svn: 23725
 2005-10-14 04:53:53 +00:00
Chris Lattner
81047cdfc0 Implement a couple of new (important) features. 
1. If an operation has to be int or fp and the target only supports one
   int or fp type, relize that the op has to have that type.
2. If a target has operations on multiple types, do not emit matching code
   for patterns involving those operators, since we do not emit the code to
   check for them yet.  This prevents PPC from generating FP ops currently.

Also move some code around into more logical places.

llvm-svn: 23724
 2005-10-14 04:11:13 +00:00
Chris Lattner
ee8c8e4562 Do not let getLegalValueTypes return a list with duplicates in it 
llvm-svn: 23723
 2005-10-14 03:54:49 +00:00
Nate Begeman
9c6b86dcb4 fold sext_in_reg, sext_in_reg where both have the same VT. This was 
popping up in Fourinarow.

llvm-svn: 23722
 2005-10-14 01:29:07 +00:00
Chris Lattner
99b65b821a Allow $ 
llvm-svn: 23721
 2005-10-14 01:28:34 +00:00
Nate Begeman
c206a2a32a Relax the checking on zextload generation a bit, since as sabre pointed out 
you could be AND'ing with the result of a shift that shifts out all the
bits you care about, in addition to a constant.

Also, move over an add/sub_parts fold from legalize to the dag combiner,
where it works for things other than constants.  Woot!

llvm-svn: 23720
 2005-10-14 01:12:21 +00:00
Chris Lattner
26f6c4de3d Fix errors when compiling with -pedantic 
llvm-svn: 23719
 2005-10-14 00:33:05 +00:00
Chris Lattner
b2db3f50f2 Fix the trunc(load) case, finally allowing crafty and povray to pass 
llvm-svn: 23718
 2005-10-13 22:10:05 +00:00
Chris Lattner
2563394c27 Fix some bugs in (sext (load x)) 
llvm-svn: 23717
 2005-10-13 21:52:31 +00:00
Chris Lattner
3fd6d9358e When ExpandOp'ing a [SZ]EXTLOAD, make sure to remember that the chain 
is also legal.  Add support for ExpandOp'ing raw EXTLOADs too.

llvm-svn: 23716
 2005-10-13 21:44:47 +00:00
Chris Lattner
dc6e47231b Implement PromoteOp for *EXTLOAD, allowing MallocBench/gs to Legalize 
llvm-svn: 23715
 2005-10-13 20:07:41 +00:00
Nate Begeman
d155f7f1c2 Fix the remaining DAGCombiner issues pointed out by sabre. This should fix 
the remainder of the failures introduced by my patch last night.

llvm-svn: 23714
 2005-10-13 18:34:58 +00:00