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52 Commits

Author SHA1 Message Date
Douglas Gregor
f39dd74a3f Fix a bunch of little errors that Clang complains about when its being pedantic 
llvm-svn: 91764
 2009-12-19 07:05:23 +00:00
Lang Hames
9b6e6492ad Moved spill weight calculation out of SimpleRegisterCoalescing and into its own pass: CalculateSpillWeights. 
llvm-svn: 91273
 2009-12-14 06:49:42 +00:00
Lang Hames
deed780bc6 The Indexes Patch. 
This introduces a new pass, SlotIndexes, which is responsible for numbering
instructions for register allocation (and other clients). SlotIndexes numbering
is designed to match the existing scheme, so this patch should not cause any
changes in the generated code.

For consistency, and to avoid naming confusion, LiveIndex has been renamed
SlotIndex.

The processImplicitDefs method of the LiveIntervals analysis has been moved
into its own pass so that it can be run prior to SlotIndexes. This was
necessary to match the existing numbering scheme.

llvm-svn: 85979
 2009-11-03 23:52:08 +00:00
Lang Hames
68c94340cb Stop the iterator in ValueLiveAt from potentially running off the end of the interval. 
llvm-svn: 85599
 2009-10-30 18:12:09 +00:00
Bill Wendling
c0aefdd3db Reapply r85338. 
llvm-svn: 85514
 2009-10-29 17:39:46 +00:00
Bill Wendling
784d38511f Reverting r85338 for now. It's causing a bootstrap failure on PPC darwin9. 
--- Reverse-merging r85338 into '.':
U    lib/CodeGen/SimpleRegisterCoalescing.cpp
U    lib/CodeGen/SimpleRegisterCoalescing.h

llvm-svn: 85454
 2009-10-29 00:22:16 +00:00
Lang Hames
0a985a409a Fixed a bug in the coalescer where intervals were occasionally merged despite a real interference. This fixes rdar://problem/7157961. 
llvm-svn: 85338
 2009-10-27 23:16:58 +00:00
Dan Gohman
5bfc2416fe Factor out LiveIntervalAnalysis' code to determine whether an instruction 
is trivially rematerializable and integrate it into
TargetInstrInfo::isTriviallyReMaterializable. This way, all places that
need to know whether an instruction is rematerializable will get the
same answer.

This enables the useful parts of the aggressive-remat option by
default -- using AliasAnalysis to determine whether a memory location
is invariant, and removes the questionable parts -- rematting operations
with virtual register inputs that may not be live everywhere.

llvm-svn: 83687
 2009-10-09 23:27:56 +00:00
Lang Hames
f6903a7043 Renamed MachineInstrIndex to LiveIndex. 
llvm-svn: 83254
 2009-10-03 04:21:37 +00:00
Evan Cheng
a6d602a5c1 Clean up spill weight computation. Also some changes to give loop induction 
variable increment / decrement slighter high priority. 

This has major impact on some micro-benchmarks. On MultiSource/Applications
and spec tests, it's a minor win. It also reduce 256.bzip instruction count
by 8%, 55 on 164.gzip on i386 / Darwin.

llvm-svn: 82485
 2009-09-21 21:12:25 +00:00
Evan Cheng
fdbecbf039 Remove -new-coalescer-heuristic. It's not useful. 
llvm-svn: 81600
 2009-09-12 02:14:41 +00:00
Lang Hames
e504e61ab5 Replaces uses of unsigned for indexes in LiveInterval and VNInfo with 
a new class, MachineInstrIndex, which hides arithmetic details from
most clients. This is a step towards allowing the register allocator
to update/insert code during allocation.

llvm-svn: 81040
 2009-09-04 20:41:11 +00:00
Chris Lattner
1c0452caeb Change Pass::print to take a raw ostream instead of std::ostream, 
update all code that this affects.

llvm-svn: 79830
 2009-08-23 06:03:38 +00:00
Evan Cheng
51593b91d9 Simplify some more. 
llvm-svn: 76239
 2009-07-17 21:06:58 +00:00
Evan Cheng
ba5b67f66d Simplify the coalescer (finally!) by making LiveIntervals::processImplicitDefs a little more aggressive and teaching liveintervals to make use of isUndef marker on MachineOperands. 
llvm-svn: 76223
 2009-07-17 19:43:40 +00:00
Evan Cheng
7a6b20df7f Let callers decide the sub-register index on the def operand of rematerialized instructions. 
Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right.

llvm-svn: 75900
 2009-07-16 09:20:10 +00:00
Evan Cheng
058f158de0 Rename RemoveCopiesFromValNo to TurnCopiesFromValNoToImpDefs. 
llvm-svn: 73479
 2009-06-16 07:15:05 +00:00
Lang Hames
1a81422fab Update to in-place spilling framework. Includes live interval scaling and trivial rewriter. 
llvm-svn: 72729
 2009-06-02 16:53:25 +00:00
Evan Cheng
a4c868f1d4 Add a smarter heuristic to determine when to coalesce a virtual register with a physical one. More specifically, it avoid tying a virtual register in the loop with a physical register defined / used outside the loop. When it determines it's not profitable, it will use the physical register as the allocation preference instead. 
This is *not* turned on by default. Testing indicates this is just as likely to pessimize code. The main issue seems to be allocation preference doesn't work effectively. That will change once I've taught register allocator "swapping".

llvm-svn: 70503
 2009-04-30 18:39:57 +00:00
Evan Cheng
7ed9ce65f7 ReMaterializeTrivialDef need to trim the live interval to the last kill if the copy kills the source register. This fixes uint64tof64.ll after ARM::MOVi is marked as isAsCheapAsAMove. 
llvm-svn: 63853
 2009-02-05 08:45:04 +00:00
Evan Cheng
7cdc6e4f8c Cross register class coalescing. Not yet enabled. 
llvm-svn: 62832
 2009-01-23 02:15:19 +00:00
Evan Cheng
58488a481f Refactor code. No functionality change. 
llvm-svn: 62573
 2009-01-20 06:44:16 +00:00
Dan Gohman
8271066844 Tidy up #includes, deleting a bunch of unnecessary #includes. 
llvm-svn: 61715
 2009-01-05 17:59:02 +00:00
Evan Cheng
056ef89e68 Remove val# defined by a remat'ed def that is now dead. 
llvm-svn: 58294
 2008-10-27 23:21:01 +00:00
Evan Cheng
14493ffe78 Re-materalized definition instructions may be dead. Whack them. 
llvm-svn: 56352
 2008-09-19 17:38:47 +00:00
Evan Cheng
5c7e3783ef Fix PR2748. Avoid coalescing physical register with virtual register which would create illegal extract_subreg. e.g. 
vr1024 = extract_subreg vr1025, 1
...
vr1024 = mov8rr AH
If vr1024 is coalesced with AH, the extract_subreg is now illegal since AH does not have a super-reg whose sub-register 1 is AH.

llvm-svn: 56118
 2008-09-11 20:07:10 +00:00
Dan Gohman
e1f9be27bc Tidy up several unbeseeming casts from pointer to intptr_t. 
llvm-svn: 55779
 2008-09-04 17:05:41 +00:00
Evan Cheng
b40b710766 Re-apply 55467 with fix. If copy is being replaced by remat'ed def, transfer the implicit defs onto the remat'ed instruction. 
llvm-svn: 55564
 2008-08-30 09:09:33 +00:00
Dan Gohman
8f4d612996 Revert r55467; it causes regressions in UnitTests/Vector/divides, 
Benchmarks/sim/sim, and others on x86-64.

llvm-svn: 55475
 2008-08-28 17:22:54 +00:00
Evan Cheng
28b0b18082 If a copy isn't coalesced, but its src is defined by trivial computation. Re-materialize the src to replace the copy. 
llvm-svn: 55467
 2008-08-28 07:53:51 +00:00
Owen Anderson
58d9213c3a Fix a compile-time regression introduced by my heuristic-changing patch. I forgot 
to multiply the instruction count by a constant factor in a few places, which
caused the register allocator to require many more iterations.

llvm-svn: 53959
 2008-07-23 19:47:27 +00:00
Owen Anderson
7b8947cc31 Change the heuristics used in the coalescer, register allocator, and within 
live intervals itself to use an instruction count approximation that is 
not affected by inserting empty indices.

llvm-svn: 53937
 2008-07-22 22:46:49 +00:00
Evan Cheng
22b431d28f Coalesce copy from one register class to a sub register class. e.g. X86::MOV16to16_. 
llvm-svn: 52480
 2008-06-19 01:39:21 +00:00
Owen Anderson
65cfda30bd The coalescer doesn't need LiveVariables now that we have register use iterators. 
llvm-svn: 51790
 2008-05-30 22:37:27 +00:00
Evan Cheng
44a0a0c8ee After reading memory that's already freed. 
llvm-svn: 49810
 2008-04-16 20:24:25 +00:00
Evan Cheng
c79e80c679 Add comment. 
llvm-svn: 49469
 2008-04-10 08:03:14 +00:00
Evan Cheng
def576f9e6 - More aggressively coalescing away copies whose source is defined by an implicit_def. 
- Added insert_subreg coalescing support.

llvm-svn: 49448
 2008-04-09 20:57:25 +00:00
Evan Cheng
e86caa45cf - Turn copies of implicit_def into implicit_def instructions. 
- Be smarter about coalescing copies from implicit_def.

llvm-svn: 49168
 2008-04-03 16:41:54 +00:00
Evan Cheng
5750c3cd1e Rewrite code that propagate isDead information after a dead copy is coalesced. This remove some ugly spaghetti code and fixed a number of subtle bugs. 
llvm-svn: 48490
 2008-03-18 08:26:47 +00:00
Evan Cheng
02b66c3a32 - Fix a subtle bug in RemoveCopyByCommutingDef. ALR is the live range where the source is defined; BLR is the live range which is defined by the copy. 
If ALR and BLR overlaps and end of BLR extends beyond end of ALR, e.g.                                                                                                 
 A = or A, B                                                                                                                                                            
 ...                                                                                                                                                                    
 B = A                                                                                                                                                                  
 ...                                                                                                                                                                    
 C = A<kill>                                                                                                                                                            
 ...                                                                                                                                                                    
   = B                                                                                                                                                                  
                                                                                                                                                                        
then do not add kills of A to the newly created B interval.
- Also fix some kill info update bug.

llvm-svn: 48141
 2008-03-10 08:11:32 +00:00
Evan Cheng
8f5092bea8 Fix a coalescer bug wrt how dead copy interval is shortened. 
llvm-svn: 47966
 2008-03-05 22:09:42 +00:00
Evan Cheng
18064ddb5b Refactor code. Remove duplicated functions that basically do the same thing as 
findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies.

llvm-svn: 47927
 2008-03-05 00:59:57 +00:00
Evan Cheng
f6d76f2e52 No need for coalescer to update kills. Only copies are coalesced and those instructions will be deleted. Doh. 
llvm-svn: 47749
 2008-02-29 02:50:03 +00:00
Evan Cheng
dd13a96a60 Refactor some code; check if commuteInstruction is able to commute the instruction. 
llvm-svn: 47208
 2008-02-16 02:32:17 +00:00
Evan Cheng
bb357cd8a6 - Removing the infamous r2rMap_ and rep() method. Now the coalescer will update 
register defs and uses after each successful coalescing.
- Also removed a number of hacks and fixed some subtle kill information bugs.

llvm-svn: 47167
 2008-02-15 18:24:29 +00:00
Evan Cheng
d4ddda68fa Initial support for copy elimination by commuting its definition MI. 
PR1877.
A3 = op A2 B0<kill>                                                                                                                                                                            
...                                                                                                                                                                                     
B1 = A3      <- this copy                                                                                                                                                                      
...                                                                                                                                                                                          
   = op A3   <- more uses                                                                                                                                                                      
                                                                                                                                                                                                 
==>                                                                                                                                                                                             
                                                                                                                                                                                            
B2 = op B0 A2<kill>                                                                                                                                                                            
...                                                                                                                                                                                          
B1 = B2      <- now an identify copy                                                                                                                                                           
...                                                                                                                                                                                          
   = op B2   <- more uses

This speeds up FreeBench/neural by 29%, Olden/bh by 12%, oopack_v1p8 by 53%.

llvm-svn: 47046
 2008-02-13 03:01:43 +00:00
Dan Gohman
cabaec582f Rename MRegisterInfo to TargetRegisterInfo. 
llvm-svn: 46930
 2008-02-10 18:45:23 +00:00
Chris Lattner
ad9a6ccb83 Remove attribution from file headers, per discussion on llvmdev. 
llvm-svn: 45418
 2007-12-29 20:36:04 +00:00
Dan Gohman
80af3e255d Add explicit keywords, and fix a minor typo that they uncovered. 
llvm-svn: 45034
 2007-12-14 15:41:34 +00:00
Evan Cheng
45c08c8337 Switch over to MachineLoopInfo. 
llvm-svn: 44838
 2007-12-11 02:09:15 +00:00