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Commit Graph

216897 Commits

Author SHA1 Message Date
Sanjay Patel
70de13d74d [InstCombine] eliminate sext and/or trunc if value has enough signbits
If we have enough signbits in a source value, we can skip an
intermediate cast for a trunc+sext pair:
https://alive2.llvm.org/ce/z/A_mQt-

This is the original problem shown in:
https://llvm.org/PR49543

There's a test that shows we transformed what used to be
a pair of shifts, so that suggests we could add another
ComputeNumSignBits fold starting from a shift.

There does not appear to be any change in compile-time
from the extra analysis:
https://llvm-compile-time-tracker.com/compare.php?from=3d2c9069dcafd0cbb641841aa3dd6e851fb7d760&to=b9513cdf2419704c7bb0c3a02a9ca06aae13d902&stat=instructions

Differential Revision: https://reviews.llvm.org/D103617
2021-06-03 13:58:19 -04:00
Philip Reames
40fae0516b [LoopUnroll] Eliminate PreserveOnlyFirst parameter [nfc]
This is a first step towards simplifying the transform interface to be less error prone. The basic idea is that querying SCEV is cheap (since it's cached) and we can just check for properties related to branch folding in the transform method instead of relying on the heuristic part to pass everything in correctly.

Differential Revision: https://reviews.llvm.org/D103584
2021-06-03 10:33:14 -07:00
Alexey Bataev
f6f8e494fa [SLP]Improve cost estimation/emission of externally used extractelements.
No need to recalculate the cost of extractelements, just no need to
compensate the cost of all extractelements, need to check before if this
is actually going to be removed at the vectorization. Also, no need to
 generate new extractelement instruction, we may just regenerate the
 original one. It may improve the final vectorization.

Differential Revision: https://reviews.llvm.org/D102933
2021-06-03 10:26:59 -07:00
Philip Reames
9a439fccf9 [LoopUnroll] Reorder code to max dom tree update more obvious [nfc]
This cleans up the unroll action into two phases. Phase 1 does the mechanical act of unrolling, and leaves all conditional branches in place. Phase 2 optimizes away some of the conditional branches and then simplifies the loop. The primary benefit of the reordering is that we can delete some special cases dom tree update logic.

Differential Revision: https://reviews.llvm.org/D103561
2021-06-03 10:19:56 -07:00
Jinsong Ji
260f2f7956 add ppc_fp128 bitcode writer testcase 2021-06-03 17:18:11 +00:00
Alexey Bataev
ad13ea9e36 [SLP]Allow to reorder nodes with >2 scalar values.
tryToVectorizeList function allows to reorder only 2 scalars. Patch
allows to reorder >2 scalars. Also, to avoid possible regressions, it
allows extra vectorization of the remaining parts of the scalars
elements if possible.

Part of D57059.

Differential Revision: https://reviews.llvm.org/D103247
2021-06-03 10:01:36 -07:00
Nikita Popov
03374e8fbc [Tests] Add missing include (NFC)
Fix one more missing include in a unit test after
983565a6fe4a9f40c7caf82b65c650c20dbcc104.
2021-06-03 18:58:29 +02:00
Harald van Dijk
bf923c5f53 [SLP] Avoid std::stable_sort(properlyDominates()).
As noticed by NAKAMURA Takumi back in 2017, we cannot use
properlyDominates for std::stable_sort as properlyDominates only
partially orders blocks. That is, for blocks A, B, C, D, where A
dominates B and C dominates D, we have A == C, B == C, but A < B. This
is not a valid comparison function for std::stable_sort and causes
different results between libstdc++ and libc++. This change uses DFS
numbering to give deterministic results for all reachable blocks.
Unreachable blocks are ignored already, so do not need special
consideration.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D103441
2021-06-03 17:51:52 +01:00
Nikita Popov
df6a63d5f1 [MC] Add missing include (NFC)
Try to fix buildbots after 983565a6fe4a9f40c7caf82b65c650c20dbcc104.
2021-06-03 18:50:00 +02:00
Nikita Popov
1c866d4e4f [ADT] Move DenseMapInfo for ArrayRef/StringRef into respective headers (NFC)
This is a followup to D103422. The DenseMapInfo implementations for
ArrayRef and StringRef are moved into the ArrayRef.h and StringRef.h
headers, which means that these two headers no longer need to be
included by DenseMapInfo.h.

This required adding a few additional includes, as many files were
relying on various things pulled in by ArrayRef.h.

Differential Revision: https://reviews.llvm.org/D103491
2021-06-03 18:34:36 +02:00
Jeremy Morse
5cea2689df Revert "[DebugInstrRef][2/3] Track PHI values through register coalescing"
This reverts commit ae4303b42cfa5c8c14e3fff67d73af2f154aea9a.

Expensive checks buildbot has found a problem with this:

  https://lab.llvm.org/buildbot/#/builders/16/builds/11863
2021-06-03 17:16:58 +01:00
Rosie Sumpter
aa63068e95 [CostModel][AArch64] Add tests for ctlz, ctpop and cttz. NFC.
Differential Revision: https://reviews.llvm.org/D103601
2021-06-03 17:12:22 +01:00
Jeremy Morse
8e310e3825 [DebugInstrRef][2/3] Track PHI values through register coalescing
In the instruction referencing variable location model, we store variable
locations that point at PHIs in MachineFunction during register
allocation. Unfortunately, register coalescing can substantially change
the locations of registers, and so that PHI-variable-location side table
needs maintenence during the pass.

This patch builds an index from the side table, and whenever a vreg gets
coalesced into another vreg, update the index to record the new vreg that
the PHI happens in. It also accepts a limited range of subregister
coalescing, for example merging a subregister into a larger class.

Differential Revision: https://reviews.llvm.org/D86813
2021-06-03 17:06:51 +01:00
Hsiangkai Wang
7e79d4f8dc [RISCV] Precommit a test case to show overwriting vector frame objects. 2021-06-03 23:25:45 +08:00
Hamza Mahfooz
05cf43064c [Matrix] Preserve existing fast-math flags during lowering
This patch makes it so, floating-point instructions created in
LowerMatrixIntrinsics retain fast-math flags from instructions that are
higher up the chain.

Fixes https://bugs.llvm.org/show_bug.cgi?id=49738

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D103233
2021-06-03 15:29:31 +01:00
James Henderson
902f3f26fd [lit] Fix testing of standalone clang and lld builds
In such cases, the executables are not in the llvm_tools_dir directory, so we need to look in the other search locations. Previously, they were found via the PATH, but this was disabled by default in commit rGa1e6565.

Depends on D103154.

Reviewed By: thopre

Differential Revision: https://reviews.llvm.org/D103156
2021-06-03 13:57:50 +01:00
David Green
71fdc2f62c [ARM] Prettify gather/scatter debug comments. NFC 2021-06-03 12:33:03 +01:00
Fraser Cormack
2679dff453 [RISCV] Reserve an emergency spill slot for any RVV spills
This patch addresses an issue in which fixed-length (VLS) vector RVV
code could fail to reserve an emergency spill slot for their frame index
elimination. This is because we were previously only reserving a spill
slot when there were `scalable-vector` frame indices being used.
However, fixed-length codegen uses regular-type frame indices if it
needs to spill.

This patch does the fairly brute-force method of checking ahead of time
whether the function contains any RVV spill instructions, in which case
it reserves one slot. Note that the second RVV slot is still only
reserved for `scalable-vector` frame indices.

This unfortunately causes quite a bit of churn in existing tests, where
we chop and change stack offsets for spill slots.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D103269
2021-06-03 10:44:34 +01:00
Fraser Cormack
69bae66509 [CodeGen] Fix a scalable-vector crash in VSELECT legalization
The `DAGTypeLegalizer::WidenVSELECTMask` function is not (yet) ready for
scalable vector types, and has numerous places in which it tries to grab
either the fixed size or number of elements of its types.

I believe that it should be possible to update this method to properly
account for scalable-vector types, but we don't have test cases for
that; RISC-V bails out early on as it has legal i1 vector masks. As
such, this patch just prevents it from crashing.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D103536
2021-06-03 10:24:55 +01:00
David Spickett
b2313e8eb4 [clang][ARM] Remove arm2/3/6/7m CPU names
These legacy CPUs are known to clang but not llvm.
Their use was ignored by llvm and it would print a
warning saying it did not recognise them.

However because some of them are default CPUs for their
architecture, you would get those warnings even if you didn't
choose a cpu explicitly.
(now those architectures will default to a "generic" CPU)

Information is thin on the ground for these older chips
so this is the best I could find:
https://en.wikichip.org/wiki/acorn/microarchitectures/arm2
https://en.wikichip.org/wiki/acorn/microarchitectures/arm3
https://en.wikichip.org/wiki/arm_holdings/microarchitectures/arm6
https://en.wikichip.org/wiki/arm_holdings/microarchitectures/arm7

Final part of fixing https://bugs.llvm.org/show_bug.cgi?id=50454.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D103028
2021-06-03 08:55:44 +00:00
Fraser Cormack
5419f2ccbb [ValueTypes] Fix scalable-vector changeExtendedVectorTypeToInteger
The attached tests check for the regression in DAGCombiner's
`visitVSELECT`, which may call this method.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D103534
2021-06-03 09:36:56 +01:00
Arthur Eubanks
28eb346938 [DFSan] Properly set argument ABI attributes
Calls must properly match argument ABI attributes with the callee.

Found via D103412.

Reviewed By: morehouse

Differential Revision: https://reviews.llvm.org/D103414
2021-06-02 22:24:46 -07:00
Eli Friedman
de8fa43417 [AArch64] Add regression test for missed bfi optimization.
(See https://reviews.llvm.org/D60358 for the transform that breaks this
case.)
2021-06-02 17:38:51 -07:00
James Y Knight
4047585dc6 Fix llvm/test/tools/llvm-dwp/X86/type_dedup_v5.test
It was writing files to the source dir after
316da543af14fb4b40ef0377fe770f430745f5ea.
2021-06-02 20:28:26 -04:00
Amy Huang
a1e25da87d Recommit "Fix tmp files being left on Windows builds." with a fix for
incorrect std::string use. (Also remove redundant call to
RemoveFileOnSignal.)

Clang writes object files by first writing to a .tmp file and then
renaming to the final .obj name. On Windows, if a compile is killed
partway through the .tmp files don't get deleted.

Currently it seems like RemoveFileOnSignal takes care of deleting the
tmp files on Linux, but on Windows we need to call
setDeleteDisposition on tmp files so that they are deleted when
closed.

This patch switches to using TempFile to create the .tmp files we write
when creating object files, since it uses setDeleteDisposition on Windows.
This change applies to both Linux and Windows for consistency.

Differential Revision: https://reviews.llvm.org/D102876

This reverts commit 20797b129f844d4b12ffb2b12cf33baa2d42985c.
2021-06-02 16:50:37 -07:00
Fangrui Song
bc783ac6a6 [InstrProfiling] Delete linkage/visibility toggling for Windows
The linkage/visibility of `__profn_*` variables are derived
from the profiled functions.

    extern_weak => linkonce
    available_externally => linkonce_odr
    internal => private
    extern => private
    _ => unchanged

The linkage/visibility of `__profc_*`/`__profd_*` variables are derived from
`__profn_*` with linkage/visibility wrestling for Windows.

The changes can be folded to the following without changing semantics.

```
if (TT.isOSBinFormatCOFF() && !NeedComdat) {
  Linkage = GlobalValue::InternalLinkage;
  Visibility = GlobalValue::DefaultVisibility;
}
```

That said, I think we can just delete the code block.

An extern/internal function will now use private `__profc_*`/`__profd_*`
variables, instead of internal ones. This saves some symbol table entries.

A non-comdat {linkonce,weak}_odr function will now use hidden external
`__profc_*`/`__profd_*` variables instead of internal ones.  There is potential
object file size increase because such symbols need `/INCLUDE:` directives.
However such non-comdat functions are rare (note that non-comdat weak
definitions don't prevent duplicate definition error).

The behavior changes match ELF.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D103355
2021-06-02 16:49:54 -07:00
Fangrui Song
dfa955b8df [MC] Delete unneeded MCAsmParser &Parser 2021-06-02 16:10:18 -07:00
Fangrui Song
5ddfda0ee0 [MC] Change "unexpected tokens" to "expected newline" and remove unneeded "in .xxx directive" 2021-06-02 16:08:05 -07:00
Dave Lee
338bfa615d [coro] Preserve scope line for compiler generated functions
Coro-split functions with an active suspend point have their scope line set to
the line of the suspend point. However for compiler generated functions, this
results in debug info with unconventional results: a file named
`<compiler-generated>` with a non-zero line number. The convention for
`<compiler-generated>` is that the line number is zero.

This change propagates the scope line only for non-compiler generated
functions.

Differential Revision: https://reviews.llvm.org/D102412
2021-06-02 15:57:12 -07:00
Anshil Gandhi
6e3fdd4353 [PowerPC] [GlobalISel] Implementation of formal arguments lowering in the IRTranslator for the PPC backend
Differential Revision: https://reviews.llvm.org/D99812
2021-06-02 16:46:39 -06:00
Anshil Gandhi
22bd1bad32 Revert "Differential Revision: https://reviews.llvm.org/D99812"
This reverts commit c729f2a48a6ef6b20554494c5630082c89c3680c.
2021-06-02 16:36:00 -06:00
Simon Pilgrim
7b5702378b [X86][SSE] combineScalarToVector - only reuse broadcasts for scalar_to_vector if the source operands scalar types match
We were hitting an issue when the scalar_to_vector source was being implicitly truncated (in this case to i8 to vXi1) but we were also using the i8 source in a broadcast to a vXi8 value.

Fixes PR50374
2021-06-02 22:05:40 +01:00
Min-Yih Hsu
fc07b73b83 [CodeGen][NFC] Remove unused virtual function
`TargetFrameLowering::emitCalleeSavedFrameMoves` with 4 arguments is not
used anywhere in CodeGen. Thus it shouldn't be exposed as a virtual
function. NFC.

Differential Revision: https://reviews.llvm.org/D103328
2021-06-02 13:11:12 -07:00
Anshil Gandhi
59cb7dced8 Differential Revision: https://reviews.llvm.org/D99812 2021-06-02 14:09:52 -06:00
LLVM GN Syncbot
bb16d7139c [gn build] Port 05d164b25c40 2021-06-02 19:59:40 +00:00
Kim-Anh Tran
c835b7a765 [llvm-dwp] Add support for rnglists and loclists
This patch updates llvm-dwp to include rnglists and loclists
when parsing debug sections.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D101894
2021-06-02 12:31:35 -07:00
Kim-Anh Tran
8448b16d77 [llvm-dwp] Add support for DWARFv5 type units ...
This patch adds support for DWARFv5 type units: parsing from
the .debug_info section, and writing index to the type unit index.
Previously, the type units were part of the .debug_types section
which is no longer used in DWARFv5.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D101818
2021-06-02 12:24:08 -07:00
Kim-Anh Tran
98cb2ee214 [llvm-dwp] Adding support for v5 index writing
This patch adds general support for DWARFv5 index writing.
In particular, this means only allowing inputs with one version,
either DWARFv5 or DWARFv4.

This patch adds the .debug_macro section as an example,
but the DWARFv5 type support and loc and rangelists are still
missing (and upcoming).

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D102315
2021-06-02 12:21:31 -07:00
Sanjay Patel
e3cc7798ec [SDAG] allow cast folding for vector sext-of-setcc with signed compare
This extends 434c8e013a2c and ede3982792df to handle signed
predicates by sign-extending the setcc operands.

This is not shown directly in https://llvm.org/PR50055 ,
but the pattern is visible by changing the unsigned convert
to signed in the source code.
2021-06-02 15:05:02 -04:00
Kim-Anh Tran
73a355d20e [llvm-dwp] Skip type unit debug info sections
This patch makes llvm-dwp skip debug info sections that may not be encoding a compile unit.
In DWARF5, debug info sections are also used for type units. As in preparation to support type units,
make llvm-dwp aware of other uses of debug info sections but skip them for now.

The patch first records all .debug_info sections, then goes through them one by one and records
the cu debug info section for writing the index unit, and copies that section to the final dwp output
info section. If it's not a compile unit, skip.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D102312
2021-06-02 11:48:10 -07:00
Andrew Browne
8d89443789 Fix dfsan handling of musttail calls.
Without this change, a callsite like:
  [[clang::musttail]] return func_call(x);
will cause an error like:
  fatal error: error in backend: failed to perform tail call elimination
  on a call site marked musttail
due to DFSan inserting instrumentation between the musttail call and
the return.

Reviewed By: stephan.yichao.zhao

Differential Revision: https://reviews.llvm.org/D103542
2021-06-02 11:38:35 -07:00
Stefan Pintilie
7e5fc9d052 [NFC] Remove variable that was set but not used.
The buildbot ppc64le-lld-multistage-test has been failing because the variable
Tag in Waymaking.h is set but not used. This patch removes that varaible.
2021-06-02 13:20:32 -05:00
Sanjay Patel
82700eebf2 [x86] add signed compare variant test for PR50055; NFC 2021-06-02 14:15:05 -04:00
Rong Xu
f505b894a2 [SampleFDO] New hierarchical discriminator for FS SampleFDO (ProfileData part)
This patch was split from https://reviews.llvm.org/D102246
[SampleFDO] New hierarchical discriminator for Flow Sensitive SampleFDO
This is mainly for ProfileData part of change. It will load
FS Profile when such profile is detected. For an extbinary format profile,
create_llvm_prof tool will add a flag to profile summary section.
For other format profiles, the users need to use an internal option
(-profile-isfs) to tell the compiler that the profile uses FS discriminators.

This patch also simplified the bit API used by FS discriminators.

Differential Revision: https://reviews.llvm.org/D103041
2021-06-02 10:32:52 -07:00
Sanjay Patel
bb75641fb0 [SDAG] allow more cast folding for vector sext-of-setcc
This is a follow-up to D103280 that eases the use restrictions,
so we can handle the motivating case from:
https://llvm.org/PR50055

The loop code is adapted from similar use checks in
ExtendUsesToFormExtLoad() and SliceUpLoad(). I did not see an
easier way to filter out non-chain uses of load values.

Differential Revision: https://reviews.llvm.org/D103462
2021-06-02 13:14:49 -04:00
Sanjay Patel
c94b1ddd8f [x86] add test for sext-of-setcc; NFC
D103462
2021-06-02 13:14:49 -04:00
Adrian Prantl
38a9864e9c Remove redundant comparisons (NFC) 2021-06-02 09:52:45 -07:00
Nico Weber
511556e3ea [lld/mac] Implement -dead_strip
Also adds support for live_support sections, no_dead_strip sections,
.no_dead_strip symbols.

Chromium Framework 345MB unstripped -> 250MB stripped
(vs 290MB unstripped -> 236M stripped with ld64).

Doing dead stripping is a bit faster than not, because so much less
data needs to be processed:

    % ministat lld_*
    x lld_nostrip.txt
    + lld_strip.txt
        N           Min           Max        Median           Avg        Stddev
    x  10      3.929414       4.07692     4.0269079     4.0089678   0.044214794
    +  10     3.8129408     3.9025559     3.8670411     3.8642573   0.024779651
    Difference at 95.0% confidence
            -0.144711 +/- 0.0336749
            -3.60967% +/- 0.839989%
            (Student's t, pooled s = 0.0358398)

This interacts with many parts of the linker. I tried to add test coverage
for all added `isLive()` checks, so that some test will fail if any of them
is removed. I checked that the test expectations for the most part match
ld64's behavior (except for live-support-iterations.s, see the comment
in the test). Interacts with:
- debug info
- export tries
- import opcodes
- flags like -exported_symbol(s_list)
- -U / dynamic_lookup
- mod_init_funcs, mod_term_funcs
- weak symbol handling
- unwind info
- stubs
- map files
- -sectcreate
- undefined, dylib, common, defined (both absolute and normal) symbols

It's possible it interacts with more features I didn't think of,
of course.

I also did some manual testing:
- check-llvm check-clang check-lld work with lld with this patch
  as host linker and -dead_strip enabled
- Chromium still starts
- Chromium's base_unittests still pass, including unwind tests

Implemenation-wise, this is InputSection-based, so it'll work for
object files with .subsections_via_symbols (which includes all
object files generated by clang). I first based this on the COFF
implementation, but later realized that things are more similar to ELF.
I think it'd be good to refactor MarkLive.cpp to look more like the ELF
part at some point, but I'd like to get a working state checked in first.

Mechanical parts:
- Rename canOmitFromOutput to wasCoalesced (no behavior change)
  since it really is for weak coalesced symbols
- Add noDeadStrip to Defined, corresponding to N_NO_DEAD_STRIP
  (`.no_dead_strip` in asm)

Fixes PR49276.

Differential Revision: https://reviews.llvm.org/D103324
2021-06-02 11:09:26 -04:00
Stephen Tozer
4828a0b136 [LoopStrengthReduce] Ensure that debug intrinsics do not affect LSR's output
During Loop Strength Reduce, if the terminating condition for the loop
is not immediately adjacent to the terminating branch and it has more
than one use, a clone of the condition will be created just before the
terminating branch and will be used as the branch condition. Currently,
whether the instructions are "immediately adjacent" is determined by
checking whether the next instruction after the condition is the
terminating branch; this is incorrect however, as the presence of a
debug intrinsic between the two will result in a change to the output.
This is fixed by using getNextNonDebugInstruction() instead.

Differential Revision: https://reviews.llvm.org/D103033
2021-06-02 15:56:23 +01:00
Arnold Schwaighofer
e4f42951d6 [coro async] Add the swiftasync attribute to the resume partial function
Transfer the swiftasync attribute to the resume partial function according to
suspend.async specification. It's first argument denotes which argument is the
async context.

rdar://71499498

Differential Revision: https://reviews.llvm.org/D103285
2021-06-02 07:44:33 -07:00