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Commit Graph

121919 Commits

Author SHA1 Message Date
Rafael Espindola
7b47047ff9 Use ELFOSABI_NONE instead of ELFOSABI_LINUX.
The doesn't seem to be a difference and ELFOSABI_NONE seems to be far more
common:

* Linux doesn't care when loading and puts ELFOSABI_NONE on core dumps.
* Gold and bfd ld produce files with ELFOSABI_NONE.
* Gold and bfd ld seems to ignore EI_OSABI other than for freebsd.
* Gas puts ELFOSABI_NONE in most .o files.

llvm-svn: 248534
2015-09-24 20:57:24 +00:00
Matt Arsenault
4f500cff99 AMDGPU: Add s_dcache_* instructions
llvm-svn: 248533
2015-09-24 19:52:27 +00:00
Matt Arsenault
304779755d AMDGPU: Add cache invalidation instructions.
These are necessary for implementing mem_fence for
OpenCL 2.0.

The VI assembler tests are disabled since it seems to be
using the wrong encoding or opcode.

llvm-svn: 248532
2015-09-24 19:52:21 +00:00
Matt Arsenault
e10636a9fb AMDGPU: Run mubuf assembler test for CI
llvm-svn: 248531
2015-09-24 19:52:15 +00:00
Chad Rosier
61d0135506 [AArch64] The paired post-increment store instruction has an output register.
The pre- and post-increment version update the base register, but the post-
version was defined incorrectly.  There is no test case as we don't currently
generate these instructions, but I plan on changing that in the near future.

llvm-svn: 248528
2015-09-24 19:21:42 +00:00
Sanjoy Das
f43d5ab867 [IR] Add operand bundles to CallInst and InvokeInst.
Summary:
This change teaches `CallInst`s and `InvokeInst`s to maintain a set of
operand bundles as part of its operands.  `CallInst`s and `InvokeInst`s
with operand bundles co-allocate some space before their `Use` array to
hold meta information about which of its operands are part of an operand
bundle.

The strings corresponding to the bundle tags are interned into
`LLVMContextImpl::BundleTagCache`

This change does not include any parsing / bitcode support.  That's the
next change.

Depends on D12455.

Reviewers: reames, chandlerc, majnemer, dexonsmith, kmod, JosephTremoulet, rnk, bogner

Subscribers: MatzeB, sanjoy, llvm-commits

Differential Revision: http://reviews.llvm.org/D12456

llvm-svn: 248527
2015-09-24 19:14:18 +00:00
Artyom Skrobov
6e485559a5 [ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.def
Currently, the availability of DSP instructions (ACLE 6.4.7) is handled in a
hand-rolled tricky condition block in tools/clang/lib/Basic/Targets.cpp, with
a FIXME: attached.

This patch changes the handling of +t2dsp to be in line with other
architecture extensions.

Following a revert of r248152 and new review comments, this patch also includes
renaming FeatureDSPThumb2 -> FeatureDSP, hasThumb2DSP() -> hasDSP(), etc.
The spelling of "t2dsp" is preserved, pending a further investigation of its
possible external usage.

Differential Revision: http://reviews.llvm.org/D12937

llvm-svn: 248519
2015-09-24 17:31:16 +00:00
Adrian Prantl
e559cd0d5b dsymutil: Fix the condition to distinguish module imports form definitions.
llvm-svn: 248512
2015-09-24 16:10:14 +00:00
James Molloy
52b426c16a [ValueTracking] Teach isKnownNonZero a new trick
If the shifter operand is a constant, and all of the bits shifted out
are known to be zero, then if X is known non-zero at least one
non-zero bit must remain.

llvm-svn: 248508
2015-09-24 16:06:32 +00:00
Benjamin Kramer
2393603214 [objdump] Make iterator operator* return a reference.
This is closer to the expected behavior of an iterator and avoids awkward
warnings from clang's -Wrange-loop-analysis below.

llvm-svn: 248497
2015-09-24 14:52:52 +00:00
Mohammad Shahid
e346495f5c Regression Test: Deletes redundant/invalid test.
Removes absdiff_expand.ll regression test file which is invalid.

Diffrential Revision: http://reviews.llvm.org/D11678

llvm-svn: 248493
2015-09-24 14:37:25 +00:00
Daniel Sanders
ad5cda8a49 [mips] Use PredicateControl for the MSA ASE instructions. NFC.
Reviewers: vkalintiris

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D13092

llvm-svn: 248486
2015-09-24 12:10:23 +00:00
Mohammad Shahid
6a500d5451 Codegen: Fix llvm.*absdiff semantic.
Fixes the overflow case of llvm.*absdiff intrinsic also updats the tests and LangRef.rst accordingly.

Differential Revision: http://reviews.llvm.org/D11678

llvm-svn: 248483
2015-09-24 10:35:03 +00:00
Charlie Turner
4305b8ca2a [InstCombine] Recognize another bswap idiom.
Summary:
The byte-swap recognizer can now notice that this

```
uint32_t bswap(uint32_t x)
{
  x = (x & 0x0000FFFF) << 16 | (x & 0xFFFF0000) >> 16;
  x = (x & 0x00FF00FF) << 8 | (x & 0xFF00FF00) >> 8;
  return x;
}
```
    
is a bswap. Fixes PR23863.

Reviewers: nlewycky, hfinkel, hans, jmolloy, rengolin

Subscribers: majnemer, rengolin, llvm-commits

Differential Revision: http://reviews.llvm.org/D12637

llvm-svn: 248482
2015-09-24 10:24:58 +00:00
Matt Arsenault
099f4c5254 Introduce target hook for optimizing register copies
Allow a target to do something other than search for copies
that will avoid cross register bank copies.

Implement for SI by only rewriting the most basic copies,
so it should look through anything like a subregister extract.

I'm not entirely satisified with this because it seems like
eliminating a reg_sequence that isn't fully used should work
generically for all targets without them having to override
something. However, it seems to be tricky to have a simple
implementation of this without rewriting to invalid  kinds
of subregister copies on some targets.

I'm not sure if there is currently a generic way to easily check
if a subregister index would be valid for the current use.
The current set of TargetRegisterInfo::get*Class functions don't
quite behave like I would expect (e.g. getSubClassWithSubReg
returns the maximal register class rather than the minimal), so
I'm not sure how to make the generic test keep searching if
SrcRC:SrcSubReg is a valid replacement for DefRC:DefSubReg. Making
the default implementation to check for simple copies breaks
a variety of ARM and x86 tests by producing illegal subregister uses.

The ARM tests are not actually changed since it should still be using
the same sharesSameRegisterFile implementation, this just relaxes
them to not check for specific registers.

llvm-svn: 248478
2015-09-24 08:36:14 +00:00
Matt Arsenault
fecfb71096 AMDGPU: Return after instruction is processed.
llvm-svn: 248476
2015-09-24 07:51:28 +00:00
Matt Arsenault
8c0e36fede AMDGPU: Remove another unnecessary check from commuteInstruction
llvm-svn: 248475
2015-09-24 07:51:25 +00:00
Matt Arsenault
6924ab0e25 AMDGPU: Add readonly to InstrMapping functions
llvm-svn: 248474
2015-09-24 07:51:23 +00:00
Matt Arsenault
ec8097dd1a TableGen: Add LLVM_READONLY to generated InstrMapping functions
These just read from a generated table.

llvm-svn: 248473
2015-09-24 07:51:20 +00:00
Matt Arsenault
944f6bbc7c AMDGPU: Fix printing trailing whitespace for mubuf atomics
llvm-svn: 248472
2015-09-24 07:51:17 +00:00
Matt Arsenault
83ea767f74 Remove dead declaration
llvm-svn: 248471
2015-09-24 07:51:12 +00:00
Matt Arsenault
1970824078 Use new TokenFactor chain when merging stores
If the stores are storing values from loads which partially
alias the stores, we could end up placing the merged loads
and stores on the same chain which has the potential to break.
Each store may have a different chain dependency on only some
of the original loads. Create a new TokenFactor to capture all
of the required dependencies of the stores rather than assuming
all stores can use the same chain.

The testcase is a situation where this happens, although
it does not have an observable change from this. The DAG nodes
just happened to not be reordered before despite this missing
chain dependency.

This is based on an off-list report for an out of tree target
which regressed due to r246307 and I haven't managed to find a case
where the nodes do end up reordered with an in tree target.

llvm-svn: 248468
2015-09-24 07:22:38 +00:00
Matt Arsenault
3b9edaf5a4 AMDGPU: Reduce number of copies emitted
Instead of always inserting a copy in case
the super register is itself a subregister,
only extract to the super reg class if this is
actually the case.

This shouldn't really change codegen, but
makes looking at the output of SIFixSGPRCopies
easier to read.

llvm-svn: 248467
2015-09-24 07:16:37 +00:00
Justin Bogner
0288b1753a Fix a think-o in which functions these should surround
llvm-svn: 248465
2015-09-24 05:29:31 +00:00
Justin Bogner
9a5ba292d6 Add some NDEBUG checks I accidentally dropped in r248462
llvm-svn: 248464
2015-09-24 05:20:04 +00:00
Justin Bogner
df8294de61 BasicAA: Move BasicAAResult::alias out-of-line. NFC
This makes the header more readable and cleans up some unnecessary
header differences between NDEBUG and !NDEBUG.

llvm-svn: 248462
2015-09-24 04:59:24 +00:00
Michael Zolotukhin
3efc2c1480 Add CFG Simplification pass after Loop Unswitching.
Loop unswitching produces conditional branches with constant condition,
and it's beneficial for later passes to clean this up with simplify-cfg.
We do this after the second invocation of loop-unswitch, but not after
the first one. Not doing so might cause problem for passes like
LoopUnroll, whose estimate of loop body size would be less accurate.

Reviewers: hfinkel

Differential Revision: http://reviews.llvm.org/D13064

llvm-svn: 248460
2015-09-24 03:50:17 +00:00
Evgeniy Stepanov
82c98de471 [safestack] Fix compiler crash in the presence of stack restores.
A use can be emitted before def in a function with stack restore
points but no static allocas.

llvm-svn: 248455
2015-09-24 01:23:51 +00:00
Sanjoy Das
24e797001b [IR] Teach llvm::User to co-allocate a descriptor.
Summary:
With this change, subclasses of `llvm::User` will be able to co-allocate
a variable number of bytes (called a "descriptor") with the `llvm::User`
instance.  The co-allocated descriptor can later be accessed using
`llvm::User::getDescriptor`.  This will be used in later changes to
implement operand bundles.

This change steals one bit from `NumUserOperands`, but given that it is
still 28 bits wide I don't think this will be a practical issue.

This change does not allow allocating hung off uses with descriptors.
This only for simplicity, not for any fundamental reason; and we can
easily add this functionality later if needed.

Reviewers: reames, chandlerc, dexonsmith, kmod, majnemer, pete, JosephTremoulet

Subscribers: pete, sanjoy, llvm-commits

Differential Revision: http://reviews.llvm.org/D12455

llvm-svn: 248453
2015-09-24 01:00:49 +00:00
Adrian Prantl
681621b57d Add REQUIRES: default_triple to these testcases.
llvm-svn: 248452
2015-09-24 00:35:14 +00:00
Rui Ueyama
62eda65031 Remove iterator_range::end.
Because the current proposal does not include that member function,
and we are trying to keep in line with that.

llvm-svn: 248451
2015-09-24 00:23:07 +00:00
Rui Ueyama
eff1b99076 Add iterator_range::end() predicate.
llvm-svn: 248447
2015-09-23 23:58:29 +00:00
Michael Zolotukhin
307104b262 [Unroll] When completely unrolling the loop, replace conditinal branches with unconditional.
Nothing is expected to change, except we do less redundant work in
clean-up.

Reviewers: hfinkel

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12951

llvm-svn: 248444
2015-09-23 23:12:43 +00:00
Wei Mi
fb0e259fc6 Put profile variables of COMDAT functions to it's own COMDAT group.
In -fprofile-instr-generate compilation, to remove the redundant profile
variables for the COMDAT functions, these variables are placed in the same
COMDAT group as its associated function. This way when the COMDAT function
is not picked by the linker, those profile variables will also not be
output in the final binary. This may cause warning when mix link objects
built w and wo -fprofile-instr-generate.

This patch puts the profile variables for COMDAT functions to its own COMDAT
group to avoid the problem.

Patch by xur.
Differential Revision: http://reviews.llvm.org/D12248

llvm-svn: 248440
2015-09-23 22:40:45 +00:00
Sanjay Patel
423048100e set div/rem default values to 'expensive' in TargetTransformInfo's cost model
...because that's what the cost model was intended to do.

As discussed in D12882, this fix has a temporary unintended consequence for
SimplifyCFG: it causes us to not speculate an fdiv. However, two wrongs make
PR24818 right, and two wrongs make PR24343 act right even though it's really
still wrong.

I intend to correct SimplifyCFG and add to CodeGenPrepare to account for this
cost model change and preserve the righteousness for the bug report cases.

https://llvm.org/bugs/show_bug.cgi?id=24818
https://llvm.org/bugs/show_bug.cgi?id=24343

Differential Revision: http://reviews.llvm.org/D12882

llvm-svn: 248439
2015-09-23 22:28:18 +00:00
Tim Northover
e2919f272c ARM: fix folding stack adjustment (again again again...)
This time, the issue is that we weren't accounting for the possibility that
aligned DPRs could have been stored after the final "push" in a prologue. When
that happened we effectively moved a "sub sp, #N" from below the aligned stores
to above them, and everything went to pot.

To make it worse, I'd actually committed something testing that we produced
wrong code, so the test update is tiny.

llvm-svn: 248437
2015-09-23 22:21:09 +00:00
Adrian Prantl
27d91dcebf dsymutil: Don't prune forward declarations inside a module definition.
llvm-svn: 248428
2015-09-23 20:44:37 +00:00
Adrian Prantl
f8870eb033 Fix this dsymutil testcase by not passing in a path to the modulemap file,
so the lookup works as expected after prepending the oso-prepend-path.

This manifested only on Windows, because "/" is not a relative path there.

llvm-svn: 248423
2015-09-23 19:53:10 +00:00
Philip Reames
daa3d37196 Remove handling of AddrSpaceCast in stripAndAccumulateInBoundsConstantOffsets
Patch by: simoncook

Unlike BitCasts, AddrSpaceCasts do not always produce an output the same size as its input, which was previously assumed. This fixes cases where two address spaces do not have the same size pointer, as an assertion failure would occur when trying to prove deferenceability.  LoopUnswitch is used in the particular test, but LICM also exhibits the same problem.

Differential Revision: http://reviews.llvm.org/D13008

llvm-svn: 248422
2015-09-23 19:48:43 +00:00
Lawrence Hu
05c92790cf Swap loop invariant GEP with loop variant GEP to allow more LICM.
This patch changes the order of GEPs generated by Splitting GEPs
    pass, specially when one of the GEPs has constant and the base is
    loop invariant, then we will generate the GEP with constant first
    when beneficial, to expose more cases for LICM.

    If originally Splitting GEP generate the following:
      do.body.i:
        %idxprom.i = sext i32 %shr.i to i64
        %2 = bitcast %typeD* %s to i8*
        %3 = shl i64 %idxprom.i, 2
        %uglygep = getelementptr i8, i8* %2, i64 %3
        %uglygep7 = getelementptr i8, i8* %uglygep, i64 1032
      ...
    Now it genereates:
      do.body.i:
        %idxprom.i = sext i32 %shr.i to i64
        %2 = bitcast %typeD* %s to i8*
        %3 = shl i64 %idxprom.i, 2
        %uglygep = getelementptr i8, i8* %2, i64 1032
        %uglygep7 = getelementptr i8, i8* %uglygep, i64 %3
      ...

    For no-loop cases, the original way of generating GEPs seems to
    expose more CSE cases, so we don't change the logic for no-loop
    cases, and only limit our change to the specific case we are
    interested in.

llvm-svn: 248420
2015-09-23 19:25:30 +00:00
Akira Hatanaka
e7bdc0a349 [InstCombine] Preserve metadata when merging loads that are phi
arguments.

Make sure InstCombiner::FoldPHIArgLoadIntoPHI doesn't drop the following
metadata:

MD_tbaa
MD_alias_scope
MD_noalias
MD_invariant_load
MD_nonnull
MD_range

rdar://problem/17617709

Differential Revision: http://reviews.llvm.org/D12710

llvm-svn: 248419
2015-09-23 18:40:57 +00:00
Philip Reames
928c33c531 [docs] Update DominatorTree docs to clarify expectations around unreachable blocks
Note: I'm am not trying to describe what "should be"; I'm only describing what is true today.

This came out of my recent question to llvm-dev titled: When can the dominator tree not contain a node for a basic block?

Differential Revision: http://reviews.llvm.org/D13078

llvm-svn: 248417
2015-09-23 18:39:37 +00:00
Sanjay Patel
02c70e2e49 [x86] replace integer 'xor' ops with packed SSE FP 'xor' ops when operating on FP scalars
Turn this:

movd %xmm0, %eax
movd %xmm1, %ecx
xorl %eax, %ecx
movd %ecx, %xmm0

into this:

xorps %xmm1, %xmm0

This is related to, but does not solve:
https://llvm.org/bugs/show_bug.cgi?id=22428

This is an extension of:
http://reviews.llvm.org/rL248395

llvm-svn: 248415
2015-09-23 18:33:42 +00:00
Sanjay Patel
296caa9388 [x86] replace integer 'or' ops with packed SSE FP 'or' ops when operating on FP scalars
Turn this:

movd %xmm0, %eax
movd %xmm1, %ecx
orl %eax, %ecx
movd %ecx, %xmm0

into this:

orps %xmm1, %xmm0

This is related to, but does not solve:
https://llvm.org/bugs/show_bug.cgi?id=22428

This is an extension of:
http://reviews.llvm.org/rL248395

llvm-svn: 248409
2015-09-23 18:19:07 +00:00
Adrian Prantl
c4316d6be0 Fix the order of operations.
llvm-svn: 248406
2015-09-23 18:09:01 +00:00
Evgeniy Stepanov
c8b423f66c Android support for SafeStack.
Add two new ways of accessing the unsafe stack pointer:

* At a fixed offset from the thread TLS base. This is very similar to
  StackProtector cookies, but we plan to extend it to other backends
  (ARM in particular) soon. Bionic-side implementation here:
  https://android-review.googlesource.com/170988.
* Via a function call, as a fallback for platforms that provide
  neither a fixed TLS slot, nor a reasonable TLS implementation (i.e.
  not emutls).

This is a re-commit of a change in r248357 that was reverted in
r248358.

llvm-svn: 248405
2015-09-23 18:07:56 +00:00
Sanjay Patel
6f3e2579be move call to convertIntLogicToFPLogic up; NFCI
The BEXTR comments didn't make sense before, we may want to extend the
FP logic transform to work on vectors, and this way is more beautiful.

llvm-svn: 248404
2015-09-23 18:03:37 +00:00
Adrian Prantl
eb75055f70 Temporarily make testcase more verbose to debug a msvc buildbot failure.
llvm-svn: 248403
2015-09-23 17:59:45 +00:00
Chen Li
7331c90075 [Bug 24848] Use range metadata to constant fold comparisons with constant values
Summary:
This is the first part of fixing bug 24848 https://llvm.org/bugs/show_bug.cgi?id=24848.

When range metadata is provided, it should be used to constant fold comparisons with constant values.

Reviewers: sanjoy, hfinkel

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12988

llvm-svn: 248402
2015-09-23 17:58:44 +00:00
Sanjay Patel
6833c567fe [x86] move code for converting int logic to FP logic to a helper function; NFCI
This is a follow-on to:
http://reviews.llvm.org/rL248395

so we can add the call to the or/xor combines too.

llvm-svn: 248399
2015-09-23 17:39:41 +00:00