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7b9f02525e
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10639 Commits

Author SHA1 Message Date
Chris Lattner
7b9f02525e add a new -view-sched-dags option to view dags as they are sent to the scheduler. 
llvm-svn: 22878
 2005-08-18 20:11:49 +00:00
Chris Lattner
2147daa960 Move this to the emitter 
llvm-svn: 22877
 2005-08-18 20:08:53 +00:00
Chris Lattner
62bc771af7 Implement the first chunk of a code emitter. This is sophisticated enough to 
codegen:

_empty:
.LBB_empty_0:   ;
        blr

but can't do anything more (yet). :)

llvm-svn: 22876
 2005-08-18 20:07:59 +00:00
Jim Laskey
7399a3d644 More optimal solution for loading constants. 
llvm-svn: 22870
 2005-08-18 18:58:23 +00:00
Chris Lattner
a094a1279a After selecting the instructions for a basic block, emit the instructions 
llvm-svn: 22869
 2005-08-18 18:46:06 +00:00
Chris Lattner
ebb48e5877 new file, obviously just a stub 
llvm-svn: 22868
 2005-08-18 18:45:24 +00:00
Chris Lattner
80a5ffb6c5 remove some unused stuff 
llvm-svn: 22866
 2005-08-18 18:34:00 +00:00
Nate Begeman
7efd8aa1d1 Fix int foo() { return 65535; } by using the top 16 bits of the constant 
as the argument to LIS rather than the result of HA16(constant).

The DAG->DAG ISel was already doing the right thing.

llvm-svn: 22865
 2005-08-18 18:14:49 +00:00
Nate Begeman
7726312fac Improve ISD::Constant codegen. 
Now for int foo() { return -1; } we generate:
_foo:
        li r3, -1
        blr

instead of
_foo:
        lis r2, -1
        ori r3, r2, 65535
        blr

llvm-svn: 22864
 2005-08-18 18:01:39 +00:00
Chris Lattner
5cbeaed711 Enable critical edge splitting by default 
llvm-svn: 22863
 2005-08-18 17:35:14 +00:00
Chris Lattner
79b0fc3b9a replace switch stmt with an assert, generate li 0 instead of lis 0 for 0, 
to make the code follow people's expectations better.

llvm-svn: 22861
 2005-08-18 17:16:52 +00:00
Jim Laskey
ed406c683b Handle loading of 0x????0000 constants with a single instruction. 
llvm-svn: 22858
 2005-08-18 15:52:30 +00:00
Nate Begeman
67f3483a97 Add support for ISD::AND, and its various optimized forms. 
llvm-svn: 22857
 2005-08-18 07:30:46 +00:00
Nate Begeman
474ec3c02d Add support for target DAG nodes that take 4 operands, such as PowerPC's 
rlwinm.

llvm-svn: 22856
 2005-08-18 07:30:15 +00:00
Nate Begeman
3681359c93 Maintain consistency in negating things 
llvm-svn: 22855
 2005-08-18 05:44:50 +00:00
Nate Begeman
b6e36decb6 Implement XOR, remove a broken sign_extend_inreg case 
llvm-svn: 22854
 2005-08-18 05:00:13 +00:00
Chris Lattner
d6b9b36616 Fix printing of VTSDNodes 
llvm-svn: 22853
 2005-08-18 03:31:02 +00:00
Nate Begeman
feac5964d7 Add a bunch more simple nodes. 
llvm-svn: 22851
 2005-08-18 03:04:18 +00:00
Nate Begeman
4a875e784e Add a couple more nodes that are easy to handle 
llvm-svn: 22850
 2005-08-18 00:53:47 +00:00
Nate Begeman
276155cb07 Be fruitful and multiply! 
llvm-svn: 22849
 2005-08-18 00:21:41 +00:00
Jim Laskey
aa4903a2a6 Better version of isIntImmediate. 
llvm-svn: 22848
 2005-08-18 00:15:15 +00:00
Nate Begeman
e7c038e591 Teach the DAG->DAG ISel about FNEG, and how it can be used to invert 
several of the PowerPC opcodes that come in both negated and non-negated
forms.

llvm-svn: 22845
 2005-08-17 23:46:35 +00:00
Chris Lattner
a852093954 Fix Transforms/LoopStrengthReduce/2005-08-17-OutOfLoopVariant.ll, a crash 
on 177.mesa

llvm-svn: 22843
 2005-08-17 21:22:41 +00:00
Jim Laskey
d761e8859d Move the code dependency for MathExtras.h from SelectionDAGNodes.h. 
Added some class dividers in SelectionDAG.cpp.

llvm-svn: 22841
 2005-08-17 20:08:02 +00:00
Jim Laskey
5f57048c62 Move code dependency for MathExtras.h out of Constants.h. 
llvm-svn: 22840
 2005-08-17 20:06:22 +00:00
Jim Laskey
062df4865a Promote dependency for MathExtras.h out of Constants.h. 
llvm-svn: 22839
 2005-08-17 20:04:34 +00:00
Jim Laskey
61e3d7bca5 Culling out use of unions for converting FP to bits and vice versa. 
llvm-svn: 22838
 2005-08-17 19:34:49 +00:00
Chris Lattner
6e4c443e45 add a beta option for turning on dag->dag isel 
llvm-svn: 22837
 2005-08-17 19:33:30 +00:00
Chris Lattner
6ee7175048 initial hack at a dag->dag instruction selector. This is obviously woefully 
incomplete, but it is a start.  It handles basic argument/retval stuff, immediates,
add and sub.

llvm-svn: 22836
 2005-08-17 19:33:03 +00:00
Chris Lattner
3c0e683c5d add prototype, remove dead proto 
llvm-svn: 22835
 2005-08-17 19:32:03 +00:00
Chris Lattner
a11bdf3abe Fix a bug in RemoveDeadNodes where it would crash when its "optional" 
argument is not specified.

Implement ReplaceAllUsesWith.

llvm-svn: 22834
 2005-08-17 19:00:20 +00:00
Jim Laskey
7cdadb13d5 Switched to using BitsToDouble for int_to_float to avoid aliasing problem. 
llvm-svn: 22831
 2005-08-17 17:42:52 +00:00
Chris Lattner
82abf46492 Fix some bugs in the alpha backend, some of which I introduced yesterday, 
and some that were preexisting.  All alpha regtests pass now.

llvm-svn: 22829
 2005-08-17 17:08:24 +00:00
Jim Laskey
2370cb4e85 Change hex float constants for the sake of VC++. 
llvm-svn: 22828
 2005-08-17 09:44:59 +00:00
Chris Lattner
dbfcba7565 Add a new beta option for critical edge splitting, to avoid a problem that 
Nate noticed in yacr2 (and I know occurs in other places as well).

This is still rough, as the critical edge blocks are not intelligently placed
but is added to get some idea to see if this improves performance.

llvm-svn: 22825
 2005-08-17 06:37:43 +00:00
Chris Lattner
969232d2ec Use a new helper to split critical edges, making the code simpler. 
Do not claim to not change the CFG.  We do change the cfg to split critical
edges.  This isn't causing us a problem now, but could likely do so in the
future.

llvm-svn: 22824
 2005-08-17 06:35:16 +00:00
Chris Lattner
a103a2e9c6 Fix a regression on X86, where FP values can be promoted too. 
llvm-svn: 22822
 2005-08-17 06:06:25 +00:00
Chris Lattner
1035045433 Fix a few small typos I noticed when converting this over to the DAG->DAG 
selector.  Also, there is no difference between addSImm and addImm, so just
use addImm, folding some branches.

llvm-svn: 22819
 2005-08-17 01:25:14 +00:00
Jim Laskey
09b3a01b90 Removed UINT_TO_FP and SINT_TO_FP from ISel outright. 
llvm-svn: 22818
 2005-08-17 01:14:38 +00:00
Andrew Lenharth
32d53db341 thinko. Should fix s4addl.ll regression 
llvm-svn: 22817
 2005-08-17 00:47:24 +00:00
Jim Laskey
7584bd6c69 Remove ISel code generation for UINT_TO_FP and SINT_TO_FP. Now asserts if 
marked as legal.

llvm-svn: 22816
 2005-08-17 00:41:40 +00:00
Jim Laskey
cdde9cec23 Make UINT_TO_FP and SINT_TO_FP use generic expansion. 
llvm-svn: 22815
 2005-08-17 00:40:22 +00:00
Jim Laskey
59b9ee0529 Added generic code expansion for [signed|unsigned] i32 to [f32|f64] casts in the 
legalizer.  PowerPC now uses this expansion instead of ISel version.

Example:

// signed integer to double conversion
double f1(signed x) {
  return (double)x;
}

// unsigned integer to double conversion
double f2(unsigned x) {
  return (double)x;
}

// signed integer to float conversion
float f3(signed x) {
  return (float)x;
}

// unsigned integer to float conversion
float f4(unsigned x) {
  return (float)x;
}


Byte Code:

internal fastcc double %_Z2f1i(int %x) {
entry:
        %tmp.1 = cast int %x to double          ; <double> [#uses=1]
        ret double %tmp.1
}

internal fastcc double %_Z2f2j(uint %x) {
entry:
        %tmp.1 = cast uint %x to double         ; <double> [#uses=1]
        ret double %tmp.1
}

internal fastcc float %_Z2f3i(int %x) {
entry:
        %tmp.1 = cast int %x to float           ; <float> [#uses=1]
        ret float %tmp.1
}

internal fastcc float %_Z2f4j(uint %x) {
entry:
        %tmp.1 = cast uint %x to float          ; <float> [#uses=1]
        ret float %tmp.1
}

internal fastcc double %_Z2g1i(int %x) {
entry:
        %buffer = alloca [2 x uint]             ; <[2 x uint]*> [#uses=3]
        %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0                ; <uint*> [#uses=1]
        store uint 1127219200, uint* %tmp.0
        %tmp.2 = cast int %x to uint            ; <uint> [#uses=1]
        %tmp.3 = xor uint %tmp.2, 2147483648            ; <uint> [#uses=1]
        %tmp.5 = getelementptr [2 x uint]* %buffer, int 0, int 1                ; <uint*> [#uses=1]
        store uint %tmp.3, uint* %tmp.5
        %tmp.9 = cast [2 x uint]* %buffer to double*            ; <double*> [#uses=1]
        %tmp.10 = load double* %tmp.9           ; <double> [#uses=1]
        %tmp.13 = load double* cast (long* %signed_bias to double*)             ; <double> [#uses=1]
        %tmp.14 = sub double %tmp.10, %tmp.13           ; <double> [#uses=1]
        ret double %tmp.14
}

internal fastcc double %_Z2g2j(uint %x) {
entry:
        %buffer = alloca [2 x uint]             ; <[2 x uint]*> [#uses=3]
        %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0                ; <uint*> [#uses=1]
        store uint 1127219200, uint* %tmp.0
        %tmp.1 = getelementptr [2 x uint]* %buffer, int 0, int 1                ; <uint*> [#uses=1]
        store uint %x, uint* %tmp.1
        %tmp.4 = cast [2 x uint]* %buffer to double*            ; <double*> [#uses=1]
        %tmp.5 = load double* %tmp.4            ; <double> [#uses=1]
        %tmp.8 = load double* cast (long* %unsigned_bias to double*)            ; <double> [#uses=1]
        %tmp.9 = sub double %tmp.5, %tmp.8              ; <double> [#uses=1]
        ret double %tmp.9
}

internal fastcc float %_Z2g3i(int %x) {
entry:
        %buffer = alloca [2 x uint]             ; <[2 x uint]*> [#uses=3]
        %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0                ; <uint*> [#uses=1]
        store uint 1127219200, uint* %tmp.0
        %tmp.2 = cast int %x to uint            ; <uint> [#uses=1]
        %tmp.3 = xor uint %tmp.2, 2147483648            ; <uint> [#uses=1]
        %tmp.5 = getelementptr [2 x uint]* %buffer, int 0, int 1                ; <uint*> [#uses=1]
        store uint %tmp.3, uint* %tmp.5
        %tmp.9 = cast [2 x uint]* %buffer to double*            ; <double*> [#uses=1]
        %tmp.10 = load double* %tmp.9           ; <double> [#uses=1]
        %tmp.13 = load double* cast (long* %signed_bias to double*)             ; <double> [#uses=1]
        %tmp.14 = sub double %tmp.10, %tmp.13           ; <double> [#uses=1]
        %tmp.16 = cast double %tmp.14 to float          ; <float> [#uses=1]
        ret float %tmp.16
}

internal fastcc float %_Z2g4j(uint %x) {
entry:
        %buffer = alloca [2 x uint]             ; <[2 x uint]*> [#uses=3]
        %tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0                ; <uint*> [#uses=1]
        store uint 1127219200, uint* %tmp.0
        %tmp.1 = getelementptr [2 x uint]* %buffer, int 0, int 1                ; <uint*> [#uses=1]
        store uint %x, uint* %tmp.1
        %tmp.4 = cast [2 x uint]* %buffer to double*            ; <double*> [#uses=1]
        %tmp.5 = load double* %tmp.4            ; <double> [#uses=1]
        %tmp.8 = load double* cast (long* %unsigned_bias to double*)            ; <double> [#uses=1]
        %tmp.9 = sub double %tmp.5, %tmp.8              ; <double> [#uses=1]
        %tmp.11 = cast double %tmp.9 to float           ; <float> [#uses=1]
        ret float %tmp.11
}


PowerPC Code:

        .machine ppc970


        .const
        .align  2
.CPIl1__Z2f1i_0:                                        ; float 0x4330000080000000
        .long   1501560836      ; float 4.5036e+15
        .text
        .align  2
        .globl  l1__Z2f1i
l1__Z2f1i:
.LBBl1__Z2f1i_0:        ; entry
        xoris r2, r3, 32768
        stw r2, -4(r1)
        lis r2, 17200
        stw r2, -8(r1)
        lfd f0, -8(r1)
        lis r2, ha16(.CPIl1__Z2f1i_0)
        lfs f1, lo16(.CPIl1__Z2f1i_0)(r2)
        fsub f1, f0, f1
        blr


        .const
        .align  2
.CPIl2__Z2f2j_0:                                        ; float 0x4330000000000000
        .long   1501560832      ; float 4.5036e+15
        .text
        .align  2
        .globl  l2__Z2f2j
l2__Z2f2j:
.LBBl2__Z2f2j_0:        ; entry
        stw r3, -4(r1)
        lis r2, 17200
        stw r2, -8(r1)
        lfd f0, -8(r1)
        lis r2, ha16(.CPIl2__Z2f2j_0)
        lfs f1, lo16(.CPIl2__Z2f2j_0)(r2)
        fsub f1, f0, f1
        blr


        .const
        .align  2
.CPIl3__Z2f3i_0:                                        ; float 0x4330000080000000
        .long   1501560836      ; float 4.5036e+15
        .text
        .align  2
        .globl  l3__Z2f3i
l3__Z2f3i:
.LBBl3__Z2f3i_0:        ; entry
        xoris r2, r3, 32768
        stw r2, -4(r1)
        lis r2, 17200
        stw r2, -8(r1)
        lfd f0, -8(r1)
        lis r2, ha16(.CPIl3__Z2f3i_0)
        lfs f1, lo16(.CPIl3__Z2f3i_0)(r2)
        fsub f0, f0, f1
        frsp f1, f0
        blr


        .const
        .align  2
.CPIl4__Z2f4j_0:                                        ; float 0x4330000000000000
        .long   1501560832      ; float 4.5036e+15
        .text
        .align  2
        .globl  l4__Z2f4j
l4__Z2f4j:
.LBBl4__Z2f4j_0:        ; entry
        stw r3, -4(r1)
        lis r2, 17200
        stw r2, -8(r1)
        lfd f0, -8(r1)
        lis r2, ha16(.CPIl4__Z2f4j_0)
        lfs f1, lo16(.CPIl4__Z2f4j_0)(r2)
        fsub f0, f0, f1
        frsp f1, f0
        blr

llvm-svn: 22814
 2005-08-17 00:39:29 +00:00
Chris Lattner
bd8cbd4951 add a new TargetConstant node 
llvm-svn: 22813
 2005-08-17 00:34:06 +00:00
Nate Begeman
d549160121 Implement a couple improvements: 
Remove dead code in ISD::Constant handling
Add support for add long, imm16

We now codegen 'long long foo(long long a) { return ++a; }'
as:
addic r4, r4, 1
addze r3, r3
blr

instead of:
li r2, 1
li r5, 0
addc r2, r4, r2
adde r3, r3, r5
blr

llvm-svn: 22811
 2005-08-17 00:20:08 +00:00
Chris Lattner
8fcd135595 This is a dummy, it doesn't matter what the ValueType is 
llvm-svn: 22809
 2005-08-16 21:59:52 +00:00
Chris Lattner
9d651a0e3c updates for changes in nodes 
llvm-svn: 22808
 2005-08-16 21:58:15 +00:00
Chris Lattner
583658a766 update the backends to work with the new CopyFromReg/CopyToReg/ImplicitDef nodes 
llvm-svn: 22807
 2005-08-16 21:56:37 +00:00
Chris Lattner
3b7e157005 Eliminate the RegSDNode class, which 3 nodes (CopyFromReg/CopyToReg/ImplicitDef) 
used to tack a register number onto the node.

Instead of doing this, make a new node, RegisterSDNode, which is a leaf
containing a register number.  These three operations just become normal
DAG nodes now, instead of requiring special handling.

Note that with this change, it is no longer correct to make illegal
CopyFromReg/CopyToReg nodes.  The legalizer will not touch them, and this
is bad, so don't do it. :)

llvm-svn: 22806
 2005-08-16 21:55:35 +00:00
Nate Begeman
f6b6378f23 Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nasty 
fixme from the PowerPC backend.  Emit slightly better code for legalizing
select_cc.

llvm-svn: 22805
 2005-08-16 19:49:35 +00:00