Benjamin Kramer
7f1cdac1e4
Fix sort predicate. qsort(3)'s predicate semantics differ from std::sort's. Fixes PR 8780.
...
llvm-svn: 121705
2010-12-13 18:20:38 +00:00
Chris Lattner
14810c808b
Add a couple dag combines to transform mulhi/mullo into a wider multiply
...
when the wider type is legal. This allows us to compile:
define zeroext i16 @test1(i16 zeroext %x) nounwind {
entry:
%div = udiv i16 %x, 33
ret i16 %div
}
into:
test1: # @test1
movzwl 4(%esp), %eax
imull $63551, %eax, %eax # imm = 0xF83F
shrl $21, %eax
ret
instead of:
test1: # @test1
movw $-1985, %ax # imm = 0xFFFFFFFFFFFFF83F
mulw 4(%esp)
andl $65504, %edx # imm = 0xFFE0
movl %edx, %eax
shrl $5, %eax
ret
Implementing rdar://8760399 and example #4 from:
http://blog.regehr.org/archives/320
We should implement the same thing for [su]mul_hilo, but I don't
have immediate plans to do this.
llvm-svn: 121696
2010-12-13 08:39:01 +00:00
Chris Lattner
0368bf7457
reinstate my patch: the miscompile was caused by an inverted branch in the
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'and' case.
llvm-svn: 121695
2010-12-13 08:12:19 +00:00
Chris Lattner
caad324345
Completely disable the optimization I added in r121680 until
...
I can track down a miscompile. This should bring the buildbots
back to life
llvm-svn: 121693
2010-12-13 07:41:29 +00:00
Chris Lattner
324f849088
remove the verbose-asm "constant pool double" comments that we were printing
...
for each constant pool entry. Using WriteTypeSymbolic here takes time
proportional to the size of the module, for each constant pool entry.
This speeds up -verbose-asm llc on 252.eon (a random testcase at my disposal)
from 4.4s to 2.137s. llc takes 2.11s with asm-verbose off, so this is now a
pretty reasonable cost for verbose comments.
llvm-svn: 121691
2010-12-13 07:35:47 +00:00
Chris Lattner
5ce3e42d80
Make simplifycfg reprocess newly formed "br (cond1 | cond2)" conditions
...
when simplifying, allowing them to be eagerly turned into switches. This
is the last step required to get "Example 7" from this blog post:
http://blog.regehr.org/archives/320
On X86, we now generate this machine code, which (to my eye) seems better
than the ICC generated code:
_crud: ## @crud
## BB#0: ## %entry
cmpb $33, %dil
jb LBB0_4
## BB#1: ## %switch.early.test
addb $-34, %dil
cmpb $58, %dil
ja LBB0_3
## BB#2: ## %switch.early.test
movzbl %dil, %eax
movabsq $288230376537592865, %rcx ## imm = 0x400000017001421
btq %rax, %rcx
jb LBB0_4
LBB0_3: ## %lor.rhs
xorl %eax, %eax
ret
LBB0_4: ## %lor.end
movl $1, %eax
ret
llvm-svn: 121690
2010-12-13 07:00:06 +00:00
Chris Lattner
20b9e84c7e
make this logic a bit simpler.
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llvm-svn: 121689
2010-12-13 06:36:51 +00:00
Chris Lattner
74d917e19d
split all the guts of SimplifyCFGOpt::run out into one function
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per terminator kind.
llvm-svn: 121688
2010-12-13 06:25:44 +00:00
Chris Lattner
ea15ce73be
fix a bug in r121680 that upset the various buildbots.
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llvm-svn: 121687
2010-12-13 05:34:18 +00:00
Chris Lattner
1eb2e235c8
refactor the speculative execution logic to be factored into the cond branch code instead of
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doing a cfg search for every block simplified.
llvm-svn: 121686
2010-12-13 05:26:52 +00:00
Chris Lattner
4b9e3a31b0
simplify a bunch of code.
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llvm-svn: 121685
2010-12-13 05:20:28 +00:00
Chris Lattner
d79dd057bf
move HoistThenElseCodeToIf up to a more logical and efficient-to-handle place.
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llvm-svn: 121684
2010-12-13 05:15:29 +00:00
Chris Lattner
80f8577d74
move 'MergeBlocksIntoPredecessor' call earlier. Use
...
getSinglePredecessor to simplify code.
llvm-svn: 121683
2010-12-13 05:10:48 +00:00
Chris Lattner
7ad8e06c3b
factor new code out to a SimplifyBranchOnICmpChain helper function.
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llvm-svn: 121681
2010-12-13 05:03:41 +00:00
Chris Lattner
5cbbcc56ad
enhance the "change or icmp's into switch" xform to handle one value in an
...
'or sequence' that it doesn't understand. This allows us to optimize
something insane like this:
int crud (unsigned char c, unsigned x)
{
if(((((((((( (int) c <= 32 ||
(int) c == 46) || (int) c == 44)
|| (int) c == 58) || (int) c == 59) || (int) c == 60)
|| (int) c == 62) || (int) c == 34) || (int) c == 92)
|| (int) c == 39) != 0)
foo();
}
into:
define i32 @crud(i8 zeroext %c, i32 %x) nounwind ssp noredzone {
entry:
%cmp = icmp ult i8 %c, 33
br i1 %cmp, label %if.then, label %switch.early.test
switch.early.test: ; preds = %entry
switch i8 %c, label %if.end [
i8 39, label %if.then
i8 44, label %if.then
i8 58, label %if.then
i8 59, label %if.then
i8 60, label %if.then
i8 62, label %if.then
i8 46, label %if.then
i8 92, label %if.then
i8 34, label %if.then
]
by pulling the < comparison out ahead of the newly formed switch.
llvm-svn: 121680
2010-12-13 04:50:38 +00:00
Chris Lattner
f6be61e969
merge two very similar functions into one that has a bool argument.
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llvm-svn: 121678
2010-12-13 04:26:26 +00:00
Evan Cheng
190ff7fa88
Disable auto-detection of AVX support since AVX codegen support is not ready.
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llvm-svn: 121677
2010-12-13 04:23:53 +00:00
Chris Lattner
003b79e2d3
don't bother handling non-canonical icmp's
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llvm-svn: 121676
2010-12-13 04:18:32 +00:00
Chris Lattner
9bd0b12342
inline a function, making the result much simpler.
...
llvm-svn: 121675
2010-12-13 04:15:19 +00:00
Chris Lattner
25b642edfd
Fix my previous patch to handle a degenerate case that the llvm-gcc
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bootstrap buildbot tripped over.
llvm-svn: 121674
2010-12-13 03:43:57 +00:00
Chris Lattner
9b089512e9
convert some methods to be static functions
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llvm-svn: 121673
2010-12-13 03:30:12 +00:00
Chris Lattner
46cc5158bb
zap two more std::sorts.
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llvm-svn: 121672
2010-12-13 03:24:30 +00:00
Chris Lattner
a21c02e807
fix a fairly serious oversight with switch formation from
...
or'd conditions. Previously we'd compile something like this:
int crud (unsigned char c) {
return c == 62 || c == 34 || c == 92;
}
into:
switch i8 %c, label %lor.rhs [
i8 62, label %lor.end
i8 34, label %lor.end
]
lor.rhs: ; preds = %entry
%cmp8 = icmp eq i8 %c, 92
br label %lor.end
lor.end: ; preds = %entry, %entry, %lor.rhs
%0 = phi i1 [ true, %entry ], [ %cmp8, %lor.rhs ], [ true, %entry ]
%lor.ext = zext i1 %0 to i32
ret i32 %lor.ext
which failed to merge the compare-with-92 into the switch. With this patch
we simplify this all the way to:
switch i8 %c, label %lor.rhs [
i8 62, label %lor.end
i8 34, label %lor.end
i8 92, label %lor.end
]
lor.rhs: ; preds = %entry
br label %lor.end
lor.end: ; preds = %entry, %entry, %entry, %lor.rhs
%0 = phi i1 [ true, %entry ], [ false, %lor.rhs ], [ true, %entry ], [ true, %entry ]
%lor.ext = zext i1 %0 to i32
ret i32 %lor.ext
which is much better for codegen's switch lowering stuff. This kicks in 33 times
on 176.gcc (for example) cutting 103 instructions off the generated code.
llvm-svn: 121671
2010-12-13 03:18:54 +00:00
Chris Lattner
6d4df726a6
simplify code and reduce indentation
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llvm-svn: 121670
2010-12-13 02:38:13 +00:00
Chris Lattner
134d892049
convert an std::sort to array_pod_sort.
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llvm-svn: 121669
2010-12-13 02:00:58 +00:00
Chris Lattner
153b680cdd
move the "br (X == 0 | X == 1), T, F" -> switch optimization to a new
...
location in simplifycfg. In the old days, SimplifyCFG was never run on
the entry block, so we had to scan over all preds of the BB passed into
simplifycfg to do this xform, now we can just check blocks ending with
a condbranch. This avoids a scan over all preds of every simplified
block, which should be a significant compile-time perf win on functions
with lots of edges. No functionality change.
llvm-svn: 121668
2010-12-13 01:57:34 +00:00
Chris Lattner
644a93e06b
reduce indentation and generally simplify code, no functionality change.
...
llvm-svn: 121667
2010-12-13 01:47:07 +00:00
Chris Lattner
859fad7373
use getFirstNonPHIOrDbg to simplify this code.
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llvm-svn: 121664
2010-12-13 01:28:06 +00:00
Chris Lattner
6df4d5d88e
reduce indentation by using continue, no functionality change.
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llvm-svn: 121662
2010-12-13 01:11:17 +00:00
Chris Lattner
72f03b62a9
add a note
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llvm-svn: 121656
2010-12-13 00:15:25 +00:00
Wesley Peck
f842b79b4b
Missed some ADDI <-> ADDIK conversions in 121649.
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llvm-svn: 121652
2010-12-12 22:53:14 +00:00
Wesley Peck
95cebfc460
MBlaze delay slot filler was not capable of using ADDK and variants to fill delay slots. This broke several test cases when 121649 was committed. This fixes the regression.
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llvm-svn: 121650
2010-12-12 22:22:49 +00:00
Wesley Peck
38688d020c
The ADD and ADDK (and all variants) instructions where flip-flopped in the MBlaze backend. This bug fix makes 64-bit math work on the MBlaze backend.
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llvm-svn: 121649
2010-12-12 22:02:31 +00:00
Tobias Grosser
cd3d63e102
Remove useless dynamic_cast<>().
...
Thanks Peter for pointing me to something that should have never been
committed to the llvm code base.
llvm-svn: 121648
2010-12-12 21:58:28 +00:00
Wesley Peck
7274c73974
1. Change MBlaze indirect branches to use absolute branch BRALD instead of pc relative branch BRLD.
...
2. Make sure that the MBlaze stack is aligned to 4-byte boundaries.
3. Determine frame indexes that should be placed in the callers stack frame, as per the MBlaze ABI, and place them in the correct locations.
llvm-svn: 121639
2010-12-12 20:52:31 +00:00
Duncan Sands
47a4bbd31d
Catch attempts to remove a deleted node from the CSE maps. Better to
...
catch this here rather than later after accessing uninitialized memory
etc. Fires when compiling the testcase in PR8237.
llvm-svn: 121635
2010-12-12 13:22:50 +00:00
Benjamin Kramer
a638216447
Generalize the and-icmp-select instcombine further by allowing selects of the form
...
(x & 2^n) ? 2^m+C : C
we can offset both arms by C to get the "(x & 2^n) ? 2^m : 0" form, optimize the
select to a shift and apply the offset afterwards.
llvm-svn: 121609
2010-12-11 10:49:22 +00:00
Benjamin Kramer
5a1721f4ac
Factor the (x & 2^n) ? 2^m : 0 instcombine into its own method and generalize it
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to catch cases where n != m with a shift.
llvm-svn: 121608
2010-12-11 09:42:59 +00:00
Evan Cheng
b6773d7e1f
(or (and (shl A, #shamt), mask), B) => ARMbfi B, A, ~mask where lsb(mask) == #shamt. rdar://8752056
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llvm-svn: 121606
2010-12-11 04:11:38 +00:00
Jakob Stoklund Olesen
a523d5f048
Add named timer groups for the different stages of register allocation.
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llvm-svn: 121604
2010-12-11 00:19:56 +00:00
Jakob Stoklund Olesen
ef80efea1d
Move MRI into RegAllocBase. Clean up debug output a bit.
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llvm-svn: 121599
2010-12-10 23:49:00 +00:00
Jim Grosbach
98dcdf10c2
Add FIXME
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llvm-svn: 121598
2010-12-10 23:41:10 +00:00
Nick Lewycky
46a6ed1f0f
Remove extraneous close parenthesis.
...
Fix build breakage.
llvm-svn: 121596
2010-12-10 23:14:35 +00:00
Nick Lewycky
9afbedbc48
Move variable that's unused in an NDEBUG build inside the DEBUG() macro, fixing
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lib/CodeGen/RegAllocGreedy.cpp:233: error: unused variable 'TRC' [-Wunused-variable]
llvm-svn: 121594
2010-12-10 23:05:10 +00:00
Owen Anderson
47a78db79b
Attempt to get Thumb2 branch fixups working properly.
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llvm-svn: 121593
2010-12-10 23:02:28 +00:00
Jakob Stoklund Olesen
6cd6e644e7
Force the greedy register allocator to always use the inline spiller.
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Soon, RegAllocGreedy will start splitting live ranges, and then deferred
spilling won't work anyway.
llvm-svn: 121591
2010-12-10 22:54:44 +00:00
Jakob Stoklund Olesen
cbd4bac09d
Rip out live range splitting support from the inline spiller.
...
The spiller should only spill. The register allocator will drive live range
splitting, it has the needed information about register pressure and
interferences.
llvm-svn: 121590
2010-12-10 22:54:40 +00:00
Owen Anderson
8424ab65e2
Fix merge error in my last fix to Thumb2 vldr fixups.
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llvm-svn: 121588
2010-12-10 22:53:48 +00:00
Owen Anderson
f310c92333
Fixups for Thumb2 vldr's need to have the effective PC aligned as well.
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llvm-svn: 121587
2010-12-10 22:46:47 +00:00
Bill Wendling
7f1cea7009
The MCFixupKindInfo table needs to be in the order that the enums were
...
declared. Add a note specifying this and spruce up the list a bit.
llvm-svn: 121586
2010-12-10 22:37:19 +00:00