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Commit Graph

52240 Commits

Author SHA1 Message Date
Dan Gohman
7f73a0c1e4 Don't hoist or sink instructions with physreg uses if the physreg is
allocatable. Even if it doesn't appear to have any defs, it may latter
on after register allocation.

llvm-svn: 82834
2009-09-26 02:34:00 +00:00
Dan Gohman
8e056e8b9b I put the wrong rdar number in this test.
llvm-svn: 82829
2009-09-26 01:11:57 +00:00
Dan Gohman
487152872b Unbreak MachineLICM for instructions that reference RIP on x86-64 too.
llvm-svn: 82825
2009-09-25 23:58:45 +00:00
Dan Gohman
d585364b0b Rename ConstantFP's getInf to getInfinity.
llvm-svn: 82823
2009-09-25 23:40:21 +00:00
Dan Gohman
ba2b2eb3fe Move MachineMemOperand::getAlignment out of line, to avoid needing
MathExtras.h in MachineMemOperand.h.

llvm-svn: 82822
2009-09-25 23:33:20 +00:00
Daniel Dunbar
99d02b7818 Remove unused variable.
llvm-svn: 82821
2009-09-25 23:26:56 +00:00
Dan Gohman
d564cd42d9 Transform pow(x, 0.5) to (x == -inf ? inf : fabs(sqrt(x))), which is
typically faster then doing a general pow.

llvm-svn: 82819
2009-09-25 23:10:17 +00:00
Dan Gohman
01b2c857ed Add a ConstantFP::getInf utility function for creating infinity ConstantFPs.
llvm-svn: 82818
2009-09-25 23:00:48 +00:00
Dan Gohman
7c98ffa2b6 Fix MachineSink to be able to sink instructions that use physical registers
which have no defs anywhere in the function. In particular, this fixes sinking
of instructions that reference RIP on x86-64, which is currently being modeled
as a register.

llvm-svn: 82815
2009-09-25 22:53:29 +00:00
Anton Korobeynikov
35078c311e Regenerate
llvm-svn: 82814
2009-09-25 22:53:17 +00:00
Anton Korobeynikov
4e921137da Provide proper masks for neon perfect shuffle table.
I definitely need to read documentation better :(

llvm-svn: 82813
2009-09-25 22:52:29 +00:00
Dan Gohman
090f23c54c Simplify a few more uses of reg_iterator.
llvm-svn: 82812
2009-09-25 22:26:13 +00:00
Dan Gohman
7b662b75a7 Simplify this code by using use_iterator instead of reg_iterator
and skipping the defs.

llvm-svn: 82811
2009-09-25 22:24:52 +00:00
Evan Cheng
c0edc5ee28 Code clean up and prepare for Thumb2 support. No functionality changes.
llvm-svn: 82805
2009-09-25 21:44:53 +00:00
Evan Cheng
ac17fbc5fe Flip -disable-post-RA-scheduler to -post-RA-scheduler.
llvm-svn: 82803
2009-09-25 21:38:11 +00:00
Jeffrey Yasskin
ae5a12200c Fix a compile failure introduced by r82675 on MinGW which doesn't have
setenv().  This patch just disables the test rather than getting putenv() to
work.  Thanks to Sandeep Patel for reporting the problem.

llvm-svn: 82797
2009-09-25 21:07:20 +00:00
Dale Johannesen
53c365d807 Handle sqrt in CannotBeNegativeZero. absf and absl
appear to be misspellings, removed in favor of fabs*.

llvm-svn: 82796
2009-09-25 20:54:50 +00:00
Dan Gohman
0ac693a89e Improve MachineMemOperand handling.
- Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions.
   This eliminates MachineInstr's std::list member and allows the data to be
   created by isel and live for the remainder of codegen, avoiding a lot of
   copying and unnecessary translation. This also shrinks MemSDNode.
 - Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated
   fields for MachineMemOperands.
 - Change MemSDNode to have a MachineMemOperand member instead of its own
   fields with the same information. This introduces some redundancy, but
   it's more consistent with what MachineInstr will eventually want.
 - Ignore alignment when searching for redundant loads for CSE, but remember
   the greatest alignment.

Target-specific code which previously used MemOperandSDNodes with generic
SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range
so that the SelectionDAG framework knows that MachineMemOperand information
is available.

llvm-svn: 82794
2009-09-25 20:36:54 +00:00
Dan Gohman
0c4e55a2f8 Rename getTargetNode to getMachineNode, for consistency with the
naming scheme used in SelectionDAG, where there are multiple kinds
of "target" nodes, but "machine" nodes are nodes which represent
a MachineInstr.

llvm-svn: 82790
2009-09-25 18:54:59 +00:00
David Goodwin
89f5854ddd Finish scheduling itineraries for NEON.
llvm-svn: 82788
2009-09-25 18:38:29 +00:00
Dale Johannesen
228874127f Add readonly to some sin and cos calls; transformations
being checked aren't valid without it.

llvm-svn: 82786
2009-09-25 18:15:29 +00:00
Victor Hernandez
f772c0b8b2 Revert 82694 "Auto-upgrade malloc instructions to malloc calls." because it causes regressions in the nightly tests.
llvm-svn: 82784
2009-09-25 18:11:52 +00:00
Dale Johannesen
b4b27526eb Make sure sin, cos, sqrt calls are marked readonly
before producing FSIN, FCOS, FSQRT.  If they aren't
so marked we have to assume they might set errno.

llvm-svn: 82781
2009-09-25 18:00:35 +00:00
Chris Lattner
7143d73e96 reject attempts to use ()'s in patterns, these are reserved for filecheck.
llvm-svn: 82780
2009-09-25 17:29:36 +00:00
Chris Lattner
2b1f7c6a75 reimplement the regex matching strategy by building a single
regex and matching it instead of trying to match chunks at a time.
Matching chunks at a time broke with check lines like 
  CHECK: foo {{.*}}bar
because the .* would eat the entire rest of the line and bar would
never match.

Now we just escape the fixed strings for the user, so that something
like:
  CHECK: a() {{.*}}???
is matched as:
  CHECK: {{a\(\) .*\?\?\?}}
transparently "under the covers".

llvm-svn: 82779
2009-09-25 17:23:43 +00:00
Dale Johannesen
c137aa03ce Generate FSQRT from calls to the sqrt function, which
allows appropriate backends to generate a sqrt instruction.

On x86, this isn't done at -O0 because we go through
FastISel instead.  This is a behavior change from before
this series of sqrt patches started.  I think this is OK
considering that compile speed is most important at -O0, but
could be convinced otherwise.

llvm-svn: 82778
2009-09-25 17:23:22 +00:00
Chris Lattner
fed266aae9 special case Patterns that are a single fixed string. This is a microscopic
perf win and is needed for future changes.

llvm-svn: 82777
2009-09-25 17:09:12 +00:00
Dale Johannesen
cbafb61a84 Revise C library functions description to be vaguer, per Chris.
llvm-svn: 82776
2009-09-25 17:04:42 +00:00
Jeffrey Yasskin
4321237b78 This patch causes the --enable-debug-runtime configure flag and the
DEBUG_RUNTIME Makefile variable to pass -g to gcc when building LLVM's objects.
Without this, it's very hard to debug crashes that happen in Release-Asserts
mode but not Debug mode.

llvm-svn: 82775
2009-09-25 16:46:09 +00:00
Bob Wilson
c5784025af Add some comments to clarify things that I discovered this week.
llvm-svn: 82773
2009-09-25 16:34:46 +00:00
Daniel Dunbar
827ef5a368 Make llvm-bcanalyzer percentages more readable.
llvm-svn: 82772
2009-09-25 16:04:21 +00:00
Daniel Dunbar
e963728182 Strip trailing whitespace.
llvm-svn: 82771
2009-09-25 16:03:57 +00:00
Bob Wilson
94e29af5ac pr4926: ARM requires the stack pointer to be aligned, even for leaf functions.
For the AAPCS ABI, SP must always be 4-byte aligned, and at any "public
interface" it must be 8-byte aligned.  For the older ARM APCS ABI, the stack
alignment is just always 4 bytes.  For X86, we currently align SP at
entry to a function (e.g., to 16 bytes for Darwin), but no stack alignment
is needed at other times, such as for a leaf function.

After discussing this with Dan, I decided to go with the approach of adding
a new "TransientStackAlignment" field to TargetFrameInfo.  This value
specifies the stack alignment that must be maintained even in between calls.
It defaults to 1 except for ARM, where it is 4.  (Some other targets may
also want to set this if they have similar stack requirements. It's not
currently required for PPC because it sets targetHandlesStackFrameRounding
and handles the alignment in target-specific code.) The existing StackAlignment
value specifies the alignment upon entry to a function, which is how we've
been using it anyway.

llvm-svn: 82767
2009-09-25 14:41:49 +00:00
Duncan Sands
79ffac01fb Print INST_INBOUNDS_GEP rather than UnknownCode30.
Likewise for constant inbounds GEP.

llvm-svn: 82763
2009-09-25 12:28:37 +00:00
Chris Lattner
703289ef20 convert testcases to filecheck.
llvm-svn: 82759
2009-09-25 06:49:41 +00:00
Chris Lattner
2bf0d0ca42 filecheck should not match a \n with a .
llvm-svn: 82758
2009-09-25 06:47:09 +00:00
Chris Lattner
a777d67d34 remove a large unreduced testcase
llvm-svn: 82756
2009-09-25 06:37:22 +00:00
Chris Lattner
a6bcda7a8a turn a std::pair into a real class.
llvm-svn: 82754
2009-09-25 06:32:47 +00:00
Nate Begeman
09ef66c0ec Fix combiner-aa issue with bases which are different, but can alias.
Previously, it treated GV+28 GV+0 as different bases, and assumed they could
not alias.

llvm-svn: 82753
2009-09-25 06:05:26 +00:00
Bob Wilson
841f543880 Update the description of MachineFrameInfo's OffsetAdjustment. The value of
this adjustment does not change the direction or the signs of the object
offsets, and the details of the offset calculations can be target-specific.
Also mention that for most targets this value is only used to generate debug
info.

llvm-svn: 82750
2009-09-25 05:30:55 +00:00
Dan Gohman
b5922580d6 Don't try to use pre-indexed addressing with sthbrx/stwbrx
instructions. This fixes a PowerPC bug exposed by some unrelated
changes I'm working on.

llvm-svn: 82743
2009-09-25 00:57:30 +00:00
Dan Gohman
5c7946a550 Add a version of dumpr() that has a SelectionDAG* argument.
llvm-svn: 82742
2009-09-25 00:34:34 +00:00
Jim Grosbach
3d527ff081 Start of revamping the register scavenging in PEI. ARM Thumb1 is the driving
interest for this, as it currently reserves a register rather than using
the scavenger for matierializing constants as needed.

Instead of scavenging registers on the fly while eliminating frame indices,
new virtual registers are created, and then a scavenged collectively in a
post-pass over the function. This isolates the bits that need to interact
with the scavenger, and sets the stage for more intelligent use, and reuse,
of scavenged registers.

For the time being, this is disabled by default. Once the bugs are worked out,
the current scavenging calls in replaceFrameIndices() will be removed and
the post-pass scavenging will be the default. Until then,
-enable-frame-index-scavenging enables the new code. Currently, only the
Thumb1 back end is set up to use it.

llvm-svn: 82734
2009-09-24 23:52:18 +00:00
Dale Johannesen
6482cefe78 Reenable sqrt IR generation test.
llvm-svn: 82731
2009-09-24 23:37:40 +00:00
Mike Stump
d7a3b26009 Delete space after function name, before (, reflow a comment and
delete a few blank lines.

llvm-svn: 82729
2009-09-24 23:21:26 +00:00
Mike Stump
26e902d371 Fix spacing.
llvm-svn: 82727
2009-09-24 23:11:08 +00:00
Chris Lattner
af2ce37cb3 add and document regex support for FileCheck. You can now do stuff like:
; CHECK: movl {{%e[a-z][xi]}}, %eax

or whatever.

llvm-svn: 82717
2009-09-24 21:47:32 +00:00
Chris Lattner
6f702ad1be unconditionally request MMI
llvm-svn: 82716
2009-09-24 21:45:57 +00:00
Chris Lattner
b1cc232ab2 wrap long lines.
llvm-svn: 82715
2009-09-24 21:44:20 +00:00
Chris Lattner
97cf81c3c6 Use CanonicalizeInputFile to canonicalize the entire buffer containing the
CHECK strings, instead of canonicalizing the patterns directly.  This allows
Pattern to just contain a StringRef instead of std::string.

llvm-svn: 82713
2009-09-24 20:45:07 +00:00