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119 Commits

Author SHA1 Message Date
Reid Spencer
e7ff3305d6 For PR1195: 
Change use of "packed" term to "vector" in comments, strings, variable
names, etc.

llvm-svn: 34300
 2007-02-15 03:39:18 +00:00
Chris Lattner
15fb4ef992 switch the VRBaseMap in the scheduler from an std::map to a DenseMap. This 
speeds up the isel pass from 2.5570s to 2.4722s on kc++ (3.4%).

llvm-svn: 33879
 2007-02-04 08:47:20 +00:00
Jim Laskey
23ed7d2625 Make LABEL a builtin opcode. 
llvm-svn: 33537
 2007-01-26 14:34:52 +00:00
Evan Cheng
bfd7e70770 Renamed getTypeAlignmentShift() to getPreferredTypeAlignmentShift(). 
llvm-svn: 33482
 2007-01-24 07:03:39 +00:00
Evan Cheng
cea1d1c5f8 Remove the DoubleTy special case. 
llvm-svn: 33449
 2007-01-22 23:13:55 +00:00
Reid Spencer
6d0992dc3d Compensate for loss of DerivedTypes.h in TargetLowering.h 
llvm-svn: 33159
 2007-01-12 23:31:12 +00:00
Evan Cheng
237ec557ae CopyToReg source operand can be a register as well. e.g. Copy from GlobalBaseReg. 
llvm-svn: 32929
 2007-01-05 20:59:06 +00:00
Bill Wendling
23b8b13c9d Removing even more <iostream> includes. 
llvm-svn: 32320
 2006-12-07 20:04:42 +00:00
Evan Cheng
bf13611e84 Match TargetInstrInfo changes. 
llvm-svn: 32098
 2006-12-01 21:52:58 +00:00
Evan Cheng
98fa7ab4d7 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 
of opcode and number of operands.

llvm-svn: 31947
 2006-11-27 23:37:22 +00:00
Evan Cheng
0e82270ff2 Matches MachineInstr changes. 
llvm-svn: 31712
 2006-11-13 23:36:35 +00:00
Evan Cheng
7dab9abfb8 Add methods to add implicit def use operands to a MI. 
llvm-svn: 31675
 2006-11-11 10:20:02 +00:00
Evan Cheng
013597778d Add implicit def / use operands to MachineInstr. 
llvm-svn: 31633
 2006-11-10 08:43:01 +00:00
Evan Cheng
42cb1fd0ac Changes to use operand constraints to process two-address instructions. 
llvm-svn: 31453
 2006-11-04 09:44:31 +00:00
Chris Lattner
3bc1ad2c4a handle global address constant sdnodes 
llvm-svn: 31323
 2006-10-31 20:01:56 +00:00
Evan Cheng
bfd74c6d9c Debug tweak. 
llvm-svn: 30959
 2006-10-14 08:34:06 +00:00
Evan Cheng
499d77553a Added support for machine specific constantpool values. These are useful for 
representing expressions that can only be resolved at link time, etc.

llvm-svn: 30278
 2006-09-12 21:00:35 +00:00
Chris Lattner
9cd4e3429e Completely eliminate def&use operands. Now a register operand is EITHER a 
def operand or a use operand.

llvm-svn: 30109
 2006-09-05 02:31:13 +00:00
Chris Lattner
a2eba83561 switch the SUnit pred/succ sets from being std::sets to being smallvectors. 
This reduces selectiondag time on kc++ from 5.43s to 4.98s (9%).  More
significantly, this speeds up the default ppc scheduler from ~1571ms to 1063ms,
a 33% speedup.

llvm-svn: 29743
 2006-08-17 00:09:56 +00:00
Evan Cheng
0853250689 Reverse the FlaggedNodes after scanning up for flagged preds or else the order would be reversed. 
llvm-svn: 29545
 2006-08-07 22:12:12 +00:00
Jim Laskey
a67adda697 Use an enumeration to eliminate data relocations. 
llvm-svn: 29249
 2006-07-21 20:57:35 +00:00
Jim Laskey
d19ba2cf6c It was pointed out that DEBUG() is only available with -debug. 
llvm-svn: 29106
 2006-07-11 18:25:13 +00:00
Jim Laskey
4c0d841280 Ensure that dump calls that are associated with asserts are removed from 
non-debug build.

llvm-svn: 29105
 2006-07-11 17:58:07 +00:00
Evan Cheng
07d8ccec50 Instructions with variable operands (variable_ops) can have a number required 
operands. e.g.
def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops),
                "call {*}$dst", [(X86call GR32:$dst)]>;
TableGen should emit operand informations for the "required" operands.

Added a target instruction info flag M_VARIABLE_OPS to indicate the target
instruction may have more operands in addition to the minimum required
operands.

llvm-svn: 28791
 2006-06-15 07:22:16 +00:00
Evan Cheng
5b6029f577 commuteInstruction() does not always create a new MI! 
llvm-svn: 28592
 2006-05-31 18:03:39 +00:00
Evan Cheng
6a09baaff4 Eliminate a memory leak. 
llvm-svn: 28585
 2006-05-31 07:13:03 +00:00
Evan Cheng
00c1318055 lib/Target/Target.td 
llvm-svn: 28386
 2006-05-18 20:42:07 +00:00
Chris Lattner
fdd62b9073 Move function-live-in-handling code from the sdisel code to the scheduler. 
This code should be emitted after legalize, so it can't be in sdisel.

Note that the EmitFunctionEntryCode hook should be updated to operate on the
DAG.  The X86 backend is the only one currently using this hook.

llvm-svn: 28315
 2006-05-16 06:10:58 +00:00
Evan Cheng
489f9bd68f Fixing 2006-05-01-SchedCausingSpills.ll; some clean up 
llvm-svn: 28279
 2006-05-13 08:22:24 +00:00
Owen Anderson
29e4d70aed Refactor a bunch of includes so that TargetMachine.h doesn't have to include 
TargetData.h.  This should make recompiles a bit faster with my current
TargetData tinkering.

llvm-svn: 28238
 2006-05-12 06:33:49 +00:00
Evan Cheng
c24d0f281c Duh. That could take a long time. 
llvm-svn: 28235
 2006-05-12 06:05:18 +00:00
Evan Cheng
0b8e4bca80 Add capability to scheduler to commute nodes for profit. 
If a two-address code whose first operand has uses below, it should be commuted
when possible.

llvm-svn: 28230
 2006-05-12 01:58:24 +00:00
Evan Cheng
cb2a0f392c Refactor scheduler code. Move register-reduction list scheduler to a 
separate file. Added an initial implementation of top-down register pressure
reduction list scheduler.

llvm-svn: 28226
 2006-05-11 23:55:42 +00:00
Chris Lattner
075404adaa Remove and simplify some more machineinstr/machineoperand stuff. 
llvm-svn: 28105
 2006-05-04 18:16:01 +00:00
Chris Lattner
eb41c99161 Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling. 
llvm-svn: 28104
 2006-05-04 18:05:43 +00:00
Chris Lattner
c779fca289 Remove a bunch more SparcV9 specific stuff 
llvm-svn: 28093
 2006-05-04 01:15:02 +00:00
Owen Anderson
71bc529dfa Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference. 
This fixes PR 759.

llvm-svn: 28074
 2006-05-03 01:29:57 +00:00
Nate Begeman
7ed816f900 JumpTable support! What this represents is working asm and jit support for 
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.

llvm-svn: 27947
 2006-04-22 18:53:45 +00:00
Chris Lattner
b2b32e9283 fix spello 
llvm-svn: 27053
 2006-03-24 07:15:07 +00:00
Chris Lattner
9fc969612c TargetData doesn't know the alignment of vectors :( 
llvm-svn: 26884
 2006-03-20 01:51:46 +00:00
Chris Lattner
da5f77e3cf Move some simple-sched-specific instance vars to the simple scheduler. 
llvm-svn: 26690
 2006-03-10 07:42:02 +00:00
Chris Lattner
ec2c5aa0bb prune #includes 
llvm-svn: 26689
 2006-03-10 07:37:35 +00:00
Chris Lattner
808cc02983 move some simple scheduler methods into the simple scheduler 
llvm-svn: 26688
 2006-03-10 07:35:21 +00:00
Chris Lattner
89a5a946f5 Make EmitNode take a SDNode instead of a NodeInfo* 
llvm-svn: 26687
 2006-03-10 07:28:36 +00:00
Chris Lattner
3f870d581e Move the VRBase field from NodeInfo to being a separate, explicit, map. 
llvm-svn: 26686
 2006-03-10 07:25:12 +00:00
Chris Lattner
ed528a5652 Push PrepareNodeInfo/IdentifyGroups down the inheritance hierarchy 
llvm-svn: 26682
 2006-03-10 06:34:51 +00:00
Chris Lattner
3f23d22d3f Change the interface for getting a target HazardRecognizer to be more clean. 
llvm-svn: 26608
 2006-03-08 04:25:59 +00:00
Chris Lattner
5c28fdcae8 When a hazard recognizer needs noops to be inserted, do so. This represents 
noops as null pointers in the instruction sequence.

llvm-svn: 26564
 2006-03-05 23:51:47 +00:00
Evan Cheng
026fd6af96 Added an offset field to ConstantPoolSDNode. 
llvm-svn: 26371
 2006-02-25 09:54:52 +00:00
Chris Lattner
22356863a0 Pass all the flags to the asm printer, not just the # operands. 
llvm-svn: 26362
 2006-02-24 19:50:58 +00:00