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Commit Graph

93 Commits

Author SHA1 Message Date
Dan Gohman
ec3b31e7eb Change the scheduler accessor methods to accept an explicit TargetMachine
argument instead of taking the SelectionDAG's TargetMachine. This is
needed for some upcoming scheduler changes.

llvm-svn: 59055
2008-11-11 17:50:47 +00:00
Dan Gohman
9543edc4ef Fix command-line option printing to print two spaces where needed,
instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.

llvm-svn: 57521
2008-10-14 20:25:08 +00:00
Dan Gohman
8981962672 Add a new function, ReplaceAllUsesOfValuesWith, which handles bulk
replacement of multiple values. This is slightly more efficient
than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically
could be optimized even further. However, an important property of this
new function is that it handles the case where the source value set and
destination value set overlap. This makes it feasible for isel to use
SelectNodeTo in many very common cases, which is advantageous because
SelectNodeTo avoids a temporary node and it doesn't require CSEMap
updates for users of values that don't change position.

Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to
handle operand lists more efficiently, and to correctly handle a number
of corner cases to which its new wider use exposes it.

This commit also includes a change to the encoding of post-isel opcodes
in SDNodes; now instead of being sandwiched between the target-independent
pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel
opcodes are now represented as negative values. This makes it possible
to test if an opcode is pre-isel or post-isel without having to know
the size of the current target's post-isel instruction set.

These changes speed up llc overall by 3% and reduce memory usage by 10%
on the InstructionCombining.cpp testcase with -fast and -regalloc=local.

llvm-svn: 53728
2008-07-17 19:10:17 +00:00
Dan Gohman
e76fd33ee5 Reapply 53476 and 53480, with a fix so that it properly updates
the BB member to the current basic block after emitting
instructions.

llvm-svn: 53567
2008-07-14 18:19:29 +00:00
Evan Cheng
ebf7ff4531 Back out 53476 and 53480 for now. Somehow they cause llc to miscompile 179.art.
llvm-svn: 53502
2008-07-12 01:38:51 +00:00
Dan Gohman
3b91ef27b5 Factor out debugging code into the common base class.
llvm-svn: 53480
2008-07-11 22:36:22 +00:00
Dan Gohman
6ee2195ab1 Add support for putting NamedRegionTimers in TimerGroups, and
use a timer group for the timers in SelectionDAGISel. Also,
Split scheduling out from emitting, to give each their own
timer.

llvm-svn: 53476
2008-07-11 21:54:34 +00:00
Evan Cheng
67ce381ffe Do not use computationally expensive scheduling heuristics with -fast.
llvm-svn: 52971
2008-07-01 18:05:03 +00:00
Dan Gohman
95743e3078 Use the new PriorityQueue in ScheduleDAGList too, which also
needs arbitrary-element removal.

llvm-svn: 52654
2008-06-23 23:40:09 +00:00
Dan Gohman
015a5ca374 Remove ScheduleDAG's SUnitMap altogether. Instead, use SDNode's NodeId
field, which is otherwise unused after instruction selection, as an index
into the SUnit array.

llvm-svn: 52583
2008-06-21 19:18:17 +00:00
Dan Gohman
3a5a96e045 Change ScheduleDAG's SUnitMap from DenseMap<SDNode*, vector<SUnit*> >
to DenseMap<SDNode*, SUnit*>, and adjust the way cloned SUnit nodes are
handled so that only the original node needs to be in the map.
This speeds up llc on 447.dealII.llvm.bc by about 2%.

llvm-svn: 52576
2008-06-21 15:52:51 +00:00
Dan Gohman
3b99b3c807 Treat EntryToken nodes as "passive" so that they aren't added to the
ScheduleDAG; they don't correspond to any actual instructions so they
don't need to be scheduled.

This fixes a bug where the EntryToken was being scheduled multiple
times in some cases, though it ended up not causing any trouble because 
EntryToken doesn't expand into anything. With this fixed the schedulers
reliably schedule the expected number of units, so we can check this
with an assertion.

This requires a tweak to test/CodeGen/X86/loop-hoist.ll because it
ends up getting scheduled differently in a trivial way, though it was
enough to fool the prcontext+grep that the test does.

llvm-svn: 49701
2008-04-15 01:22:18 +00:00
Dan Gohman
cabaec582f Rename MRegisterInfo to TargetRegisterInfo.
llvm-svn: 46930
2008-02-10 18:45:23 +00:00
Dan Gohman
aad233ea10 Use empty() instead of comparing size() with zero.
llvm-svn: 46514
2008-01-29 13:02:09 +00:00
Chris Lattner
96167aa93c Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

llvm-svn: 45467
2007-12-31 04:13:23 +00:00
Chris Lattner
ad9a6ccb83 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Evan Cheng
3650ad3e51 Make CalcLatency() non-recursive.
llvm-svn: 43017
2007-10-15 21:33:22 +00:00
Evan Cheng
71904c241e Trim some unneeded fields.
llvm-svn: 42442
2007-09-28 19:24:24 +00:00
Evan Cheng
6d8f155a63 Added major new capabilities to scheduler (only BURR for now) to support physical register dependency. The BURR scheduler can now backtrace and duplicate instructions in order to avoid "expensive / impossible to copy" values (e.g. status flag EFLAGS for x86) from being clobbered.
llvm-svn: 42284
2007-09-25 01:54:36 +00:00
Evan Cheng
4a117958df Use struct SDep instead of std::pair for SUnit pred and succ lists. First step
in tracking physical register output dependencies.

llvm-svn: 42125
2007-09-19 01:38:40 +00:00
Dale Johannesen
469ed8e17e Skeleton of post-RA scheduler; doesn't do anything yet.
Change name of -sched option and DEBUG_TYPE to
pre-RA-sched; adjust testcases.

llvm-svn: 39816
2007-07-13 17:13:54 +00:00
Chris Lattner
b35593a1c5 switch the sched unit map over to use a DenseMap instead of std::map. This
speeds up isel as a whole time by 2.6%.

llvm-svn: 33810
2007-02-03 01:34:13 +00:00
Chris Lattner
a975b95adb Eliminate static ctors from Statistics
llvm-svn: 32698
2006-12-19 22:41:21 +00:00
Bill Wendling
23b8b13c9d Removing even more <iostream> includes.
llvm-svn: 32320
2006-12-07 20:04:42 +00:00
Chris Lattner
a531ce882e Detemplatize the Statistic class. The only type it is instantiated with
is 'unsigned'.

llvm-svn: 32279
2006-12-06 17:46:33 +00:00
Evan Cheng
42cb1fd0ac Changes to use operand constraints to process two-address instructions.
llvm-svn: 31453
2006-11-04 09:44:31 +00:00
Chris Lattner
33bd5dcfb7 s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|
llvm-svn: 29911
2006-08-27 12:54:02 +00:00
Chris Lattner
a2eba83561 switch the SUnit pred/succ sets from being std::sets to being smallvectors.
This reduces selectiondag time on kc++ from 5.43s to 4.98s (9%).  More
significantly, this speeds up the default ppc scheduler from ~1571ms to 1063ms,
a 33% speedup.

llvm-svn: 29743
2006-08-17 00:09:56 +00:00
Jim Laskey
6d121090d3 Final polish on machine pass registries.
llvm-svn: 29471
2006-08-02 12:30:23 +00:00
Jim Laskey
f5e160063e 1. Change use of "Cache" to "Default".
2. Added argument to instruction scheduler creators so the creators can do
special things.
3. Repaired target hazard code.
4. Misc.

More to follow.

llvm-svn: 29450
2006-08-01 18:29:48 +00:00
Jim Laskey
b92b14f422 Introducing plugable register allocators and instruction schedulers.
llvm-svn: 29434
2006-08-01 14:21:23 +00:00
Andrew Lenharth
c1074954fb Reduce number of exported symbols
llvm-svn: 29220
2006-07-20 17:28:38 +00:00
Chris Lattner
de706b3e3e Shave another 27K off libllvmgcc.dylib with visibility hidden
llvm-svn: 28973
2006-06-28 22:17:39 +00:00
Evan Cheng
7e0c2d106e When a priority_queue is empty, the behavior of top() operator is
non-deterministic. Returns NULL when it's empty!

llvm-svn: 28560
2006-05-30 18:04:34 +00:00
Owen Anderson
29e4d70aed Refactor a bunch of includes so that TargetMachine.h doesn't have to include
TargetData.h.  This should make recompiles a bit faster with my current
TargetData tinkering.

llvm-svn: 28238
2006-05-12 06:33:49 +00:00
Evan Cheng
cb2a0f392c Refactor scheduler code. Move register-reduction list scheduler to a
separate file. Added an initial implementation of top-down register pressure
reduction list scheduler.

llvm-svn: 28226
2006-05-11 23:55:42 +00:00
Evan Cheng
9f269c1bef Templatify RegReductionPriorityQueue
llvm-svn: 28212
2006-05-10 06:16:44 +00:00
Evan Cheng
1a8feb189e Add pseudo dependency to force a def&use operand to be scheduled last (unless
the distance between the def and another use is much longer). This is under
option control for now "-sched-lower-defnuse".

llvm-svn: 28201
2006-05-09 07:13:34 +00:00
Jeff Cohen
953baf0494 Fix VC++ compilation error.
llvm-svn: 28117
2006-05-05 01:47:05 +00:00
Evan Cheng
ceb7645d40 Initial support for register pressure aware scheduling. The register reduction
scheduler can go into a "vertical mode" (i.e. traversing up the two-address
chain, etc.) when the register pressure is low.
This does seem to reduce the number of spills in the cases I've looked at. But
with x86, it's no guarantee the performance of the code improves.
It can be turned on with -sched-vertically option.

llvm-svn: 28108
2006-05-04 19:16:39 +00:00
Evan Cheng
2922daab4b Bottom up register pressure reduction work: clean up some hacks and enhanced
the heuristic to further reduce spills for several test cases. (Note, it may
not necessarily translate to runtime win!)

llvm-svn: 28076
2006-05-03 02:10:45 +00:00
Evan Cheng
44e851f6ec Dis-favor stores more
llvm-svn: 28035
2006-05-01 09:20:44 +00:00
Evan Cheng
494e47d755 Bottom up register-pressure reduction scheduler now pushes store operations
up the schedule. This helps code that looks like this:

loads ...
computations (first set) ...
stores (first set) ...
loads
computations (seccond set) ...
stores (seccond set) ...

Without this change, the stores and computations are more likely to
interleave:

loads ...
loads ...
computations (first set) ...
computations (second set) ...
computations (first set) ...
stores (first set) ...
computations (second set) ...
stores (stores set) ...

This can increase the number of spills if we are unlucky.

llvm-svn: 28033
2006-05-01 09:14:40 +00:00
Evan Cheng
94264c7c90 Didn't mean ScheduleDAGList.cpp to make the last checkin.
llvm-svn: 28030
2006-05-01 08:56:34 +00:00
Evan Cheng
ef706b77c4 Remove temp. option -spiller-check-liveout, it didn't cause any failure nor performance regressions.
llvm-svn: 28029
2006-05-01 08:54:57 +00:00
Chris Lattner
a54a9d83c3 Don't advance the hazard recognizer when there are no hazards and no instructions
to be emitted.

Don't add one to the latency of a completed instruction if the latency of the
op is 0.

llvm-svn: 26718
2006-03-12 09:01:41 +00:00
Chris Lattner
aea53fc36f Chain operands aren't real uses: they don't require the full latency of the
predecessor to finish before they can start.

llvm-svn: 26717
2006-03-12 03:52:09 +00:00
Chris Lattner
7396b82585 As a pending queue data structure to keep track of instructions whose
operands have all issued, but whose results are not yet available.  This
allows us to compile:

int G;
int test(int A, int B, int* P) {
   return (G+A)*(B+1);
}

to:

_test:
        lis r2, ha16(L_G$non_lazy_ptr)
        addi r4, r4, 1
        lwz r2, lo16(L_G$non_lazy_ptr)(r2)
        lwz r2, 0(r2)
        add r2, r2, r3
        mullw r3, r2, r4
        blr

instead of this, which has a stall between the lis/lwz:

_test:
        lis r2, ha16(L_G$non_lazy_ptr)
        lwz r2, lo16(L_G$non_lazy_ptr)(r2)
        addi r4, r4, 1
        lwz r2, 0(r2)
        add r2, r2, r3
        mullw r3, r2, r4
        blr

llvm-svn: 26716
2006-03-12 00:38:57 +00:00
Chris Lattner
62eafde9c1 rename priorityqueue -> availablequeue. When a node is scheduled, remember
which cycle it lands on.

llvm-svn: 26714
2006-03-11 22:44:37 +00:00
Chris Lattner
04ada12cb7 Make CurrCycle a local var instead of an instance var
llvm-svn: 26713
2006-03-11 22:34:41 +00:00