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8127d9ce82
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2465 Commits

Author SHA1 Message Date
Bill Wendling
8127d9ce82 Update. 
llvm-svn: 36407
 2007-04-24 21:20:03 +00:00
Bill Wendling
54134a37e0 Add the PADDQ to the list. 
llvm-svn: 36406
 2007-04-24 21:19:14 +00:00
Bill Wendling
498c102df6 Add the final MMX instructions. Correct a few wrong patterns. 
llvm-svn: 36405
 2007-04-24 21:18:37 +00:00
Bill Wendling
fed8496c6b Remove some invalid instructions from this check. 
llvm-svn: 36404
 2007-04-24 21:17:46 +00:00
Bill Wendling
6856e741fa Support for the special case of a vector with the canonical form: 
vector_shuffle v1, v2, <2, 6, 3, 7>

I.e.

         vector_shuffle v, undef, <2, 2, 3, 3>

MMX only has a shuffle for v4i16 vectors. It needs to use the unpackh for
this type of operation.

llvm-svn: 36403
 2007-04-24 21:16:55 +00:00
Lauro Ramos Venancio
b75c6c5cbc X86 TLS: optimize the implementation of "local exec" model. 
llvm-svn: 36359
 2007-04-23 01:28:10 +00:00
Lauro Ramos Venancio
b1a101f0e7 X86 TLS: fix and optimize the implementation of "initial exec" model. 
llvm-svn: 36355
 2007-04-22 22:50:52 +00:00
Lauro Ramos Venancio
3b60b9546e X86 TLS: Implement review feedback. 
llvm-svn: 36318
 2007-04-21 20:56:26 +00:00
Jeff Cohen
2afa206eb3 Comment out usage of write() for now. 
llvm-svn: 36287
 2007-04-20 22:40:10 +00:00
Lauro Ramos Venancio
bc32d90b46 Implement "general dynamic", "initial exec" and "local exec" TLS models for 
X86 32 bits.

llvm-svn: 36283
 2007-04-20 21:38:10 +00:00
Evan Cheng
a7f94abf95 Specify sub-register relations. e.g. RAX: [EAX], EAX: [AX], AX: [AL,AH]. 
llvm-svn: 36279
 2007-04-20 21:15:21 +00:00
Jeff Cohen
a2a6fab9b5 Make Microsoft assembler and linker happy. 
llvm-svn: 36265
 2007-04-20 00:33:54 +00:00
Dan Gohman
bdb94669ba Fix the spelling of the prefetchnta instruction. 
llvm-svn: 36256
 2007-04-18 14:09:14 +00:00
Anton Korobeynikov
60de2ce283 Add comment 
llvm-svn: 36213
 2007-04-17 19:34:00 +00:00
Chris Lattner
c7109ece27 rename X86FunctionInfo to X86MachineFunctionInfo to match the header file 
it is defined in.

llvm-svn: 36196
 2007-04-17 17:21:52 +00:00
Anton Korobeynikov
9bc4b792bf Implemented correct stack probing on mingw/cygwin for dynamic alloca's. 
Also, fixed static case in presence of eax livin. This fixes PR331

PS: Why don't we still have push/pop instructions? :)
llvm-svn: 36195
 2007-04-17 09:20:00 +00:00
Chris Lattner
be225f5300 SSE4 is apparently public now. 
llvm-svn: 36185
 2007-04-17 00:02:37 +00:00
Jeff Cohen
279c95b9a7 In the event that some really old non-Intel or -AMD CPU is encountered... 
llvm-svn: 36177
 2007-04-16 21:59:44 +00:00
Jeff Cohen
e6b60c9525 Before assuming that the original code didn't work for Athlon64, the person who 
replaced it with a FIXME should have determined what did work.  Then he would have
realized that the code was in fact correct, and would have avoided breaking it.

llvm-svn: 36173
 2007-04-16 21:48:58 +00:00
Anton Korobeynikov
f3e62a428a Removed tabs everywhere except autogenerated & external files. Add make 
target for tabs checking.

llvm-svn: 36146
 2007-04-16 18:10:23 +00:00
Chris Lattner
6fbfbf6622 add a note 
llvm-svn: 36028
 2007-04-14 23:06:09 +00:00
Chris Lattner
2b6b79b896 Fix mmx paddq, add support for the 'y' register class, though it isn't tested. 
llvm-svn: 35940
 2007-04-12 04:14:49 +00:00
Chris Lattner
b97b122176 Fix CodeGen/X86/2007-03-24-InlineAsmPModifier.ll 
llvm-svn: 35926
 2007-04-11 22:29:46 +00:00
Chris Lattner
b7448f6187 done 
llvm-svn: 35884
 2007-04-11 05:34:00 +00:00
Bill Wendling
3b1189afbf Add support for our first SSSE3 instruction "pmulhrsw". 
llvm-svn: 35869
 2007-04-10 22:10:25 +00:00
Chris Lattner
60f3ece40f new micro optzn 
llvm-svn: 35867
 2007-04-10 21:14:01 +00:00
Chris Lattner
3f9ff05309 remove some dead hooks 
llvm-svn: 35845
 2007-04-09 23:31:19 +00:00
Chris Lattner
ae6e2c0ee5 remove some dead target hooks, subsumed by isLegalAddressingMode 
llvm-svn: 35840
 2007-04-09 22:27:04 +00:00
Chris Lattner
de148c7887 move a bunch of register constraints from being handled by 
getRegClassForInlineAsmConstraint to being handled by
getRegForInlineAsmConstraint.  This allows us to let the llvm register allocator
allocate, which gives us better code.  For example, X86/2007-01-29-InlineAsm-ir.ll
used to compile to:

_run_init_process:
        subl $4, %esp
        movl %ebx, (%esp)
        xorl %ebx, %ebx
        movl $11, %eax
        movl %ebx, %ecx
        movl %ebx, %edx
        # InlineAsm Start
        push %ebx ; movl %ebx,%ebx ; int $0x80 ; pop %ebx
        # InlineAsm End

Now we get:
_run_init_process:
        xorl %ecx, %ecx
        movl $11, %eax
        movl %ecx, %edx
        # InlineAsm Start
        push %ebx ; movl %ecx,%ebx ; int $0x80 ; pop %ebx
        # InlineAsm End

llvm-svn: 35804
 2007-04-09 05:49:22 +00:00
Chris Lattner
b940a717ac implement support for CodeGen/X86/inline-asm-x-scalar.ll:test3 - i32/i64 values 
used with x constraints.

llvm-svn: 35803
 2007-04-09 05:31:48 +00:00
Chris Lattner
e2d3bf8ecf implement CodeGen/X86/inline-asm-x-scalar.ll 
llvm-svn: 35799
 2007-04-09 05:11:28 +00:00
Bill Wendling
a4aa65bc38 Adding more MMX instructions. 
llvm-svn: 35638
 2007-04-03 23:48:32 +00:00
Chris Lattner
78271f0596 make a new missing features section 
llvm-svn: 35637
 2007-04-03 23:41:34 +00:00
Bill Wendling
ff2c460267 Updated 
llvm-svn: 35634
 2007-04-03 23:37:20 +00:00
Bill Wendling
a2eabd50c0 Changed to new MMX_ recipes. 
llvm-svn: 35617
 2007-04-03 06:18:31 +00:00
Bill Wendling
ca2124e5a9 Add FEMMS and ADDQ. Renamed MMX recipes to prepend the MMX_ to them. 
llvm-svn: 35616
 2007-04-03 06:00:37 +00:00
Chris Lattner
4fb170e47b fix breakage from last night, simplify code. 
llvm-svn: 35560
 2007-04-01 20:49:36 +00:00
Anton Korobeynikov
db09256c9f Consistency with native compilers 
llvm-svn: 35532
 2007-03-31 13:11:52 +00:00
Bill Wendling
8f16f4bf9c Fix comment. 
llvm-svn: 35531
 2007-03-31 09:36:12 +00:00
Bill Wendling
0cba5d3c15 Match GCC's MMX calling convention. 
llvm-svn: 35523
 2007-03-31 01:03:53 +00:00
Chris Lattner
c0405a348d implement the new addressing mode description hook. 
llvm-svn: 35521
 2007-03-30 23:15:24 +00:00
Bill Wendling
503f3e41f6 Add MMX calling conventions. 
llvm-svn: 35489
 2007-03-30 00:35:22 +00:00
Bill Wendling
0549ae5cdb Made this into a bug report: PR1286 
llvm-svn: 35439
 2007-03-28 19:07:34 +00:00
Anton Korobeynikov
1a8740c88b Oops :) 
llvm-svn: 35438
 2007-03-28 18:38:33 +00:00
Anton Korobeynikov
d59c4e54c7 Don't allow MatchAddress recurse too much. This trims exponential 
behaviour in some cases.

llvm-svn: 35437
 2007-03-28 18:36:33 +00:00
Chris Lattner
a710f7442c add a note 
llvm-svn: 35435
 2007-03-28 18:17:19 +00:00
Chris Lattner
26a37bfd6a Compile CodeGen/X86/lea-3.ll:test2 to: 
_test3:
        leaq (,%rdi,4), %rax
        orq %rdi, %rax
        ret

instead of:
_test2:
        movq %rdi, %rax
        shlq $2, %rax
        orq %rdi, %rax
        ret

llvm-svn: 35434
 2007-03-28 18:12:31 +00:00
Chris Lattner
1f18012438 Dan pointed out that this is done, remove it! 
llvm-svn: 35430
 2007-03-28 17:26:52 +00:00
Bill Wendling
e8eccb1684 Remove cruft I put in there... 
llvm-svn: 35394
 2007-03-28 01:02:54 +00:00
Chris Lattner
9f59529c61 Fix a problem building llvm-gcc on amd64-unknown-freebsd6.2, due to the 
system assembler not groking legal instructions like "leal (,%esi,8), %ecx".

llvm-svn: 35393
 2007-03-28 00:58:40 +00:00