Jim Grosbach
7bd79eb9e8
Fix formatting of output .s code
...
llvm-svn: 114705
2010-09-23 23:03:26 +00:00
Owen Anderson
15c6948d29
Add isConditionalMove bits to X86 and ARM instructions.
...
llvm-svn: 114703
2010-09-23 22:57:01 +00:00
Bob Wilson
026ef4b7f8
Set alignment operand for NEON VLD instructions.
...
llvm-svn: 114696
2010-09-23 21:43:54 +00:00
Rafael Espindola
4b0d25a0db
Correctly handle weak undefined symbols. Before we would get a invalid binding
...
(2 == STB_WEAK | STB_GLOBAL).
llvm-svn: 114690
2010-09-23 19:55:14 +00:00
Jim Grosbach
15096f056a
never mind. I can't read, apparently
...
llvm-svn: 114689
2010-09-23 19:42:17 +00:00
Evan Cheng
57ed0f6439
Fix r114632. Return if the only terminator is an unconditional branch after the redundant ones are deleted.
...
llvm-svn: 114688
2010-09-23 19:42:03 +00:00
Jim Grosbach
a6816c40db
Fix opcode value for the 'trap' instruction, keeping the type suffix on the
...
constant. Hopefully the non-Darwin bots will like it...
llvm-svn: 114687
2010-09-23 19:32:40 +00:00
Jim Grosbach
a21f51b48f
explicit 'unsigned long' on constant value. Hopefully make bots happier.
...
llvm-svn: 114686
2010-09-23 19:08:04 +00:00
Benjamin Kramer
09fb37512b
Unbreak build. Jim, please review.
...
llvm-svn: 114684
2010-09-23 18:57:26 +00:00
Evan Cheng
d24bf49867
Revert 114634 for now since buildbot claim it broke Clang self-hosting. I doubt it but it's possible it's exposing another bug somewhere.
...
llvm-svn: 114681
2010-09-23 18:32:19 +00:00
Jim Grosbach
bcafcce601
Clean up the 'trap' instruction printing a bit. Non-Darwin assemblers don't
...
(yet) recognize the 'trap' mnemonic, so we use .short/.long to emit the
opcode directly. On Darwin, however, we do want the mnemonic for more
readable assembly code and better disassembly.
Adjust the .td file to use the 'trap' mnemonic and handle using the binutils
workaround in the assembly printer. Also tweak the formatting of the opcode
values to make them consistent between the MC printer and the old printer.
llvm-svn: 114679
2010-09-23 18:05:37 +00:00
Rafael Espindola
44da043992
Correctly compute the offset of the symbol. Forgot these bits from the
...
last commit.
llvm-svn: 114678
2010-09-23 18:01:31 +00:00
Jim Grosbach
2ae71e0880
nuke unused var
...
llvm-svn: 114676
2010-09-23 17:58:00 +00:00
Rafael Espindola
ce04ba0f70
Represent relocations against local symbols as relocations against the section
...
they are in. Both ways should be equivalent, but gas produces relocations
against the section.
Roman wrote the patch, I added the test.
llvm-svn: 114667
2010-09-23 17:25:18 +00:00
Bob Wilson
0fdee121f7
Fix llvm-extract so that it changes the linkage of all GlobalValues to
...
"external" even when doing lazy bitcode loading. This was broken because
a function that is not materialized fails the !isDeclaration() test.
llvm-svn: 114666
2010-09-23 17:25:06 +00:00
Oscar Fuentes
b58181793d
Fix VS 2010 build.
...
Patch by Nathan Jeffords!
llvm-svn: 114661
2010-09-23 16:59:36 +00:00
Rafael Espindola
4f8e36e163
Fix the FIXME.
...
llvm-svn: 114639
2010-09-23 14:14:56 +00:00
Evan Cheng
8266c28b96
Follow up to r114630. Do not optimize away unconditional branch following a conditional one.
...
llvm-svn: 114634
2010-09-23 07:18:35 +00:00
Evan Cheng
1493b1799e
Disable codegen prepare critical edge splitting. Machine instruction passes now
...
break critical edges on demand.
llvm-svn: 114633
2010-09-23 06:55:34 +00:00
Evan Cheng
ef7b4a9bd4
If there are multiple unconditional branches terminating a block, eliminate all
...
but the first one. Those will never be executed. There was logic to do this
but it was faulty.
llvm-svn: 114632
2010-09-23 06:54:40 +00:00
Evan Cheng
4d7157b246
Don't sink insert_subreg, subreg_to_reg, reg_sequence. They are meant to be
...
close to their sources to facilitate coalescing.
llvm-svn: 114631
2010-09-23 06:53:00 +00:00
Evan Cheng
3866797d9a
SDISel should not optimize a unconditional branch following a conditional branch
...
when the unconditional branch destination is the fallthrough block. The
canonicalization makes it easier to allow optimizations on DAGs to invert
conditional branches. The branch folding pass (and AnalyzeBranch) will clean up
the unnecessary unconditional branches later.
This is one of the patches leading up to disabling codegen prepare critical edge
splitting.
llvm-svn: 114630
2010-09-23 06:51:55 +00:00
Lang Hames
f670bff621
Moved the PBQP allocator class out of the header and back in to the cpp file to hide the gory details.
...
Allocator instances can now be created by calling createPBQPRegisterAllocator.
Tidied up use of CoalescerPair as per Jakob's suggestions.
Made the new PBQPBuilder based construction process the default. The internal construction process
remains in-place and available via -pbqp-builder=false for now. It will be removed shortly if the new
process doesn't cause any regressions.
llvm-svn: 114626
2010-09-23 04:28:54 +00:00
Sean Callanan
389f8119e1
Fixed a crash in the enhanced disassembler where
...
because of the lack of a newline, AsmToken::Eof
was being found instead of AsmToken::EndOfStatement.
llvm-svn: 114621
2010-09-23 02:14:12 +00:00
Jim Grosbach
d8735f1db1
Add support for ELF PLT references for ARM MC asm printing. Adding a
...
new VariantKind to the MCSymbolExpr seems like overkill, but I'm not sure
there's a more straightforward way to get the printing difference captured.
(i.e., x86 uses @PLT, ARM uses (PLT)).
llvm-svn: 114613
2010-09-22 23:27:36 +00:00
Jim Grosbach
bfcaec30d6
Enable a few additional asserts in MC instruction lowering.
...
llvm-svn: 114601
2010-09-22 23:01:28 +00:00
Owen Anderson
7d6373ea9d
A select between a constant and zero, when fed by a bit test, can be efficiently
...
lowered using a series of shifts.
Fixes <rdar://problem/8285015>.
llvm-svn: 114599
2010-09-22 22:58:22 +00:00
Cameron Esfahani
662193bddc
Fix PR8201: Update the code to call via X86::CALL64pcrel32 in the 64-bit case.
...
llvm-svn: 114597
2010-09-22 22:35:21 +00:00
Bob Wilson
0f341d4792
Change VDUPLANE DAG combiner to just return the result instead of calling
...
CombineTo to avoid putting the result on the worklist. I don't think it makes
much difference for now, but it might help someday as we add more DAG
combine optimizations.
llvm-svn: 114595
2010-09-22 22:27:30 +00:00
Rafael Espindola
3cfff6e0c5
Avoid some Mach-O specific alignment being done on ELF.
...
llvm-svn: 114594
2010-09-22 22:27:05 +00:00
Chris Lattner
04d9e1641f
allow target-specific label suffixes, patch by Yuri Gribov!
...
llvm-svn: 114592
2010-09-22 22:19:53 +00:00
Bob Wilson
11b219e461
Combine both VMOVDRR(VMOVRRD) and VMOVRRD(VMOVDRR), instead of just doing one
...
of those. Refactor to share code for handling BUILD_VECTOR(VMOVRRD).
I don't have a testcase that exercises this, but it seems like an obvious
good thing to do.
llvm-svn: 114589
2010-09-22 22:09:21 +00:00
Dan Gohman
d69790d841
Teach memdep about TBAA tags.
...
llvm-svn: 114588
2010-09-22 21:41:02 +00:00
Devang Patel
8914755c40
Use DW_OP_fbreg when offset is based on frame register.
...
llvm-svn: 114585
2010-09-22 21:10:38 +00:00
Jim Grosbach
9764011905
add FIXME
...
llvm-svn: 114578
2010-09-22 20:55:15 +00:00
Eric Christopher
84827bd9f5
Temporarily work around new address lowering while I figure out what
...
needs to happen for darwin.
llvm-svn: 114577
2010-09-22 20:42:08 +00:00
Jim Grosbach
27513b8b9b
Remove a few commented out bits
...
llvm-svn: 114576
2010-09-22 20:32:34 +00:00
Rafael Espindola
ef6cf9dce9
Fix typo and add a FIXME.
...
llvm-svn: 114570
2010-09-22 19:04:41 +00:00
Bob Wilson
fbec6680d1
When moving zext/sext to be folded with a load, ignore the issue of whether
...
truncates are free only in the case where the extended type is legal but the
load type is not. If both types are illegal, such as when they are too big,
the load may not be legalized into an extended load.
llvm-svn: 114568
2010-09-22 18:44:56 +00:00
Jim Grosbach
f264fe8e05
Add PrintSpecial() handling for in ARM MC instruction printer.
...
llvm-svn: 114563
2010-09-22 18:37:14 +00:00
Jim Grosbach
8899a330c7
grammar tweakage
...
llvm-svn: 114561
2010-09-22 18:18:30 +00:00
Jim Grosbach
f8956463a7
remove trailing whitespace
...
llvm-svn: 114560
2010-09-22 18:16:55 +00:00
Daniel Dunbar
ea457b3edb
CrashRecovery/Darwin: Override raise() as well so that crash recovery doesn't
...
end up altering the thread on which crashes are done because of its use of
Darwin's broken raise() implementation.
llvm-svn: 114558
2010-09-22 17:46:10 +00:00
Rafael Espindola
a2d73f0a38
Correctly align bss.
...
llvm-svn: 114556
2010-09-22 17:43:04 +00:00
Jim Grosbach
cab700c79b
Add MC instruction printer support for ARM and Thumb1 jump tables.
...
llvm-svn: 114555
2010-09-22 17:39:48 +00:00
Bob Wilson
3ff9f2d102
Attempt to fix llvm-gcc build. It was crashing when building gcov.o for an
...
ARM cross-compiler on x86, because the MMO size did not match the type size.
This fixes the MMO size and also the size of the stack object to match the
type size.
llvm-svn: 114554
2010-09-22 17:35:14 +00:00
Jim Grosbach
17bd4796c6
Add MC instruction printer support for TB[BH] style thumb2 jump tables.
...
llvm-svn: 114553
2010-09-22 17:15:35 +00:00
Jim Grosbach
dd102d535e
Clean up comment.
...
llvm-svn: 114550
2010-09-22 16:45:13 +00:00
Chris Lattner
f90b2a5a26
fix rdar://8456371 - Handle commutable instructions written backward.
...
llvm-svn: 114536
2010-09-22 06:26:39 +00:00
Chris Lattner
1864d6728d
Fix an inconsistency in the x86 backend that led it to reject "calll foo" on
...
x86-32: 32-bit calls were named "call" not "calll". 64-bit calls were correctly
named "callq", so this only impacted x86-32.
This fixes rdar://8456370 - llvm-mc rejects 'calll'
This also exposes that mingw/64 is generating a 32-bit call instead of a 64-bit call,
I will file a bugzilla.
llvm-svn: 114534
2010-09-22 05:49:14 +00:00
Chris Lattner
1ff3935290
fix rdar://8456412 - llvm-mc crash in encoder on "mov %rdx, %cr8"
...
Teaching the code generator about CR8-15, how to rex them up, etc.
llvm-svn: 114533
2010-09-22 05:29:50 +00:00
Chris Lattner
1c5e55f787
fix rdar://8456417 - llvm-mc can't do basic math
...
llvm-svn: 114532
2010-09-22 05:05:16 +00:00
Chris Lattner
77d657ae6a
add the missing aliases for fp stack cmovs, rdar://8456391
...
llvm-svn: 114531
2010-09-22 04:56:20 +00:00
Chris Lattner
26d11d7501
reimplement elf TLS support in terms of addressing modes, eliminating SegmentBaseAddress.
...
llvm-svn: 114529
2010-09-22 04:39:11 +00:00
Chris Lattner
2e61516c5a
Fix rdar://8456364 - llvm-mc rejects '%CS'
...
llvm-svn: 114528
2010-09-22 04:11:10 +00:00
Chris Lattner
2d350c46e2
fix rdar://8456389 - llvm-mc mismatch with 'as' on 'fstp'
...
-This line, and those below, will be ignored--
M test/MC/AsmParser/X86/x86_instructions.s
M lib/Target/X86/AsmParser/X86AsmParser.cpp
llvm-svn: 114527
2010-09-22 04:04:03 +00:00
Chris Lattner
f43f09693e
fix rdar://8456361 - llvm-mc rejects 'rep movsd'
...
llvm-svn: 114526
2010-09-22 03:50:32 +00:00
Chris Lattner
c81dcbec9e
convert the last 4 X86ISD nodes that should have memoperands to have them.
...
llvm-svn: 114523
2010-09-22 01:28:21 +00:00
Chris Lattner
29754fc406
give X86ISD::FNSTCW16m a memoperand, since it touches memory. It only
...
can access the stack due to how it is generated though.
llvm-svn: 114522
2010-09-22 01:11:26 +00:00
Chris Lattner
fee1ac61bd
give FP_TO_INT16_IN_MEM and friends a memoperand. They are only
...
used with stack slots, but hey, lets be safe.
llvm-svn: 114521
2010-09-22 01:05:16 +00:00
Chris Lattner
e52da86fab
give VZEXT_LOAD a memory operand, it now works with segment registers.
...
llvm-svn: 114515
2010-09-22 00:34:38 +00:00
Chris Lattner
706b9206da
revert r114386 now that address modes work correctly, we get a nice
...
call through gs-relative memory now.
llvm-svn: 114510
2010-09-22 00:11:31 +00:00
Chris Lattner
f9861312cb
give LCMPXCHG_DAG[8] a memory operand, allowing it to work with addrspace 256/257
...
llvm-svn: 114508
2010-09-21 23:59:42 +00:00
Evan Cheng
1d58965067
OptimizeCompareInstr should avoid iterating pass the beginning of the MBB when the 'and' instruction is after the comparison.
...
llvm-svn: 114506
2010-09-21 23:49:07 +00:00
Jim Grosbach
b2d256e696
Add start of support for MC instruction printer of ARM jump tables. Filling in
...
the rest of it is next up.
llvm-svn: 114500
2010-09-21 23:28:16 +00:00
Owen Anderson
d9fd152c3a
Enable target-specific mul-lowering on ARM, even at -Os. Remove a test that this makes
...
irrelevant, but add a new test for the new, improved functionality.
llvm-svn: 114494
2010-09-21 22:51:46 +00:00
Jakob Stoklund Olesen
c5ea87bca7
Build the complement interval dupli after the split intervals instead of
...
creating it before and subtracting split ranges.
This way, the SSA update code in LiveIntervalMap can properly create and use new
phi values in dupli. Now it is possible to create split regions where a value
escapes along two different CFG edges, creating phi values outside the split
region.
This is a work in progress and probably quite broken.
llvm-svn: 114492
2010-09-21 22:32:21 +00:00
Chris Lattner
b227ae4ddb
reimplement support for GS and FS relative address space matching
...
by having X86DAGToDAGISel::SelectAddr get passed in the parent node
of the operand match (the load/store/atomic op) and having it get
the address space from that, instead of having special FS/GS addr
mode operations that require duplicating the entire instruction set
to support.
This makes FS and GS relative accesses *far* more predictable and
work much better. It also simplifies the X86 backend a bit, more
to come.
There is still a pending issue with nodes like ISD::PREFETCH and
X86ISD::FLD, which really should be MemSDNode's but aren't.
llvm-svn: 114491
2010-09-21 22:07:31 +00:00
John Thompson
5c363e0ebf
Fixed pr20314-2.c failure, added E, F, p constraint letters.
...
llvm-svn: 114490
2010-09-21 22:04:54 +00:00
Chris Lattner
6543dacfac
Rework passing parent pointers into complexpatterns, I forgot
...
that complex patterns are matched after the entire pattern has
a structural match, therefore the NodeStack isn't in a useful
state when the actual call to the matcher happens.
llvm-svn: 114489
2010-09-21 22:00:25 +00:00
Bob Wilson
a22747a563
Move a sign-extend or a zero-extend of a load to the same basic block as the
...
load when the type of the load is not legal, even if truncates are not free.
The load is going to be legalized to an extending load anyway.
llvm-svn: 114488
2010-09-21 21:54:27 +00:00
Bob Wilson
064f6a1a3d
Clarify a comment.
...
llvm-svn: 114487
2010-09-21 21:44:14 +00:00
Devang Patel
a6b9c79c24
If only user of a vreg is an copy instruction to export copy of vreg out of current basic block then insert DBG_VALUE so that debug value of the variable is also transfered to new vreg.
...
Testcase is in r114476.
This fixes radar 8412415.
llvm-svn: 114478
2010-09-21 20:56:33 +00:00
Chris Lattner
7798a97041
correct this logic.
...
llvm-svn: 114474
2010-09-21 20:46:40 +00:00
Owen Anderson
f6dd8e7f5c
Reimplement r114460 in target-independent DAGCombine rather than target-dependent, by using
...
the predicate to discover the number of sign bits. Enhance X86's target lowering to provide
a useful response to this query.
llvm-svn: 114473
2010-09-21 20:42:50 +00:00
Chris Lattner
a911c9ed3a
just like they can opt into getting the root of the pattern being
...
matched, allow ComplexPatterns to opt into getting the parent node
of the operand being matched.
llvm-svn: 114472
2010-09-21 20:37:12 +00:00
Chris Lattner
55043ef46a
fix a long standing wart: all the ComplexPattern's were being
...
passed the root of the match, even though only a few patterns
actually needed this (one in X86, several in ARM [which should
be refactored anyway], and some in CellSPU that I don't feel
like detangling). Instead of requiring all ComplexPatterns to
take the dead root, have targets opt into getting the root by
putting SDNPWantRoot on the ComplexPattern.
llvm-svn: 114471
2010-09-21 20:31:19 +00:00
Jakob Stoklund Olesen
cb8f334578
Refix MSVC9 and upper_bound. It actually needs a fully symmetric comparator.
...
llvm-svn: 114469
2010-09-21 20:16:12 +00:00
Chris Lattner
c153d48869
even though I'm about to rip it out, simplify the address mode stuff
...
llvm-svn: 114468
2010-09-21 19:41:58 +00:00
Chris Lattner
32ec32b690
finish pushing MachinePointerInfo through selectiondags. At this point,
...
I think I've audited all uses, so it should be dependable for address spaces,
and the pointer+offset info should also be accurate when there.
llvm-svn: 114464
2010-09-21 18:58:22 +00:00
Chris Lattner
3dde58c15a
convert a couple more places to use the new getStore()
...
llvm-svn: 114463
2010-09-21 18:51:21 +00:00
Chris Lattner
8cdc5e75f7
update a bunch of code to use the MachinePointerInfo version of getStore.
...
llvm-svn: 114461
2010-09-21 18:41:36 +00:00
Owen Anderson
97a8fdc19c
When adding the carry bit to another value on X86, exploit the fact that the carry-materialization
...
(sbbl x, x) sets the registers to 0 or ~0. Combined with two's complement arithmetic, we can fold
the intermediate AND and the ADD into a single SUB.
This fixes <rdar://problem/8449754>.
llvm-svn: 114460
2010-09-21 18:41:19 +00:00
Jakob Stoklund Olesen
d09d4a9693
Don't pollute the global namespace.
...
llvm-svn: 114459
2010-09-21 18:34:17 +00:00
Jakob Stoklund Olesen
375867aa60
MSVC9 does not support upper_bound with an asymmetric comparator.
...
llvm-svn: 114455
2010-09-21 18:24:30 +00:00
Bob Wilson
c4345abcc0
Define the TargetLowering::getTgtMemIntrinsic hook for ARM so that NEON load
...
and store intrinsics are represented with MemIntrinsicSDNodes.
llvm-svn: 114454
2010-09-21 17:56:22 +00:00
Chris Lattner
5f584efd31
eliminate some uses of the getStore overload.
...
llvm-svn: 114453
2010-09-21 17:50:43 +00:00
Chris Lattner
86b3f287ce
eliminate an old SelectionDAG::getTruncStore method, propagating
...
MachinePointerInfo around more.
llvm-svn: 114452
2010-09-21 17:42:31 +00:00
Chris Lattner
bf98f86fed
eliminate last SelectionDAG::getLoad old entrypoint, on to stores.
...
llvm-svn: 114450
2010-09-21 17:28:52 +00:00
Chris Lattner
8af4fb7aed
fix the code that infers SV info to be correct when dealing
...
with an indexed load/store that has an offset in the index.
llvm-svn: 114449
2010-09-21 17:24:05 +00:00
Jakob Stoklund Olesen
03451a0e51
Add LiveInterval::find and use it for most LiveRange searching operations
...
instead of calling lower_bound or upper_bound directly.
This cleans up the search logic a bit because {lower,upper}_bound compare
LR->start by default, and it is usually simpler to search LR->end.
Funnelling all searches through one function also makes it possible to replace
the search algorithm with something faster than binary search.
llvm-svn: 114448
2010-09-21 17:12:18 +00:00
Jakob Stoklund Olesen
73d2940daa
Remove dead method.
...
llvm-svn: 114447
2010-09-21 17:12:15 +00:00
Chris Lattner
cdfd993df0
propagate MachinePointerInfo through various uses of the old
...
SelectionDAG::getExtLoad overload, and eliminate it.
llvm-svn: 114446
2010-09-21 17:04:51 +00:00
Jim Grosbach
32cfcf5bba
Fix errant printing of [v]ldm instructions that aren't a pop
...
llvm-svn: 114445
2010-09-21 16:45:31 +00:00
Benjamin Kramer
98e1aab5a8
Simplify code.
...
llvm-svn: 114444
2010-09-21 16:41:29 +00:00
Chris Lattner
0d430648ae
continue MachinePointerInfo'izing, eliminating use of one of the old
...
getLoad overloads.
llvm-svn: 114443
2010-09-21 16:36:31 +00:00
Chris Lattner
5c0bdf4543
convert dagcombine off the old form of getLoad. This fixes several bugs
...
with SVOffset computation.
llvm-svn: 114442
2010-09-21 16:08:50 +00:00
Benjamin Kramer
a81f2ba27e
Make CreateComplexVariable independent of SmallVector.
...
llvm-svn: 114439
2010-09-21 16:00:03 +00:00
Chris Lattner
637762e6d1
simplify DAGCombiner::SimplifySelectOps step #2/2.
...
llvm-svn: 114437
2010-09-21 15:58:55 +00:00
Chris Lattner
e3616071c5
substantially reduce indentation and simplify DAGCombiner::SimplifySelectOps.
...
no functionality change (step #1 )
llvm-svn: 114436
2010-09-21 15:46:59 +00:00
Mikhail Glushenkov
35e2ea68d2
llvmc: Allow multiple output languages.
...
llvm-svn: 114433
2010-09-21 14:59:42 +00:00
Lang Hames
f2e621dcb8
Fixed ambiguous call.
...
llvm-svn: 114431
2010-09-21 13:47:10 +00:00
Gabor Greif
324a43436f
Fix buglet when the TST instruction directly uses the AND result.
...
I am unable to write a test for this case, help is solicited, though...
What I did is to tickle the code in the debugger and verify that we do the right thing.
llvm-svn: 114430
2010-09-21 13:30:57 +00:00
Lang Hames
eae68e1117
Added an additional PBQP problem builder which adds coalescing costs (both between pairs of virtuals, and between virtuals and physicals).
...
llvm-svn: 114429
2010-09-21 13:19:36 +00:00
Gabor Greif
99c07b1d95
Move the search for the appropriate AND instruction
...
into OptimizeCompareInstr.
This necessitates the passing of CmpValue around,
so widen the virtual functions to accomodate.
No functionality changes.
llvm-svn: 114428
2010-09-21 12:01:15 +00:00
Chris Lattner
b68bd70665
a few more trivial updates. This fixes PerformInsertVectorEltInMemory to not
...
pass a completely incorrect SrcValue, which would result in a miscompile with
combiner-aa.
llvm-svn: 114411
2010-09-21 07:32:19 +00:00
Chris Lattner
4320dda4fb
convert the targets off the non-MachinePointerInfo of getLoad.
...
llvm-svn: 114410
2010-09-21 06:44:06 +00:00
Chris Lattner
1cad885bf7
add some accessors
...
llvm-svn: 114409
2010-09-21 06:43:24 +00:00
Chris Lattner
112cf9bc89
it's more elegant to put the "getConstantPool" and
...
"getFixedStack" on the MachinePointerInfo class. While
this isn't the problem I'm setting out to solve, it is the
right way to eliminate PseudoSourceValue, so lets go with it.
llvm-svn: 114406
2010-09-21 06:22:23 +00:00
Chris Lattner
810a630851
update the X86 backend to use the MachinePointerInfo version of one
...
of the getLoad methods. This fixes at least one bug where an incorrect
svoffset is passed in (a potential combiner-aa miscompile).
llvm-svn: 114404
2010-09-21 06:02:19 +00:00
Chris Lattner
80d9e51351
Fix a bug where the x86 backend would lower memcpy/memset of segment relative operations
...
into non-segment-relative copies.
llvm-svn: 114402
2010-09-21 05:43:34 +00:00
Chris Lattner
f94de5bf46
reimplement memcpy/memmove/memset lowering to use MachinePointerInfo
...
instead of srcvalue/offset pairs. This corrects SV info for mem
operations whose size is > 32-bits.
llvm-svn: 114401
2010-09-21 05:40:29 +00:00
Chris Lattner
b6d15db75c
add some helpful accessors.
...
llvm-svn: 114400
2010-09-21 05:39:30 +00:00
Chris Lattner
dbe51ad1b8
add overloads for SelectionDAG::getLoad, getStore, getTruncStore that take a
...
MachinePointerInfo. Among other virtues, this doesn't silently truncate the
svoffset to 32-bits.
llvm-svn: 114399
2010-09-21 05:10:45 +00:00
Chris Lattner
e1fc671030
simplify interface to SelectionDAG::getMemIntrinsicNode, making it take a MachinePointerInfo
...
llvm-svn: 114397
2010-09-21 04:57:15 +00:00
Chris Lattner
e4db4cad3b
chagne interface to SelectionDAG::getAtomic to take a MachinePointerInfo,
...
eliminating some weird "infer a frame address" logic which was dead.
llvm-svn: 114396
2010-09-21 04:53:42 +00:00
Chris Lattner
5de5fada20
don't implicitly drop the offset of a machinememoperand when legalizing atomics.
...
llvm-svn: 114395
2010-09-21 04:51:11 +00:00
Chris Lattner
af01f8d142
force clients of MachineFunction::getMachineMemOperand to provide a
...
MachinePointerInfo, propagating the type out a level of API. Remove
the old MachineFunction::getMachineMemOperand impl.
llvm-svn: 114393
2010-09-21 04:46:39 +00:00
Chris Lattner
2edbad8a3d
convert targets to the new MF.getMachineMemOperand interface.
...
llvm-svn: 114391
2010-09-21 04:39:43 +00:00
Chris Lattner
940c35a3c3
start pushing MachinePointerInfo out through the MachineMemOperand interface
...
to the MachineFunction construction methods.
llvm-svn: 114390
2010-09-21 04:32:08 +00:00
Chris Lattner
7fdf193383
refactor the Value*/offset pair from MachineMemOperand out to a new
...
MachinePointerInfo struct, no functionality change.
This also adds an assert to MachineMemOperand::MachineMemOperand
that verifies that the Value* is either null or is an IR pointer type.
llvm-svn: 114389
2010-09-21 04:23:39 +00:00
Chris Lattner
ecdba24738
fix rdar://8453210, a crash handling a call through a GS relative load.
...
For now, just disable folding the load into the call.
llvm-svn: 114386
2010-09-21 03:37:00 +00:00
Rafael Espindola
93f3fb8aca
Revert unrelated change that was accidentally included in the previous commit.
...
llvm-svn: 114383
2010-09-21 00:40:19 +00:00
Rafael Espindola
02af3cdd58
Implement support for .local and its "interesting" interactions with .comm.
...
llvm-svn: 114382
2010-09-21 00:24:38 +00:00
Evan Cheng
1ce02d180e
Enable machine sinking critical edge splitting. e.g.
...
define double @foo(double %x, double %y, i1 %c) nounwind {
%a = fdiv double %x, 3.2
%z = select i1 %c, double %a, double %y
ret double %z
}
Was:
_foo:
divsd LCPI0_0(%rip), %xmm0
testb $1, %dil
jne LBB0_2
movaps %xmm1, %xmm0
LBB0_2:
ret
Now:
_foo:
testb $1, %dil
je LBB0_2
divsd LCPI0_0(%rip), %xmm0
ret
LBB0_2:
movaps %xmm1, %xmm0
ret
This avoids the divsd when early exit is taken.
rdar://8454886
llvm-svn: 114372
2010-09-20 22:52:00 +00:00
Owen Anderson
fc94b337eb
When TCO is turned on, it is possible to end up with aliasing FrameIndex's. Therefore,
...
CombinerAA cannot assume that different FrameIndex's never alias, but can instead use
MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing.
This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll
when CombinerAA is enabled, modulo a different register allocation sequence.
llvm-svn: 114348
2010-09-20 20:39:59 +00:00
Jim Grosbach
cf90f8beb1
Simplify ARM callee-saved register handling by removing the distinction
...
between the high and low registers for prologue/epilogue code. This was
a Darwin-only thing that wasn't providing a realistic benefit anymore.
Combining the save areas simplifies the compiler code and results in better
ARM/Thumb2 codegen.
For example, previously we would generate code like:
push {r4, r5, r6, r7, lr}
add r7, sp, #12
stmdb sp!, {r8, r10, r11}
With this change, we combine the register saves and generate:
push {r4, r5, r6, r7, r8, r10, r11, lr}
add r7, sp, #12
rdar://8445635
llvm-svn: 114340
2010-09-20 19:32:20 +00:00
Rafael Espindola
78fc1f7f66
Produce a R_X86_64_32 when the value is >=0.
...
llvm-svn: 114339
2010-09-20 19:20:47 +00:00
Evan Cheng
1c7f72d0bc
Avoid splitting critical edge twice for a set of PHI uses.
...
llvm-svn: 114338
2010-09-20 19:12:55 +00:00
Francois Pichet
53617de15e
Fix the "unable to rename temporary" lit test failing on Windows. rename is now copy + delete on Windows. Problem to be revisited for a permanent and clean solution.
...
llvm-svn: 114320
2010-09-20 04:03:07 +00:00
Owen Anderson
9594834ec1
Revert r114312 while I sort out some issues.
...
llvm-svn: 114313
2010-09-19 21:01:26 +00:00
Owen Anderson
65f23dcf7e
Tentatively enabled DAGCombiner Alias Analysis by default. As far as I know,
...
r114268 fixed the last of the blockers to enabling it. I will be monitoring
for failures.
llvm-svn: 114312
2010-09-19 19:51:55 +00:00
Jakob Stoklund Olesen
8ae6803659
Add one more Core i7 model number.
...
llvm-svn: 114310
2010-09-19 17:54:28 +00:00
Chris Lattner
3203bf3688
idiom recognition should catch this.
...
llvm-svn: 114304
2010-09-19 00:37:34 +00:00
Chris Lattner
ac0afb0fbe
add a readme.
...
llvm-svn: 114303
2010-09-19 00:34:58 +00:00
Chris Lattner
4e80799dbb
add corei7, the laptop version.
...
llvm-svn: 114302
2010-09-19 00:31:58 +00:00
NAKAMURA Takumi
a4a0276d4f
X86Subtarget.h: Fix Cygwin's TD.
...
llvm-svn: 114297
2010-09-18 19:50:42 +00:00
Eric Christopher
2901b19344
Add the exit instruction to the PTX target.
...
Patch by Che-Liang Chiou <clchiou@gmail.com>!
llvm-svn: 114294
2010-09-18 18:52:28 +00:00
Michael J. Spencer
3a9b3aae55
Fix build.
...
llvm-svn: 114292
2010-09-18 17:54:37 +00:00
Rafael Espindola
9c3a9bf8aa
Make sure the STT_FILE symbol is the first one in the symbol table.
...
llvm-svn: 114285
2010-09-18 15:03:21 +00:00
Benjamin Kramer
89a330c4b9
Unbreak msvc build.
...
llvm-svn: 114284
2010-09-18 14:41:26 +00:00
Gabor Greif
dd1c709af4
do not rely on the implicit-dereference semantics of dyn_cast_or_null
...
llvm-svn: 114278
2010-09-18 11:55:34 +00:00
Gabor Greif
5348c51fbe
do not rely on the implicit-dereference semantics of dyn_cast_or_null
...
llvm-svn: 114277
2010-09-18 11:53:39 +00:00
Lang Hames
2d87a43549
Fixed non-const iterator error.
...
llvm-svn: 114273
2010-09-18 09:49:08 +00:00
Lang Hames
4a8c999803
Added a separate class (PBQPBuilder) for PBQP Problem construction. This class can be extended to support custom constraints.
...
For now the allocator still uses the old (internal) construction mechanism by default. This will be phased out soon assuming
no issues with the builder system come up.
To invoke the new construction mechanism just pass '-regalloc=pbqp -pbqp-builder' to llc. To provide custom constraints a
Target just needs to extend PBQPBuilder and pass an instance of their derived builder to the RegAllocPBQP constructor.
llvm-svn: 114272
2010-09-18 09:07:10 +00:00
Evan Cheng
442cb9c620
Fix code that break critical edges for PHI uses. Watch out for multiple PHIs in different blocks.
...
llvm-svn: 114270
2010-09-18 06:42:17 +00:00
Owen Anderson
015641f659
Invert the logic of reachesChainWithoutSideEffects(). What we want to check is that there is
...
NO path to the destination containing side effects, not that SOME path contains no side effects.
In practice, this only manifests with CombinerAA enabled, because otherwise the chain has little
to no branching, so "any" is effectively equivalent to "all".
llvm-svn: 114268
2010-09-18 04:45:14 +00:00
Eric Christopher
0c5e912e21
Thumb opcodes for thumb calls.
...
llvm-svn: 114263
2010-09-18 02:32:38 +00:00
Eric Christopher
c9fef312c8
Add addrmode5 fp load support. Swap float/thumb operand adding to handle
...
thumb with floating point.
llvm-svn: 114256
2010-09-18 01:59:37 +00:00
Eric Christopher
b6ce0ab878
Floating point stores have a 3rd addressing mode type.
...
llvm-svn: 114254
2010-09-18 01:23:38 +00:00
Jim Grosbach
c909422ee9
factor out a simple helper function to create a label for PC-relative
...
instructions (PICADD, PICLDR, et.al.)
llvm-svn: 114243
2010-09-18 00:05:05 +00:00
Jim Grosbach
a19f7799fb
PC-relative pseudo instructions are lowered and printed directly. Any encounter
...
with one in the generic printing code is an error.
llvm-svn: 114242
2010-09-18 00:04:53 +00:00
Benjamin Kramer
1cad9b6521
Fix vmov.f64 disassembly on targets where sizeof(long) != 8.
...
llvm-svn: 114240
2010-09-17 23:48:07 +00:00
Jim Grosbach
8b988eb1d4
Add MC-inst handling for tPICADD
...
llvm-svn: 114237
2010-09-17 23:41:53 +00:00
Bob Wilson
670e1915c0
Add target-specific DAG combiner for BUILD_VECTOR and VMOVRRD. An i64
...
value should be in GPRs when it's going to be used as a scalar, and we use
VMOVRRD to make that happen, but if the value is converted back to a vector
we need to fold to a simple bit_convert. Radar 8407927.
llvm-svn: 114233
2010-09-17 22:59:05 +00:00
Jim Grosbach
8ae5cfffdd
Teach the (non-MC) instruction printer to use the cannonical names for push/pop,
...
and shift instructions on ARM. Update the tests to match.
llvm-svn: 114230
2010-09-17 22:36:38 +00:00
Rafael Espindola
acd5bacfb9
Avoid relocations in a common case.
...
llvm-svn: 114229
2010-09-17 22:34:41 +00:00
Evan Cheng
8c2bde65f0
Teach machine sink to
...
1) Do forward copy propagation. This makes it easier to estimate the cost of the
instruction being sunk.
2) Break critical edges on demand, including cases where the value is used by
PHI nodes.
Critical edge splitting is not yet enabled by default.
llvm-svn: 114227
2010-09-17 22:28:18 +00:00
Eric Christopher
716614f126
Rework arm fast isel branch and compare code.
...
llvm-svn: 114226
2010-09-17 22:28:18 +00:00
Evan Cheng
042ab036a2
Machine CSE was forgetting to clear some data structures.
...
llvm-svn: 114222
2010-09-17 21:59:42 +00:00
Evan Cheng
5f2926d516
Fix a potential bug that can cause miscomparison with and without debug info.
...
llvm-svn: 114220
2010-09-17 21:56:26 +00:00
Jakob Stoklund Olesen
37131971c3
Don't include <fenv.h> now that we have llvm/System/FEnv.h.
...
llvm-svn: 114219
2010-09-17 21:47:03 +00:00
Jim Grosbach
6e477cd3d8
Hook up verbose asm comment printing for SOImm operands in MC printer
...
llvm-svn: 114215
2010-09-17 21:33:25 +00:00
Jim Grosbach
352a616f23
trailing whitespace
...
llvm-svn: 114212
2010-09-17 21:25:10 +00:00
Dan Gohman
aaed2c137f
Avoid emitting a PIC base register if no PIC addresses are needed.
...
This fixes rdar://8396318.
llvm-svn: 114201
2010-09-17 20:24:24 +00:00
Dan Gohman
8058e1b851
Attempt to support platforms which don't have fenv.h.
...
llvm-svn: 114196
2010-09-17 20:06:27 +00:00
Jim Grosbach
1703c92cf5
Add skeleton infrastructure for the ARMMCCodeEmitter class. Patch by Jason Kim!
...
llvm-svn: 114195
2010-09-17 18:46:17 +00:00
Jim Grosbach
34a1adb4ea
handle the upper16/lower16 target operand flags on symbol references for MC
...
instruction lowering.
llvm-svn: 114191
2010-09-17 18:25:25 +00:00
Chris Lattner
4bce01542c
fix rdar://8444631 - encoder crash on 'enter'
...
What a weird instruction.
llvm-svn: 114190
2010-09-17 18:02:29 +00:00
Daniel Dunbar
ea0a5aee7b
Fix an MSVC warning.
...
llvm-svn: 114184
2010-09-17 16:34:24 +00:00
Jim Grosbach
23ac157064
expand PICLDR MC lowering to handle other PICLDR and PICSTR versions.
...
llvm-svn: 114183
2010-09-17 16:25:52 +00:00
Daniel Dunbar
ed92665b19
MC/Mach-O/i386: Fix a crash in relocation handling.
...
llvm-svn: 114176
2010-09-17 15:21:50 +00:00
NAKAMURA Takumi
14029b5d65
Move the declaration SetInformationJobObject() outside of namespace.
...
It is also workaround for PR7927.
llvm-svn: 114175
2010-09-17 11:14:18 +00:00
NAKAMURA Takumi
cfded91183
AlphaSchedule.td: 7bit-ize.
...
llvm-svn: 114173
2010-09-17 09:56:43 +00:00
Daniel Dunbar
8a328e38c5
System: Don't reexport ___eprintf when building with Clang; this symbol isn't
...
used on Darwin anymore, and Clang might not always link with the library it is
currently found in.
llvm-svn: 114165
2010-09-17 04:25:24 +00:00
Daniel Dunbar
a43c86b354
MC/AsmParser: Add support for 'a + 4@GOTPCREL' and friends, by reconsing the
...
expression to include the modifier.
- Gross, but this a corner case we don't expect to see often in practice, but
it is worth accepting.
- Also improves diagnostics on invalid modifiers.
llvm-svn: 114154
2010-09-17 02:47:07 +00:00
Dan Gohman
9dc559bdef
Fix the folding of floating-point math library calls, like sin(infinity),
...
so that it detects errors on platforms where libm doesn't set errno.
It's still subject to host libm details though.
llvm-svn: 114148
2010-09-17 01:38:06 +00:00
Dan Gohman
2f0d88bcbe
Add an #include of raw_ostream.h. Previously, this only compiled
...
because it was using Twine.h's declaration of operator<<(const Twine &).
llvm-svn: 114141
2010-09-17 00:33:43 +00:00
Owen Anderson
c71f165f28
Allow the PassRegistry mutex to be lazily initialized, and clean up the global namespace at the same time.
...
llvm-svn: 114131
2010-09-16 23:44:50 +00:00
Owen Anderson
56bc6a9391
Do not expose the locking for the PassRegistry in the header. Be careful to
...
synchronize any method that might lazily initialize the pImpl.
llvm-svn: 114130
2010-09-16 23:32:35 +00:00
Benjamin Kramer
c8808012f9
Update CMake build.
...
llvm-svn: 114128
2010-09-16 23:06:18 +00:00
Dan Gohman
54fa09d403
Rename a variable to avoid a declaration conflict.
...
llvm-svn: 114126
2010-09-16 22:50:09 +00:00
Dan Gohman
836ce09592
Add a pass which prints out all the memdep dependencies.
...
llvm-svn: 114121
2010-09-16 22:08:32 +00:00
Devang Patel
99777d1d07
If FE forgot to provide a file name (usually it uses "stdin" as name in such situation) then make one up to ensure that debug info is not malformed.
...
llvm-svn: 114119
2010-09-16 20:57:49 +00:00
Owen Anderson
3d4644bad9
Revert r114097, adding back in the assertion against replacing an Instruction by itself. Now that CorrelatedValuePropagation is
...
more careful not to call SimplifyInstructionsInBlock() on an unreachable block, the issue has been fixed at a higher level. Add
a big warning to SimplifyInstructionsInBlock() to hopefully prevent this in the future.
llvm-svn: 114117
2010-09-16 20:51:41 +00:00
Chris Lattner
73fc5e794d
fix rdar://8438816 - unrecognized 'fildq' instruction
...
llvm-svn: 114116
2010-09-16 20:46:38 +00:00
Rafael Espindola
d542892fc0
Print the address of sections as 0 and create the metadata sections in the
...
same order as gnu as.
llvm-svn: 114109
2010-09-16 19:46:31 +00:00
Owen Anderson
1a679ae773
Use a depth-first iteratation in CorrelatedValuePropagation to avoid wasting time trying
...
to optimize unreachable blocks.
llvm-svn: 114105
2010-09-16 18:35:07 +00:00
Dale Johannesen
cf9dc14249
When substituting sunkaddrs into indirect arguments an asm, we were
...
walking the asm arguments once and stashing their Values. This is
wrong because the same memory location can be in the list twice, and
if the first one has a sunkaddr substituted, the stashed value for the
second one will be wrong (use-after-free). PR 8154.
llvm-svn: 114104
2010-09-16 18:30:55 +00:00
Owen Anderson
6f3516065f
It is possible, under specific circumstances involving ptrtoint ConstantExpr's, for LVI to end up trying to merge
...
a Constant into a ConstantRange. Handle this conservatively for now, rather than asserting. The testcase is
more complex that I would like, but the manifestation of the problem is sensitive to iteration orders and the state of the
LVI cache, and I have not been able to reproduce it with manually constructed or simplified cases.
Fixes PR8162.
llvm-svn: 114103
2010-09-16 18:28:33 +00:00
Jim Grosbach
73f2f39001
MC-ization of the PICLDR pseudo. Next up, adding the other variants
...
(PICLDRB, et. al.) and PICSTR*
llvm-svn: 114098
2010-09-16 17:43:25 +00:00
Owen Anderson
521e8dfef8
Fix PR8161, in which an unreachable loop causes recursive instruction simplification to try
...
to replace an instruction with itself. Add a predicate to the simplifier to prevent this case.
llvm-svn: 114097
2010-09-16 17:42:36 +00:00
Jim Grosbach
9131eb8bf0
Make sure to promote single precision floats to double before extracting them
...
from the APFloat.
llvm-svn: 114096
2010-09-16 17:37:30 +00:00
Rafael Espindola
fa964e153e
Make sure that names like .note.GNU-stack are accepted as valid section names.
...
llvm-svn: 114091
2010-09-16 17:05:55 +00:00
Rafael Espindola
58aa9e8010
Add support for the .zero directive.
...
llvm-svn: 114077
2010-09-16 15:03:59 +00:00
Kalle Raiskila
68e2c15954
Change SPU register re-interpretations from OR to COPY_TO_REGCLASS instruction.
...
This cleans up after the mess r108567 left in the CellSPU backend.
ORCvt-instruction were used to reinterpret registers, and the ORs were then
removed by isMoveInstr(). This patch now removes 350 instrucions of format:
or $3, $3, $3
(from the 52 testcases in CodeGen/CellSPU). One case of a nonexistant or is
checked for.
Some moves of the form 'ori $., $., 0' and 'ai $., $., 0' still remain.
llvm-svn: 114074
2010-09-16 12:29:33 +00:00
Duncan Sands
c128b42eb8
Add better support for environment portion of triple. Original patch by
...
Cameron Esfahani, tweaked to use array_lengthof.
llvm-svn: 114073
2010-09-16 08:25:48 +00:00
Duncan Sands
82768f4f13
Some versions of gcc still warn about "ignoring return value ... declared
...
with attribute warn_unused_result" here - suppress the warning harder.
llvm-svn: 114072
2010-09-16 08:20:49 +00:00
Bob Wilson
622f0a7592
Remove support for "dregpair" operand modifier, now that it is no longer being
...
used for anything.
llvm-svn: 114067
2010-09-16 04:55:00 +00:00
Bob Wilson
76c730bdbd
When expanding ARM pseudo registers, copy the existing predicate operands
...
instead of using default predicates on the expanded instructions.
llvm-svn: 114066
2010-09-16 04:25:37 +00:00