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Commit Graph

82280 Commits

Author SHA1 Message Date
Nick Lewycky
85f9af940c Clean up this file a little. Remove dead casts, casting Values to Values. Adjust some comments for typos and whitespace. NFC.
llvm-svn: 245419
2015-08-19 06:22:33 +00:00
Ashutosh Nema
d2b31a8acc Exposed findDefsUsedOutsideOfLoop as a loop utility function
Exposed findDefsUsedOutsideOfLoop as a loop utility function by moving 
it from LoopDistribute to LoopUtils.

Reviewed By: anemet

llvm-svn: 245416
2015-08-19 05:40:42 +00:00
Chandler Carruth
2eeb3460a8 [LPM] Teach the legacy pass manager to support *using* an analysis
without *requiring* it.

This allows a pass indicate that it will use an analysis if available
(through getAnalysisIfAvailable). When the pass manager knows this, it
will refrain from deleting that analysis if it can. Naturally, it will
still get invalidated at the correct time. These passes are not
considered when scheduling the pass pipeline, so typically they will
require manual scheduling, but this may also allow passes with
getAnalysisIfAvailable to find the analysis more often if nothing after
them requires that analysis and it wasn't invalidated.

I don't have a particular use case with the current passes, but with my
new structure for alias analyses, this will be very useful. We want to
allow people to customize the set of AAs available by scheduling
additional passes. These's aren't ever *required* for obvious reasons.
So we need some way to mark in the legacy pass manager that they will
still be used if available.

This is essentially how analysis groups already work. But this makes the
feature generally available and more explicit. It should allow the AA
change to not impact how people trigger a custom alias analysis being
available at a certain point in compilation.

Differential Revision: http://reviews.llvm.org/D12114

llvm-svn: 245409
2015-08-19 03:02:12 +00:00
Hal Finkel
64a72d9c3f Fix how DependenceAnalysis calls delinearization
Fix how DependenceAnalysis calls delinearization, mirroring what is done in
Delinearization.cpp (mostly by making sure to call getSCEVAtScope before
delinearizing, and by removing the unnecessary 'Pairs == 1' check).

Patch by Vaivaswatha Nagaraj!

llvm-svn: 245408
2015-08-19 02:56:36 +00:00
Eric Christopher
0f80d201ba Revert "Fix PR24469 resulting from r245025 and re-enable dead store elimination across basicblocks."
This is causing bootstrap problems, e.g.: http://bb.pgr.jp/builders/clang-3stage-i686-linux/builds/2960

This reverts r245195.

llvm-svn: 245402
2015-08-19 02:15:13 +00:00
Hal Finkel
13c6dece14 Make ScalarEvolution::isKnownPredicate a little smarter
Here we make ScalarEvolution::isKnownPredicate, indirectly, a little smarter.
Given some relational comparison operator OP, and two AddRec SCEVs, {I,+,S} OP
{J,+,T}, we can reduce this to the comparison I OP J when S == T, both AddRecs
are for the same loop, and both are known not to wrap.

As it turns out, because of the way that backedge-guard expressions can be
leveraged when computing known predicates, this allows indvars to simplify the
if-statement comparison in this loop:

  void foo (int *a, int *b, int n) {
    for (int i = 0; i < n; ++i) {
      if (i > n)
        a[i] = b[i] + 1;
    }
  }

which, somewhat surprisingly, we were not previously optimizing away.

llvm-svn: 245400
2015-08-19 01:51:51 +00:00
Alex Lorenz
911a0ec828 MIR Serialization: Serialize MMI's variable debug information.
llvm-svn: 245396
2015-08-19 00:13:25 +00:00
Quentin Colombet
4d87d8b5ee [BasicAA] Revert r221876 because it can produce incorrect aliasing
information: see PR24468.

llvm-svn: 245394
2015-08-19 00:07:20 +00:00
Steve King
6a9a3a86c5 Fix backward operands in call to isTruncateFree() and improve comments.
llvm-svn: 245385
2015-08-18 23:02:41 +00:00
Alex Lorenz
7d045db2fd MIR Parser: Return true on error when parsing standalone registers.
llvm-svn: 245384
2015-08-18 22:57:36 +00:00
Alex Lorenz
10a69bc7f6 MIR Serialization: Serialize the operand's bit mask target flags.
This commit adds support for bit mask target flag serialization to the MIR
printer and the MIR parser. It also adds support for the machine operand's
target flag serialization to the AArch64 target.

Reviewers: Duncan P. N. Exon Smith
llvm-svn: 245383
2015-08-18 22:52:15 +00:00
Sanjay Patel
514cb2f8b4 use TLI.allowsMemoryAccess() to check if memory accesses are fast; NFCI
This consolidates use of isUnalignedMem32Slow() in one place.
There is a slight change in logic although I'm not sure that it would ever
come up in the real world: we were assuming that an alignment of the type 
size is always fast; now, we actually check the data layout to confirm that.

llvm-svn: 245382
2015-08-18 22:48:12 +00:00
Nick Lewycky
aacc91f91c Fix three typos in comments; "easilly" -> "easily".
llvm-svn: 245379
2015-08-18 22:41:58 +00:00
Peter Collingbourne
3ec59b51d4 Support: Clean up TSan annotations.
Remove support for Valgrind-based TSan, which hasn't been maintained for a
few years. We now use the TSan annotations only if LLVM is compiled with
-fsanitize=thread. We no longer need the weak function definitions as we
are guaranteed that our program is linked directly with the TSan runtime.

Differential Revision: http://reviews.llvm.org/D12121

llvm-svn: 245374
2015-08-18 22:31:24 +00:00
Alex Lorenz
bd6d51f973 MIR Serialization: Serialize the frame information's stack protector index.
llvm-svn: 245372
2015-08-18 22:26:26 +00:00
Alex Lorenz
aa43a0ccc9 MIR Parser: Extract the code that parses stack object references into a new
method.

This commit extracts the code that parses the stack object references into a
new method named 'parseStackFrameIndex', so that it can be reused when
parsing standalone stack object references.

llvm-svn: 245370
2015-08-18 22:18:52 +00:00
David Majnemer
738abfac21 [InstSimplify] Remove unused variable
No functionality change is intended.

llvm-svn: 245369
2015-08-18 22:18:22 +00:00
David Majnemer
729f29ab40 [InstSimplify] Don't assume getAggregateElement will succeed
It isn't always possible to get a value from getAggregateElement.
This fixes PR24488.

llvm-svn: 245365
2015-08-18 22:07:25 +00:00
David Majnemer
6bbbc3b755 [VectorUtils] Replace 'llvm::' qualification with 'using llvm'
No funcitonal change is intended, this just makes the file look more
like the rest of LLVM.

llvm-svn: 245364
2015-08-18 22:07:20 +00:00
Joerg Sonnenberger
6697181608 Load/store instructions for floating points with address space require SparcV9.
To properly handle this, define the *a instructions as separate
instruction classes by refactoring the LoadA and StoreA multiclasses.
Move the instruction tests into the sparcv9 file to test the difference.

llvm-svn: 245360
2015-08-18 21:31:46 +00:00
Matthias Braun
04b9a1e33f DAGCombiner: Improve DAGCombiner select normalization
The current code normalizes select(C0, x, select(C1, x, y)) towards
select(C0|C1, x, y) if the targets prefers that form. This patch adds an
additional rule that if the select(C1, x, y) part already exists in the
function then we want to normalize into the other direction because the
effects of reusing the existing value are bigger than transforming into
the target preferred form.

This addresses regressions following r238793, see also:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20150727/290272.html

Differential Revision: http://reviews.llvm.org/D11616

llvm-svn: 245350
2015-08-18 20:48:36 +00:00
Matthias Braun
01b1b5a99e DAGCombiner: Optimize SELECTs first before turning them into SELECT_CC
This is part of http://reviews.llvm.org/D11616 - I just decided to split
this up into a separate commit.

llvm-svn: 245349
2015-08-18 20:48:29 +00:00
David Majnemer
a15246d9db [WinEH] Calculate state numbers for the new EH representation
State numbers are calculated by performing a walk from the innermost
funclet to the outermost funclet.   Rudimentary support for the new EH
constructs has been added to the assembly printer, just enough to test
the new machinery.

Differential Revision: http://reviews.llvm.org/D12098

llvm-svn: 245331
2015-08-18 19:07:12 +00:00
Matthias Braun
9a77ee2829 MachineRegisterInfo: Introduce isPhysRegUsed()
This method checks whether a physical regiser or any of its aliases are
used in the function.

Using this function in SIRegisterInfo::findUnusedReg() should also fix
this reported failure:

http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20150803/292143.html
http://reviews.llvm.org/rL242173#inline-533

The report doesn't come with a testcase and I don't know enough about
AMDGPU to create one myself.

llvm-svn: 245329
2015-08-18 18:54:27 +00:00
Chandler Carruth
8afd3fbd05 [LPM] Cleanup some loops to be range based for loops before hacking on
this code. NFC.

llvm-svn: 245327
2015-08-18 18:41:53 +00:00
Chandler Carruth
bf271cc4e6 [PM/AA] Remove the last relics of the separate IPA library from LLVM,
folding the code into the main Analysis library.

There already wasn't much of a distinction between Analysis and IPA.
A number of the passes in Analysis are actually IPA passes, and there
doesn't seem to be any advantage to separating them.

Moreover, it makes it hard to have interactions between analyses that
are both local and interprocedural. In trying to make the Alias Analysis
infrastructure work with the new pass manager, it becomes particularly
awkward to navigate this split.

I've tried to find all the places where we referenced this, but I may
have missed some. I have also adjusted the C API to continue to be
equivalently functional after this change.

Differential Revision: http://reviews.llvm.org/D12075

llvm-svn: 245318
2015-08-18 17:51:53 +00:00
Alex Lorenz
4fba985c73 MIR Parser: Implicit register verifier should accept unexpected implicit
subregister operands.

llvm-svn: 245315
2015-08-18 17:17:13 +00:00
Bruno Cardoso Lopes
af6aea0ea3 [LVI] Use a SmallDenseMap instead of std::map for ValueCacheEntryTy
Historically there seems to be some resistance regarding the change to DenseMap
(r147980). However, I couldn't find cases of iterator invalidation for
ValueCacheEntryTy, but only for ValueCache, which I left untouched.

This reduces 20s on an internal testcase. Follow up from r245309.

Differential Revision: http://reviews.llvm.org/D11651

rdar://problem/21320066

llvm-svn: 245314
2015-08-18 16:54:36 +00:00
Sanjay Patel
1163b7b428 use minSize wrapper; NFCI
These were missed when other uses were switched over:
http://llvm.org/viewvc/llvm-project?view=revision&revision=243994

llvm-svn: 245311
2015-08-18 16:44:23 +00:00
Bruno Cardoso Lopes
22233786b0 [LVI] Improve LazyValueInfo compile time performance
Changes in LoopUnroll in the past six months exposed scalability
issues in LazyValueInfo when used from JumpThreading. One internal test
that used to take 20s under -O2 now takes 6min.

This commit change the OverDefinedCache from
DenseSet<std::pair<AssertingVH<BasicBlock>, Value*>> to
DenseMap<AssertingVH<BasicBlock>, SmallPtrSet<Value *, 4>>
and reduces compile time down to 1m40s.

Differential Revision: http://reviews.llvm.org/D11651

rdar://problem/21320066

llvm-svn: 245309
2015-08-18 16:34:27 +00:00
Chad Rosier
c8874896fb [AArch64] Simplify the logic for computing in bounds offset. NFC.
llvm-svn: 245307
2015-08-18 16:20:03 +00:00
Daniel Sanders
21e741e772 [mips] Expand JAL instructions when PIC is enabled.
Summary: This is the correct way to handle JAL instructions when PIC is enabled.

Patch by Toma Tabacu

Reviewers: seanbruno, tomatabacu

Subscribers: brooks, seanbruno, emaste, llvm-commits

Differential Revision: http://reviews.llvm.org/D6231

llvm-svn: 245305
2015-08-18 16:18:09 +00:00
Zoran Jovanovic
dec5269b37 [mips][microMIPS] Implement DDIV, DMOD, DDIVU and DMODU instructions
Differential Revision: http://reviews.llvm.org/D10953

llvm-svn: 245297
2015-08-18 14:40:43 +00:00
Zoran Jovanovic
df033f686f [mips][microMIPS] Implement SW and SWE instructions
Differential Revision: http://reviews.llvm.org/D10869

llvm-svn: 245293
2015-08-18 12:53:08 +00:00
Daniel Sanders
056f7ddc7b [mips] Make the MipsAsmParser capable of knowing whether PIC mode is enabled or not.
Summary:
This information is needed to decide whether we do the PIC-only JAL expansions or not. It's also needed for an upcoming patch which implements the .cprestore assembler directive (which can only be used effectively in PIC mode).

By making this information available to the MipsAsmParser, we will know when to insert the instructions mandated by the .cprestore assembler directive and we will be able to give some useful warnings when we encounter a potential misuse of this directive.

Patch by Toma Tabacu

Reviewers: dsanders, seanbruno

Subscribers: brooks, seanbruno, rafael, llvm-commits

Differential Revision: http://reviews.llvm.org/D5626

llvm-svn: 245291
2015-08-18 12:33:54 +00:00
Michael Kruse
a567e95c47 [Support] On Windows, generate PDF files for graphs and open with associated viewer
Summary: Windows system rarely have good PostScript viewers installed, but PDF viewers are common. So for viewing graphs, generate PDF files and open with the associated PDF viewer using cmd.exe's start command.

Reviewers: Bigcheese, aaron.ballman

Subscribers: aaron.ballman, JakeVanAdrighem, dwiberg, llvm-commits

Differential Revision: http://reviews.llvm.org/D11877

llvm-svn: 245290
2015-08-18 12:17:37 +00:00
Michael Kruse
d2474b9bf1 [Support] Always wait for GraphViz before opening the viewer
Summary:
When calling DisplayGraph and a PS viewer is chosen, two programs are executed: The GraphViz generator and the PostScript viewer. Always for the generator to finish to ensure that the .ps file is written before opening the viewer for that file. DisplayGraph's wait parameter refers to whether to wait until the user closes the viewer.

This happened on Windows and if none of the options to open the .dot file directly applies, also on Linux.

Reviewers: Bigcheese, chandlerc, aaron.ballman

Subscribers: dwiberg, aaron.ballman, llvm-commits

Differential Revision: http://reviews.llvm.org/D11876

llvm-svn: 245289
2015-08-18 12:13:57 +00:00
Daniel Sanders
a88078f2d1 [mips] Correct -Woverflow warning in r245208 without changing signedness of the constant.
This was supposed to have been committed as part of r245208

llvm-svn: 245285
2015-08-18 09:55:57 +00:00
Justin Bogner
82f54ac1cb Revert "Constant propagation after hiting llvm.assume"
This was also failing bootstrap:

http://lab.llvm.org:8080/green/job/clang-stage2-configure-Rlto_build

This reverts r245265.

llvm-svn: 245269
2015-08-18 07:00:34 +00:00
Piotr Padlewski
ef4e67a9b9 Constant propagation after hiting llvm.assume
After hitting @llvm.assume(X) we can:
- propagate equality that X == true
- if X is icmp/fcmp (with eq operation), and one of operand
  is constant we can change all variables with constants in the same BasicBlock

http://reviews.llvm.org/D11918

llvm-svn: 245265
2015-08-18 03:55:30 +00:00
Dan Gohman
68963ec9b7 [WebAssembly] Don't default to ELF in the triple.
WebAssembly doesn't yet have a specified binary format, and it may not
end up being ELF, so we don't want the Triple class defaulting to ELF
for it at this time.

llvm-svn: 245254
2015-08-17 22:37:56 +00:00
Guozhi Wei
82b60bf3e7 Align SP adjustment in function getSPAdjust
This commit adds a new function TargetFrameLowering::alignSPAdjust
and calls it from TargetInstrInfo::getSPAdjust. It fixes PR24142.

llvm-svn: 245253
2015-08-17 22:36:27 +00:00
Dan Gohman
f4259c25a8 [WebAssembly] Make getArchTypePrefix return "wasm".
The arch prefix string isn't currently being used for anything on
WebAssembly, but if it were to be used, it makes sense to use the
same arch prefix string for wasm32 and wasm64.

llvm-svn: 245252
2015-08-17 22:35:40 +00:00
Alex Lorenz
f1d73e431f MIR Serialization: Serialize the local offsets for the stack objects.
llvm-svn: 245249
2015-08-17 22:17:42 +00:00
Alex Lorenz
06f423f7b0 MIR Serialization: Serialize the memory operand's range metadata node.
llvm-svn: 245247
2015-08-17 22:09:52 +00:00
Alex Lorenz
a5fd62d18c MIR Serialization: Serialize the memory operand's noalias metadata node.
llvm-svn: 245246
2015-08-17 22:08:02 +00:00
Alex Lorenz
73ed8edb8b MIR Serialization: Serialize the memory operand's alias scope metadata node.
llvm-svn: 245245
2015-08-17 22:06:40 +00:00
Alex Lorenz
f5e73c6d42 MIR Serialization: Serialize the memory operand's TBAA metadata node.
llvm-svn: 245244
2015-08-17 22:05:15 +00:00
David Majnemer
ebb3daf6a3 [WinEHPrepare] Replace unreasonable funclet terminators with unreachable
It is possible to be in a situation where more than one funclet token is
a valid SSA value.  If we see a terminator which exits a funclet which
doesn't use the funclet's token, replace it with unreachable.

Differential Revision: http://reviews.llvm.org/D12074

llvm-svn: 245238
2015-08-17 20:56:39 +00:00
Douglas Katzman
5962bf65c5 [SPARC]: recognize '.' as the start of an assembler expression.
llvm-svn: 245232
2015-08-17 19:55:01 +00:00