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Author SHA1 Message Date
Chandler Carruth
876a0bce73 Add support for finding cacheflush on OpenBSD/mips64 platforms. 
Patch by Brad Smith!

llvm-svn: 163584
 2012-09-11 01:17:24 +00:00
Andrew Trick
ffec33601b Reorganize MachineScheduler interfaces and publish them in the header. 
The Hexagon target decided to use a lot of functionality from the
target-independent scheduler. That's fine, and other targets should be
able to do the same. This reorg and API update makes that easy.

For the record, ScheduleDAGMI was not meant to be subclassed. Instead,
new scheduling algorithms should be able to implement
MachineSchedStrategy and be done. But if need be, it's nice to be
able to extend ScheduleDAGMI, so I also made that easier. The target
scheduler is somewhat more apt to break that way though.

llvm-svn: 163580
 2012-09-11 00:39:15 +00:00
Andrew Trick
e06bae49d1 Remove unused declaration 
llvm-svn: 163579
 2012-09-11 00:39:12 +00:00
Eric Christopher
5fe521ef3a Revert r160148 it seems to cause more problems than it should 
right now. We'll fix PR13303 a different way.

llvm-svn: 163570
 2012-09-10 23:34:06 +00:00
Eric Christopher
a327d985db 80-col fixup. 
llvm-svn: 163569
 2012-09-10 23:34:03 +00:00
Eric Christopher
91aebc4188 80-col fixup. 
llvm-svn: 163568
 2012-09-10 23:34:00 +00:00
Eric Christopher
c774770535 No reason to construct this twice. 
llvm-svn: 163567
 2012-09-10 23:33:57 +00:00
Chad Rosier
f7b609f0fb Add newline. 
llvm-svn: 163565
 2012-09-10 23:09:27 +00:00
Chad Rosier
419fa9e0b0 Update function names to conform to guidelines. No functional change intended. 
llvm-svn: 163561
 2012-09-10 22:50:57 +00:00
Chad Rosier
3758eb20e1 Revert r163556. Missed updates to tablegen files. 
llvm-svn: 163557
 2012-09-10 22:30:35 +00:00
Chad Rosier
8bbcf2b7ae Update function names to conform to guidelines. No functional change intended. 
llvm-svn: 163556
 2012-09-10 22:23:45 +00:00
NAKAMURA Takumi
c2e5cf8e3f test/CodeGen/X86/ms-inline-asm.ll: Relax for non-darwin x86 targets. '##InlineAsm' could not be seen in other hosts. 
llvm-svn: 163554
 2012-09-10 22:04:54 +00:00
Chad Rosier
1b83624c78 [ms-inline asm] Properly emit the asm directives when the AsmPrinterVariant 
and InlineAsmVariant don't match.

llvm-svn: 163550
 2012-09-10 21:36:05 +00:00
Chad Rosier
8311e77359 Update test case for Release builds. 
llvm-svn: 163549
 2012-09-10 21:31:43 +00:00
Dmitri Gribenko
1d75adbbb2 Remove redundant semicolons which are null statements. 
llvm-svn: 163547
 2012-09-10 21:26:47 +00:00
Nadav Rotem
3fc7763c99 Disable stack coloring because it makes dragonegg fail bootstrapping. 
llvm-svn: 163545
 2012-09-10 21:17:58 +00:00
Chad Rosier
054e489dd3 [ms-inline asm] Pass the correct AsmVariant to the PrintAsmOperand() function 
and update the printOperand() function accordingly.

llvm-svn: 163544
 2012-09-10 21:10:49 +00:00
Chad Rosier
e1355ead98 [ms-inline asm] Add support for .att_syntax directive. 
llvm-svn: 163542
 2012-09-10 20:54:39 +00:00
Nadav Rotem
bc8f2b49c9 Enable stack coloring. 
llvm-svn: 163539
 2012-09-10 20:15:49 +00:00
Jakob Stoklund Olesen
ab77839866 Don't attempt to use flags from predicated instructions. 
The ARM backend can eliminate cmp instructions by reusing flags from a
nearby sub instruction with similar arguments.

Don't do that if the sub is predicated - the flags are not written
unconditionally.

<rdar://problem/12263428>

llvm-svn: 163535
 2012-09-10 19:17:25 +00:00
Michael J. Spencer
8d3fce5ab0 [Object] Extract Elf_Ehdr. Patch by Hemant Kulkarni! 
llvm-svn: 163532
 2012-09-10 19:04:02 +00:00
Nadav Rotem
cab746695d Stack Coloring: Handle the case where END markers come before BEGIN markers properly. 
llvm-svn: 163530
 2012-09-10 18:51:09 +00:00
Michael Liao
7dfa5e2092 Enhance PR11334 fix to support extload from v2f32/v4f32 
- Fix an remaining issue of PR11674 as well

llvm-svn: 163528
 2012-09-10 18:33:51 +00:00
Sergei Larin
adf81918db Add "blocked" heuristic to the Hexagon MI scheduler. 
Improve AQ instruction selection in the Hexagon MI scheduler.

llvm-svn: 163523
 2012-09-10 17:31:34 +00:00
Michael Ilseman
d331ea92fa Fold multiply by 0 or 1 when in UnsafeFPMath mode in SelectionDAG::getNode(). 
This folding happens as early as possible for performance reasons, and to make sure it isn't foiled by other transforms (e.g. forming FMAs).

llvm-svn: 163519
 2012-09-10 17:00:37 +00:00
Michael Ilseman
eb6c004862 whitespace 
llvm-svn: 163518
 2012-09-10 16:56:31 +00:00
Michael Liao
2791a08d7e Add boolean simplification support from CMOV 
- If a boolean value is generated from CMOV and tested as boolean value,
  simplify the use of test result by referencing the original condition.
  RDRAND intrinisc is one of such cases.

llvm-svn: 163516
 2012-09-10 16:36:16 +00:00
James Molloy
fe38f1d2b0 Fix an assertion failure when optimising a shufflevector incorrectly into concat_vectors, and a followup bug with SelectionDAG::getNode() creating nodes with invalid types. 
llvm-svn: 163511
 2012-09-10 14:01:21 +00:00
Nadav Rotem
a271aaded5 Minor cleanup. No functional change. 
llvm-svn: 163510
 2012-09-10 13:20:00 +00:00
Nadav Rotem
cb9794b1c7 Stack Coloring: Debug prints to print the slot number and not the array index. 
llvm-svn: 163509
 2012-09-10 13:17:58 +00:00
Nadav Rotem
42f7a4f93a Stack Coloring: When searching for disjoint regions, do not compare intervals twice or to theirself. 
llvm-svn: 163508
 2012-09-10 12:47:38 +00:00
Nadav Rotem
d5b75d5eec Stack Coloring: Add support for multiple regions of the same slot, within a single basic block. 
llvm-svn: 163507
 2012-09-10 12:39:35 +00:00
Elena Demikhovsky
56cdc6a59a The VPSHUFB 256-bit instruction may be generated when one of input vector is undefined or zeroinitializer. 
I've added the "zeroinitializer" case in this patch.

llvm-svn: 163506
 2012-09-10 12:13:11 +00:00
Benjamin Kramer
37ce5fbc3b Make helper function static. 
llvm-svn: 163504
 2012-09-10 11:52:14 +00:00
Benjamin Kramer
3d97b600fa Move bypassSlowDivision into the llvm namespace. 
llvm-svn: 163503
 2012-09-10 11:52:08 +00:00
Benjamin Kramer
a4a2829a23 c bindings: revert LLVMConstInlineAsm to always use the default asm dialect. 
- The C API should be stable
- InlineAsm::AsmDialect is not exposed to C
- The function didn't match the prototype so this was unreachable code

llvm-svn: 163502
 2012-09-10 11:52:00 +00:00
Evgeniy Stepanov
24b5faa541 GTest on Android needs a custom tmpdir path. 
llvm-svn: 163501
 2012-09-10 10:32:29 +00:00
Nadav Rotem
edd576d454 Fix a typo in the comment. 
llvm-svn: 163496
 2012-09-10 08:51:46 +00:00
Nadav Rotem
917505e474 Add an assertion that the frame index is indeed inside the declared lifetime region. 
llvm-svn: 163495
 2012-09-10 08:44:15 +00:00
Nadav Rotem
8442a2ec90 Teach the DAGBuilder about lifetime markers which are generated from PHINodes. 
llvm-svn: 163494
 2012-09-10 08:43:23 +00:00
Hans Wennborg
754348c070 Fix style issues from r163302 pointed out by Evan. 
llvm-svn: 163491
 2012-09-10 07:44:22 +00:00
Nick Lewycky
023f7006a9 Move spaces to the right places. No functionality change. 
llvm-svn: 163485
 2012-09-09 23:41:11 +00:00
Nick Lewycky
ad25150d03 Add missing space before {. No functionality change. 
llvm-svn: 163484
 2012-09-09 23:40:55 +00:00
Craig Topper
fb97f05d3c Teach DAG combiner to constant fold fneg of a BUILD_VECTOR of constants. 
llvm-svn: 163483
 2012-09-09 22:58:45 +00:00
Aaron Ballman
db629b721e Fixing a type width warning with MSVC. 
llvm-svn: 163481
 2012-09-09 20:34:25 +00:00
Benjamin Kramer
56915b8d2f DSE: Poking holes into a SetVector is expensive, avoid it if possible. 
llvm-svn: 163480
 2012-09-09 16:44:05 +00:00
Benjamin Kramer
957f1f617e LiveVariables: Compute a set of defs and kills to speed up updating LV during critical edge splitting. 
Previously we checked if the register is def'd in a block via the def/use list a
nd walked the list of kills to check if the register is killed in a block. Both
of these checks can be made much cheaper by walking the block first and
recording all defs and kills.

This reduces the compile time of the test case from PR13651 from 40s to 15s at
-O2. The compile time is still dominated by LV updating but now the main culprit
is SparseBitVector's slowness.

llvm-svn: 163478
 2012-09-09 11:56:14 +00:00
Craig Topper
a91d731898 Add instruction selection for ffloor of vectors when SSE4.1 or AVX is enabled. 
llvm-svn: 163473
 2012-09-08 17:42:27 +00:00
NAKAMURA Takumi
57a661f79f lit: Util.which(): Use os.path.isfile() instead of os.path.exists(), or it hits to the directory. 
For example, which('loop-convert') returns 'loop-convert' when the directory 'loop-convert' exists.

llvm-svn: 163469
 2012-09-08 12:07:24 +00:00
Craig Topper
9bda7e421e Use 256-bit alignment for constant pool value for 256-bit vector FNEG lowering. 
llvm-svn: 163463
 2012-09-08 07:46:05 +00:00