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300 Commits

Author SHA1 Message Date
NAKAMURA Takumi
bd5a31d598 Revert r159804, "[arm-fast-isel] Add support for vararg function calls." 
It broke LLVM :: CodeGen/Thumb2/large-call.ll on several hosts.

llvm-svn: 159817
 2012-07-06 11:12:44 +00:00
Jush Lu
4fdc23801c [arm-fast-isel] Add support for vararg function calls. 
llvm-svn: 159804
 2012-07-06 03:02:37 +00:00
Jush Lu
6dd02e5fe3 Cleanup whitespace. 
llvm-svn: 158443
 2012-06-14 06:08:19 +00:00
Chad Rosier
9734752b2c [arm-fast-isel] Add support for -arm-long-calls. 
Patch by Jush Lu <jush.msn@gmail.com>.

llvm-svn: 158368
 2012-06-12 19:25:13 +00:00
Bill Wendling
2320ff76d7 Re-enable the CMN instruction. 
We turned off the CMN instruction because it had semantics which we weren't
getting correct. If we are comparing with an immediate, then it's okay to use
the CMN instruction.
<rdar://problem/7569620>

llvm-svn: 158302
 2012-06-11 08:07:26 +00:00
Chad Rosier
9ad066a327 [arm-fast-isel] Fix handling of the frameaddress intrinsic. If depth is 0 
then DestReg is undefined.

llvm-svn: 157840
 2012-06-01 21:12:31 +00:00
Chad Rosier
80159b26a5 [arm-fast-isel] Add support for the llvm.frameaddress() intrinsic. 
Patch by Jush Lu <jush.msn@gmail.com>.

llvm-svn: 157696
 2012-05-30 17:23:22 +00:00
Chad Rosier
d9dca3aef3 [arm-fast-isel] Add support for non-global callee. 
Patch by Jush Lu <jush.msn@gmail.com>.

llvm-svn: 157336
 2012-05-23 18:38:57 +00:00
Chad Rosier
4a65a2a197 [fast-isel] Add support for selecting @llvm.trap(). 
llvm-svn: 156646
 2012-05-11 21:33:49 +00:00
Chad Rosier
72bd34ca71 [fast-isel] Remove -disable-arm-fast-isel option. -fast-isel=0 suffices. Minor cleanup. 
llvm-svn: 156632
 2012-05-11 19:40:25 +00:00
Chad Rosier
c20de37076 [fast-isel] Cleaner fix for when we're unable to handle a non-double multi-reg 
retval.  Hoists check before emitting the call to avoid unnecessary work.
rdar://11430407
PR12796

llvm-svn: 156628
 2012-05-11 18:51:55 +00:00
Chad Rosier
4c5904bbe5 [fast-isel] Rather then assert (or segfault in a non-asserts build), fall back 
to selection DAG isel if we're unable to handle a non-double multi-reg retval.
rdar://11430407
PR12796

llvm-svn: 156622
 2012-05-11 17:41:06 +00:00
Chad Rosier
5d178a402f The return type is an unsigned, not a bool. 
llvm-svn: 156621
 2012-05-11 16:41:38 +00:00
Craig Topper
90d95a9142 Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent. 
llvm-svn: 155188
 2012-04-20 07:30:17 +00:00
Jim Grosbach
249356cbf3 Tidy up. 80 columns. 
llvm-svn: 154226
 2012-04-06 23:43:50 +00:00
Jakob Stoklund Olesen
96c573a6c4 Deduplicate ARM call-related instructions. 
We had special instructions for iOS because r9 is call-clobbered, but
that is represented dynamically by the register mask operands now, so
there is no need for the pseudo-instructions.

llvm-svn: 154144
 2012-04-06 00:04:58 +00:00
Craig Topper
6bb276ae72 Remove unnecessary llvm:: qualifications 
llvm-svn: 153500
 2012-03-27 07:21:54 +00:00
Craig Topper
bdc6d71a24 Prune includes and replace uses of ARMRegisterInfo.h with ARMBaeRegisterInfo.h 
llvm-svn: 153422
 2012-03-26 00:45:15 +00:00
Bill Wendling
b427a9f177 Check if we can handle the arguments of a call (and therefore the call) in 
fast-isel before emitting code. If the program bails after code was emitted,
then it could lead to the stack being adjusted more than once (two
CALLSEQ_BEGINs emitted) but being adjuste back only once after the call. This
leads to general badness and gnashing of teeth.
<rdar://problem/11050630>

llvm-svn: 152959
 2012-03-16 23:11:07 +00:00
Chad Rosier
e007850778 [fast-isel] Address Eli's comments for r152847. Specifically, add a test case 
and still allow immediate encoding, just not with cmn.
rdar://11038907

llvm-svn: 152869
 2012-03-15 22:54:20 +00:00
Chad Rosier
103b276e74 [fast-isel] Don't try to encode LONG_MIN using cmn instructions. 
rdar://11038907

llvm-svn: 152847
 2012-03-15 21:40:23 +00:00
Chad Rosier
07b6e758e1 [fast-isel] ARMEmitCmp generates FMSTAT, which transfers the floating-point 
condition flags to CPSR.  This allows us to simplify SelectCmp.
Patch by Zonr Chang <zonr.xchg@gmail.com>.

llvm-svn: 152243
 2012-03-07 20:59:26 +00:00
Lang Hames
a49054ac9c Split fpscr into two registers: FPSCR and FPSCR_NZCV. 
The fpscr register contains both flags (set by FP operations/comparisons) and
control bits. The control bits (FPSCR) should be reserved, since they're always
available and needn't be defined before use. The flag bits (FPSCR_NZCV) should
like to be unreserved so they can be hoisted by MachineCSE. This fixes PR12165.

llvm-svn: 152076
 2012-03-06 00:19:55 +00:00
Jim Grosbach
cd931af452 ARM use the right opcode for FP<->Integer move in fast-isel. 
rdar://10965031

llvm-svn: 151850
 2012-03-01 22:47:09 +00:00
Jakob Stoklund Olesen
a199ee0be3 Switch ARM target to register masks. 
I'll let the buildbots determine the compile time improvements from this
change, but 464.h264ref has 5% faster codegen at -O2.

This patch does cause some assembly changes.  Branch folding can make
different decisions about calls with dead return values.
CriticalAntiDepBreaker may choose different registers because its
liveness tracking is affected.  MachineCopyPropagation may sometimes
leave a dead copy behind.

llvm-svn: 151331
 2012-02-24 01:19:29 +00:00
Craig Topper
3ed929de0a Make all pointers to TargetRegisterClass const since they are all pointers to static data that should not be modified. 
llvm-svn: 151134
 2012-02-22 05:59:10 +00:00
Chad Rosier
7867a0bd92 [fast-isel] Add support for returning non-legal types with no sign- or zero- 
entend flag.

llvm-svn: 150774
 2012-02-17 01:21:28 +00:00
Chad Rosier
63d3cbe3db Remove unnecessary assignment to temporary, ResultReg. 
llvm-svn: 150737
 2012-02-16 22:45:33 +00:00
Chad Rosier
05263042a0 Add braces to if clause to make symmetric with associate else clause. 
llvm-svn: 150591
 2012-02-15 17:36:21 +00:00
Chad Rosier
00614de9ff Use a temporary variable, rather then a series of redundant calls. 
llvm-svn: 150536
 2012-02-15 00:23:55 +00:00
Chad Rosier
253ed7de62 Remove unnecessary assignment to temporary, ResultReg. 
llvm-svn: 150520
 2012-02-14 22:29:48 +00:00
Chad Rosier
b70d1dfae6 [fast-isel] Add support for SUBs with non-legal types. 
llvm-svn: 150047
 2012-02-08 02:45:44 +00:00
Chad Rosier
1ef78d6989 [fast-isel] Add support for ORs with non-legal types. 
llvm-svn: 150045
 2012-02-08 02:29:21 +00:00
Chad Rosier
26610906f0 [fast-isel] Add support for indirect branches. 
llvm-svn: 150014
 2012-02-07 23:56:08 +00:00
Craig Topper
11bcb12b5e Convert assert(0) to llvm_unreachable 
llvm-svn: 149961
 2012-02-07 02:50:20 +00:00
Chad Rosier
945ab43c4f [fast-isel] Add support for ADDs with non-legal types. 
llvm-svn: 149934
 2012-02-06 23:50:07 +00:00
Duncan Sands
cc472eec96 Persuade GCC that there is nothing worth warning about here (there isn't). 
llvm-svn: 149834
 2012-02-05 14:20:11 +00:00
Chad Rosier
a6e543e80b [fast-isel] Add support for URem. 
llvm-svn: 149716
 2012-02-03 21:23:45 +00:00
Chad Rosier
6de31d433d [fast-isel] Rename isZExt to isSigned. No functional change intended. 
llvm-svn: 149714
 2012-02-03 21:14:11 +00:00
Chad Rosier
fc667757e8 [fast-isel] Add support for UDIV. 
llvm-svn: 149712
 2012-02-03 21:07:27 +00:00
Chad Rosier
cff3c98417 [fast-isel] Add support for FPToUI. Also add test cases for FPToSI. 
llvm-svn: 149706
 2012-02-03 20:27:51 +00:00
Chad Rosier
40b3e74387 [fast-isel] Add support for selecting UIToFP. 
llvm-svn: 149704
 2012-02-03 19:42:52 +00:00
David Blaikie
06ecc99a56 More dead code removal (using -Wunreachable-code) 
llvm-svn: 148578
 2012-01-20 21:51:11 +00:00
Eric Christopher
d2436427b5 Fix assert. 
llvm-svn: 147966
 2012-01-11 20:55:27 +00:00
Jakob Stoklund Olesen
8db266fafb Match SelectionDAG logic for enabling movt. 
Darwin doesn't do static, and ELF targets only support static.

llvm-svn: 147740
 2012-01-07 20:49:15 +00:00
Jakob Stoklund Olesen
71f92061aa Use getRegForValue() to materialize the address of ARM globals. 
This enables basic local CSE, giving us 20% smaller code for
consumer-typeset in -O0 builds.

<rdar://problem/10658692>

llvm-svn: 147720
 2012-01-07 04:07:22 +00:00
Jakob Stoklund Olesen
536b4e24d8 Use movw+movt in ARMFastISel::ARMMaterializeGV. 
This eliminates a lot of constant pool entries for -O0 builds of code
with many global variable accesses.

This speeds up -O0 codegen of consumer-typeset by 2x because the
constant island pass no longer has to look at thousands of constant pool
entries.

<rdar://problem/10629774>

llvm-svn: 147712
 2012-01-07 01:47:05 +00:00
Evan Cheng
46b085721a ARM target code clean up. Check for iOS, not Darwin where it makes sense. 
llvm-svn: 146981
 2011-12-20 18:26:50 +00:00
Chad Rosier
879f983406 VFP2 is required for FP loads. Noticed by inspection. 
llvm-svn: 146569
 2011-12-14 17:55:03 +00:00
Chad Rosier
4cb75ebb48 Tidy up. 
llvm-svn: 146568
 2011-12-14 17:32:02 +00:00