Jan Vesely
8960f3da2c
AMDGPU/R600: Implement memory loads from constant AS
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Reviewers: tstellard
Subscribers: arsenm
Differential Revision: http://reviews.llvm.org/D19792
llvm-svn: 269479
2016-05-13 20:39:29 +00:00
Matt Arsenault
4ff4c396c1
AMDGPU: Rename intrinsic to better match instruction name
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Also fixes missing f32 test.
llvm-svn: 260780
2016-02-13 01:03:00 +00:00
Matt Arsenault
b119805900
AMDGPU: Remove 24-bit intrinsics
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The known bit matching code seems to work reasonably well,
so these shouldn't really be needed.
llvm-svn: 259180
2016-01-29 10:05:16 +00:00
Matt Arsenault
fe8ee22547
AMDGPU: Remove more unused intrinsics
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Replace tests with lrp with basic IR expansion
llvm-svn: 258612
2016-01-23 05:42:38 +00:00
Matt Arsenault
351925633e
AMDGPU: Remove random TGSI intrinsic
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I don't think this was ever used.
llvm-svn: 258514
2016-01-22 18:42:44 +00:00
Matt Arsenault
21c6e6f537
AMDGPU: Remove AMDGPU.fract intrinsic
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Mesa doesn't use this, and this is pattern matched already
from fsub x, (ffloor x)
llvm-svn: 258513
2016-01-22 18:42:38 +00:00
Bruce Mitchener
9ad7a63fa9
Fix typos.
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Summary: This fixes a variety of typos in docs, code and headers.
Subscribers: jholewinski, sanjoy, arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D12626
llvm-svn: 247495
2015-09-12 01:17:08 +00:00
Tom Stellard
3f1708598e
R600 -> AMDGPU rename
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llvm-svn: 239657
2015-06-13 03:28:10 +00:00
Tom Stellard
39f7e52397
Revert "AMDGPU: Add core backend files for R600/SI codegen v6"
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This reverts commit 4ea70107c5e51230e9e60f0bf58a0f74aa4885ea.
llvm-svn: 160303
2012-07-16 18:19:53 +00:00
Tom Stellard
9f326179fc
AMDGPU: Add core backend files for R600/SI codegen v6
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llvm-svn: 160270
2012-07-16 14:17:08 +00:00