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Commit Graph

74415 Commits

Author SHA1 Message Date
Bill Wendling
8a625cebd2 Add the 'resume' instruction for the new EH rewrite.
This adds the 'resume' instruction class, IR parsing, and bitcode reading and
writing. The 'resume' instruction resumes propagation of an existing (in-flight)
exception whose unwinding was interrupted with a 'landingpad' instruction (to be
added later).

llvm-svn: 136589
2011-07-31 06:30:59 +00:00
Jakub Staszak
8f686498df Do not handle cases with >= and <= predicates.
llvm-svn: 136588
2011-07-31 05:54:04 +00:00
Jakub Staszak
0fe2246aab Remove untrue comment.
llvm-svn: 136587
2011-07-31 04:51:14 +00:00
Jakub Staszak
6795c54cb7 Do not handle case where LHS is equal to zero, because InstCombiner always moves
it to RHS anyway.

llvm-svn: 136586
2011-07-31 04:47:20 +00:00
Rafael Espindola
92b7e5d6e5 Add a small gep optimization I noticed was missing while reading some IL.
llvm-svn: 136585
2011-07-31 04:43:41 +00:00
Jakob Stoklund Olesen
81247d41e4 Time the emission of debug values.
llvm-svn: 136584
2011-07-31 03:53:42 +00:00
Jakub Staszak
384a405be9 Add Zero Heurestics to BranchProbabilityInfo. If we compare value to zero we
decide whether condition is likely to be true this way:

x == 0  ->  false
x <  0  ->  false
x <= 0  ->  false
x != 0  ->  true
x >  0  ->  true
x >= 0  ->  true

llvm-svn: 136583
2011-07-31 03:27:24 +00:00
Benjamin Kramer
801c887f01 Remove InvalidateStructLayoutInfo from the ocaml bindings.
llvm-svn: 136582
2011-07-31 01:12:39 +00:00
Jakob Stoklund Olesen
0caedc8db8 Revert r136528 "Enable compact region splitting by default."
While this generally helped x86-64, there was some large regressions
for i386.

llvm-svn: 136571
2011-07-30 17:19:14 +00:00
Chandler Carruth
58ad594855 Switch another of the old dependencies on implicitly produced synthetic
rules to the new explicitly listed TableGen rules. Somehow I missed this
in my original sweep.

llvm-svn: 136567
2011-07-30 10:10:23 +00:00
Chandler Carruth
e3c4dc6c66 Remove yet another buried and hidden implicit dependency: every single
sub-library for the targets depended on the core target CodeGen library.
This completely undermined the careful work to separate the those
libraries, especially the MC-layer ones. This surfaced as circular
dependencies when the libraries were built as shared libraries where
CMake doesn't allow cycles.

This should fix PR10537. I'll watch the bots to see if there is fallout
on other platforms.

llvm-svn: 136565
2011-07-30 08:47:05 +00:00
Bill Wendling
57ddbb84ac Revert r136253, r136263, r136269, r136313, r136325, r136326, r136329, r136338,
r136339, r136341, r136369, r136387, r136392, r136396, r136429, r136430, r136444,
r136445, r136446, r136253 pending review.

llvm-svn: 136556
2011-07-30 05:42:50 +00:00
Sean Callanan
bb5e9313c2 Added several architecture names.
llvm-svn: 136552
2011-07-30 01:29:54 +00:00
Jakob Stoklund Olesen
0f099a3c58 Revert "Don't check liveness of unallocatable registers."
The ARM target depends on CPSR liveness being tracked after register
allocation.

llvm-svn: 136548
2011-07-30 00:57:25 +00:00
Chandler Carruth
c1b18f5265 Make my attempt to build up global deps variables actually utilize
globally scoped constructs. Also, round-trip these dependencies through
the LLVMConfig.cmake.in file thata is used by CMake-based clients of
"installed" (or built) LLVM trees.

llvm-svn: 136543
2011-07-29 23:52:01 +00:00
Jakob Stoklund Olesen
a05b70241c Don't check liveness of unallocatable registers.
This includes registers like EFLAGS and ST0-ST7. We don't check for
liveness issues in the verifier and scavenger because registers will
never be allocated from these classes.

While in SSA form, we do care about the liveness of unallocatable
unreserved registers. Liveness of EFLAGS and ST0 neds to be correct for
MachineDCE and MachineSinking.

llvm-svn: 136541
2011-07-29 23:36:21 +00:00
Jakob Stoklund Olesen
c9fe6bed06 Check for multiple defs in the machine code verifier.
llvm-svn: 136535
2011-07-29 23:02:48 +00:00
Owen Anderson
f946892d3e Correctly handle scattered operands where the bits of the operand are contiguous, but out of order.
llvm-svn: 136534
2011-07-29 23:01:18 +00:00
Jakob Stoklund Olesen
7b77f35a1b Add an isSSA() flag to MachineRegisterInfo.
This flag is true from isel to register allocation when the machine
function is required to be in SSA form.  The TwoAddressInstructionPass
and PHIElimination passes clear the flag.

The SSA flag wil be used by the machine code verifier to check for SSA
form, and eventually an assertion can enforce it in +Asserts builds.
This will catch the common target error of creating machine code with
multiple defs of a virtual register.

llvm-svn: 136532
2011-07-29 22:51:22 +00:00
David Greene
43a26c71e8 Unconstify Inits
Remove const qualifiers from Init references, per Chris' request.

llvm-svn: 136531
2011-07-29 22:43:06 +00:00
Jakub Staszak
28ca752c49 Do not lose branch weights when lowering SwitchInst.
llvm-svn: 136529
2011-07-29 22:25:21 +00:00
Jakob Stoklund Olesen
a77df82448 Enable compact region splitting by default.
This helps generate better code in functions with high register
pressure.

llvm-svn: 136528
2011-07-29 22:10:27 +00:00
Eric Christopher
96b31d5681 Add support for the 'Q' constraint.
Fixes rdar://9866494

llvm-svn: 136523
2011-07-29 21:18:58 +00:00
David Greene
6544f815c3 Remove a blank line from the top.
llvm-svn: 136511
2011-07-29 20:50:18 +00:00
Chris Lattner
4e2659058e have the verifier catch gep's into opaque struct types. PR10473
llvm-svn: 136510
2011-07-29 20:32:28 +00:00
Jim Grosbach
9f0533c5d2 ARM SRS instruction parsing, diassembly and encoding support.
Fix the instruction encoding for operands. Refactor mode to use explicit
instruction definitions per FIXME to be more consistent with loads/stores.
Fix disassembler accordingly. Add tests.

llvm-svn: 136509
2011-07-29 20:26:09 +00:00
Chandler Carruth
9090208fd7 On mac, it seems the MC disassembler is actually using the targetinfo
for targets that don't have an MC-ized disassembler. I'm suspicious that
this shouldn't actually be happening, but hoping to fix the CMake build
on macs first, and investigate why second.

llvm-svn: 136508
2011-07-29 20:23:34 +00:00
Jakub Staszak
f75a9b223c Remove unneeded const_cast.
llvm-svn: 136506
2011-07-29 20:05:36 +00:00
Jim Grosbach
324ec675f3 ARM CPS mode immediate is 5 bits, not 4.
llvm-svn: 136505
2011-07-29 20:02:39 +00:00
Devang Patel
c98d0fe74b Clear DbgValues in the end.
llvm-svn: 136503
2011-07-29 19:49:58 +00:00
Jakub Staszak
02fa079dc3 Add more constantness in BranchProbabilityInfo.
llvm-svn: 136502
2011-07-29 19:30:00 +00:00
David Greene
944f1cc9a6 [AVX] Make DagInits Unique
Make sure DagInits are unique and created only once.

llvm-svn: 136501
2011-07-29 19:07:26 +00:00
David Greene
e1cb4aa5bb [AVX] Make FieldInit Unique
Make sure FieldInits are unique and created only once.

llvm-svn: 136500
2011-07-29 19:07:24 +00:00
David Greene
619a865a18 [AVX] Make VarListElementInit Unique
Make sure VarListElementInits are unique and created only once.

llvm-svn: 136499
2011-07-29 19:07:23 +00:00
David Greene
488cb6519c [AVX] Make VarBitInit Unique
Make sure VarBitInits are unique and created only once.

llvm-svn: 136498
2011-07-29 19:07:22 +00:00
David Greene
c941c167b2 [AVX] Make VarInit Unique
Make sure VarInits are unique and created only once.

llvm-svn: 136497
2011-07-29 19:07:21 +00:00
David Greene
cb87febe43 [AVX] Make TernOpInit Unique
Make sure TernOpInits are unique and created only once.  This will be
important for AVX/SIMD as many operators will be used to generate
patterns and other relevant data.

llvm-svn: 136496
2011-07-29 19:07:20 +00:00
David Greene
b561cf4112 [AVX] Make BinOpInit Unique
Make sure BinOpInits are unique and created only once.  This will be
important for AVX/SIMD as many operators will be used to generate
patterns and other relevant data.

llvm-svn: 136495
2011-07-29 19:07:19 +00:00
David Greene
9ee3433c62 [AVX] Make UnOpInit Unique
Make sure UnOpInits are unique and created only once.  This will be
important for AVX/SIMD as many operators will be used to generate
patterns and other relevant data.

llvm-svn: 136494
2011-07-29 19:07:18 +00:00
David Greene
d7910a0936 [AVX] Make ListInits Unique
Ensure ListInits are unique and only created once.  This will be
important for AVX as lists will be used extensively to pass generic
patterns, prefix information and other things to lower-level
pattern-generation classes.

llvm-svn: 136493
2011-07-29 19:07:16 +00:00
David Greene
94607ffc67 [AVX] Make CodeInit Unique
Use a StringMap to ensure CodeInits are unique and created only
once.

llvm-svn: 136492
2011-07-29 19:07:15 +00:00
David Greene
94a66246c5 [AVX] Make StringInit Unique
Use a StringMap to ensure the StringInits are unique.  This is
especially important for AVX where we will have many smallish
strings representing instruction prefixes, suffixes and the like.

llvm-svn: 136491
2011-07-29 19:07:14 +00:00
David Greene
b6f328122b [AVX] Make IntInit Unique
Use a DenseMap to make sure only one IntInit of any value exists.

llvm-svn: 136490
2011-07-29 19:07:12 +00:00
David Greene
a527d6a682 [AVX] Make BitsInit Unique
Make BitsInit a FoldingSetNode so we can unique it.

llvm-svn: 136489
2011-07-29 19:07:11 +00:00
David Greene
65994da789 [AVX] Unique BitInit
Keep only two copies of BitInit: one for true and one for false.

llvm-svn: 136488
2011-07-29 19:07:10 +00:00
David Greene
0f35a5d4aa [AVX] Unique UnsetInit
Keep only one UnsetInit around.

llvm-svn: 136487
2011-07-29 19:07:09 +00:00
David Greene
88abfb940e [AVX] Create Inits Via Factory Method
Replace uses of new *Init with *Init::get.  This hides the allocation
implementation so that we can unique Inits in various ways.

llvm-svn: 136486
2011-07-29 19:07:07 +00:00
David Greene
b149019c5d [AVX] Constify Inits
Make references to Inits const everywhere.  This is the final step
before making them unique.

llvm-svn: 136485
2011-07-29 19:07:05 +00:00
David Greene
b22fe7cc2b [AVX] Remove non-const Iterators
Remove all non-const iterators from Init classes.  This is another
step toward constifying Inits and ultimately turning them into
FoldingSetNodes.

llvm-svn: 136484
2011-07-29 19:07:02 +00:00
David Greene
9f9d96009a [AVX] Remove Mutating Members from Inits
Get rid of all Init members that modify internal state.  This is in
preparation for making references to Inits const.

llvm-svn: 136483
2011-07-29 19:07:00 +00:00