Chad Rosier
8aa8f14940
Fix a performance regression from r144565. Positive offsets were being lowered
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into registers, rather then encoded directly in the load/store.
llvm-svn: 144576
2011-11-14 22:34:48 +00:00
Chad Rosier
65395ac4d0
Add support for Thumb load/stores with negative offsets.
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rdar://10412592
llvm-svn: 144565
2011-11-14 20:22:27 +00:00
Jakob Stoklund Olesen
6035535c96
Fix early-clobber handling in shrinkToUses.
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I broke this in r144515, it affected most ARM testers.
<rdar://problem/10441389>
llvm-svn: 144547
2011-11-14 18:45:38 +00:00
Jakob Stoklund Olesen
83d6dda738
Delete stale comment.
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llvm-svn: 144542
2011-11-14 18:03:05 +00:00
Chad Rosier
0e5094ca87
Add support for ARM halfword load/stores and signed byte loads with negative
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offsets.
rdar://10412592
llvm-svn: 144518
2011-11-14 04:09:28 +00:00
Chad Rosier
58ab241006
The order in which the predicate is added differs between Thumb and ARM mode. Fix predicate when in ARM mode and restore SelectIntrinsicCall.
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llvm-svn: 144494
2011-11-13 09:44:21 +00:00
Chad Rosier
8cfccc356e
Temporarily disable SelectIntrinsicCall when in ARM mode. This is causing failures.
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llvm-svn: 144492
2011-11-13 05:14:43 +00:00
Chad Rosier
acd199b5a4
Add support for emitting both signed- and zero-extend loads. Fix
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SimplifyAddress to handle either a 12-bit unsigned offset or the ARM +/-imm8
offsets (addressing mode 3). This enables a load followed by an integer
extend to be folded into a single load.
For example:
ldrb r1, [r0] ldrb r1, [r0]
uxtb r2, r1 =>
mov r3, r2 mov r3, r1
llvm-svn: 144488
2011-11-13 02:23:59 +00:00
Jakob Stoklund Olesen
d0ddec5771
Delete the 'standard' spiller with used the old spilling framework.
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The current register allocators all use the inline spiller.
llvm-svn: 144477
2011-11-12 23:29:02 +00:00
Jakob Stoklund Olesen
9195bec6e7
RAGreedy is better about hinting now.
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Or maybe we are just getting lucky.
llvm-svn: 144473
2011-11-12 22:39:37 +00:00
Jakob Stoklund Olesen
4aa9c6888f
Linear scan is going away.
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llvm-svn: 144472
2011-11-12 22:39:34 +00:00
Jakob Stoklund Olesen
e1b1bbb882
XFAIL test that depends on linear scan to remove dead code.
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Filed PR11364 to track the problem. Should the register allocator
eliminate dead code?
llvm-svn: 144471
2011-11-12 22:39:30 +00:00
Jakob Stoklund Olesen
94ce588b20
Switch a few tests off linearscan.
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llvm-svn: 144460
2011-11-12 19:53:52 +00:00
Eli Friedman
8563e57e38
Don't try to form pre/post-indexed loads/stores until after LegalizeDAG runs. Fixes PR11029.
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llvm-svn: 144438
2011-11-12 00:35:34 +00:00
Chad Rosier
a2a0fbeded
Add support in fast-isel for selecting memset/memcpy/memmove intrinsics.
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llvm-svn: 144426
2011-11-11 23:31:03 +00:00
Chad Rosier
88ab27405f
Loosen test by using REs. Approved by Devang.
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llvm-svn: 144425
2011-11-11 23:25:38 +00:00
Andrew Trick
6ff75a5d8d
Preserve MachineMemOperands in ARMLoadStoreOptimizer.
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Fixes PR8113.
llvm-svn: 144409
2011-11-11 22:18:09 +00:00
Chad Rosier
feb72bfc08
Add support for using immediates with select instructions.
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rdar://10412592
llvm-svn: 144376
2011-11-11 06:20:39 +00:00
Eli Friedman
285b451941
Make sure to expand SIGN_EXTEND_INREG for NEON vectors. PR11319, round 3.
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llvm-svn: 144361
2011-11-11 03:16:38 +00:00
Chad Rosier
ac92994773
Add support for using MVN to materialize negative constants.
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rdar://10412592
llvm-svn: 144348
2011-11-11 00:36:21 +00:00
Chad Rosier
7b7dced006
When in ARM mode, LDRH/STRH require special handling of negative offsets.
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For correctness, disable this for now.
rdar://10418009
llvm-svn: 144316
2011-11-10 21:09:49 +00:00
Chad Rosier
69cdae5eb9
For immediate encodings of icmp, zero or sign extend first. Then
...
determine if the value is negative and flip the sign accordingly.
rdar://10422026
llvm-svn: 144258
2011-11-10 01:30:39 +00:00
Eli Friedman
c93f8aa514
Make sure we correctly unroll conversions between v2f64 and v2i32 on ARM.
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llvm-svn: 144241
2011-11-09 23:36:02 +00:00
Eli Friedman
b01f15653c
Add check so we don't try to perform an impossible transformation. Fixes issue from PR11319.
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llvm-svn: 144216
2011-11-09 22:25:12 +00:00
Chad Rosier
228dc76221
Use REs to remove dependencies on the register allocation order.
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llvm-svn: 144209
2011-11-09 20:06:13 +00:00
Chad Rosier
e32fed6868
Add support for encoding immediates in icmp and fcmp. Hopefully, this will
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remove a fair number of unnecessary materialized constants.
rdar://10412592
llvm-svn: 144163
2011-11-09 03:22:02 +00:00
Evan Cheng
08e61752f2
Add workaround for Cortex-M3 errata 602117 by replacing ldrd x, y, [x] with ldm or ldr pairs.
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llvm-svn: 144123
2011-11-08 21:21:09 +00:00
Lang Hames
ee7de1cff0
Lower mem-ops to unaligned i32/i16 load/stores on ARM where supported.
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Add support for trimming constants to GetDemandedBits. This fixes some funky
constant generation that occurs when stores are expanded for targets that don't
support unaligned stores natively.
llvm-svn: 144102
2011-11-08 18:56:23 +00:00
Eli Friedman
d5ba38a3d2
Make sure to mark vector extload's as expand on ARM. Fixes PR11319.
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llvm-svn: 144057
2011-11-08 01:43:53 +00:00
Bill Wendling
16499170c2
Convert tests to the new EH model.
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llvm-svn: 144048
2011-11-08 00:09:27 +00:00
Chad Rosier
4b12a5b7fc
Enable support for returning i1, i8, and i16. Nothing special todo as it's the
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callee's responsibility to sign or zero-extend the return value. The additional
test case just checks to make sure the calls are selected (i.e., -fast-isel-abort
doesn't assert).
llvm-svn: 144047
2011-11-08 00:03:32 +00:00
Benjamin Kramer
89ebc7ab4b
Simplify some uses of utohexstr.
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As a side effect hex is printed lowercase instead of uppercase now.
llvm-svn: 144013
2011-11-07 21:00:59 +00:00
Chad Rosier
806ffd8918
Add support for passing i1, i8, and i16 call parameters. Also, be sure to
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zero-extend the constant integer encoding. Test case provides testing for
both call parameters and materialization of i1, i8, and i16 types.
llvm-svn: 143821
2011-11-05 20:16:15 +00:00
Benjamin Kramer
4c8932e3b8
Add an option to pad an uleb128 to MCObjectWriter and remove the uleb128 encoding from the DWARF asm printer.
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As a side effect we now print dwarf ulebs with .ascii directives.
llvm-svn: 143809
2011-11-05 11:52:44 +00:00
Chad Rosier
21cd759234
Add fast-isel support for returning i1, i8, and i16.
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llvm-svn: 143669
2011-11-04 00:50:21 +00:00
Chad Rosier
74c4e2c2d9
Add support for sign-extending non-legal types in SelectSIToFP().
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llvm-svn: 143603
2011-11-03 02:04:59 +00:00
Lang Hames
ceec8ec67e
Try to lower memset/memcpy/memmove to vector instructions on ARM where the alignment permits.
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llvm-svn: 143582
2011-11-02 22:52:45 +00:00
Chad Rosier
8a613c5ec5
Add support for comparing integer non-legal types.
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llvm-svn: 143559
2011-11-02 18:08:25 +00:00
Nick Lewycky
5758d6af22
Always use the string pool, even when it makes the .o larger. This may help
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tools that read the debug info in the .o files by making the DIE sizes more
consistent.
llvm-svn: 143186
2011-10-28 05:29:47 +00:00
Jakob Stoklund Olesen
de21509dcd
Also set addrmode6 alignment when align==size.
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Previously, we were only setting the alignment bits on over-aligned
loads and stores.
llvm-svn: 143160
2011-10-27 22:39:16 +00:00
Evan Cheng
75271d09f1
Avoid partial CPSR dependency from loop backedges. rdar://10357570
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llvm-svn: 143145
2011-10-27 21:21:05 +00:00
Nick Lewycky
651475977d
Teach our Dwarf emission to use the string pool.
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llvm-svn: 143097
2011-10-27 06:44:11 +00:00
Chad Rosier
e76ba1b654
A branch predicated on a constant can just FastEmit an unconditional branch.
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llvm-svn: 143086
2011-10-27 00:21:16 +00:00
Lang Hames
d87e366c7f
Make sure short memsets on ARM lower to stores, even when optimizing for size.
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llvm-svn: 143055
2011-10-26 20:56:52 +00:00
Jim Grosbach
5a61a956cb
Thumb2 remove redundant ".w" suffix from t2MVNCCi pattern.
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llvm-svn: 143034
2011-10-26 17:28:15 +00:00
James Molloy
9afc8b08f7
Revert r142530 at least temporarily while a discussion is had on llvm-commits regarding exactly how much optsize should optimize for size over performance.
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llvm-svn: 143023
2011-10-26 08:53:19 +00:00
Evan Cheng
941d5c148f
Revert part of r142530. The patch potentially hurts performance especially
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on Darwin platforms where -Os means optimize for size without hurting
performance.
llvm-svn: 143002
2011-10-26 01:17:44 +00:00
Eli Friedman
652497e03c
Don't crash on variable insertelement on ARM. PR10258.
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llvm-svn: 142871
2011-10-24 23:08:52 +00:00
Bill Wendling
e37d737f13
Check the visibility of the global variable before placing it into the stubs
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table. A hidden variable could potentially end up in both lists.
<rdar://problem/10336715>
llvm-svn: 142869
2011-10-24 23:05:43 +00:00
Chad Rosier
38661ab3ce
Revert 142337. Thumb1 still doesn't support dynamic stack realignment. :(
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llvm-svn: 142557
2011-10-20 00:07:12 +00:00