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35 Commits

Author SHA1 Message Date
Vincent Lejeune
26780e84f1 R600: Workaround for cayman loop bug 
llvm-svn: 196121
 2013-12-02 17:29:37 +00:00
Tom Stellard
291737ed45 R600: Add IsExport bit to TableGen instruction definitions 
Tested-by: Aaron Watry <awatry@gmail.com>
llvm-svn: 188516
 2013-08-16 01:11:51 +00:00
Tom Stellard
8061257aaf R600: Change the RAT instruction assembly names so they match the docs 
Tested-by: Aaron Watry <awatry@gmail.com>
llvm-svn: 188515
 2013-08-16 01:11:46 +00:00
Tom Stellard
a515fb7c17 R600: Add 64-bit float load/store support 
* Added R600_Reg64 class
* Added T#Index#.XY registers definition
* Added v2i32 register reads from parameter and global space
* Added f32 and i32 elements extraction from v2f32 and v2i32
* Added v2i32 -> v2f32 conversions

Tom Stellard:
  - Mark vec2 operations as expand.  The addition of a vec2 register
    class made them all legal.

Patch by: Dmitry Cherkassov

Signed-off-by: Dmitry Cherkassov <dcherkassov@gmail.com>
llvm-svn: 187582
 2013-08-01 15:23:42 +00:00
Vincent Lejeune
14935c8687 R600: Remove predicated_break inst 
We were using two instructions for similar purpose : break and
predicated break. Only predicated_break was emitted and it was
lowered at R600ControlFlowFinalizer to JUMP;CF_BREAK;POP.
This commit simplify the situation by making AMDILCFGStructurizer
emit IF_PREDICATE;BREAK;ENDIF; instead of predicated_break (which
is now removed).

There is no functionality change.

llvm-svn: 187510
 2013-07-31 19:31:14 +00:00
Vincent Lejeune
946e631d0f R600: Don't emit empty then clause and use alu_pop_after 
llvm-svn: 186725
 2013-07-19 21:45:15 +00:00
Craig Topper
d2ea089f09 Make some arrays 'static const' 
llvm-svn: 186307
 2013-07-15 06:39:13 +00:00
Vincent Lejeune
5517f57c42 R600: Do not predicated basic block with multiple alu clause 
Test is not included as it is several 1000 lines long.
To test this functionnality, a test case must generate at least 2 ALU clauses,
where an ALU clause is ~110 instructions long.

NOTE: This is a candidate for the stable branch.
llvm-svn: 185943
 2013-07-09 15:03:33 +00:00
Tom Stellard
c25852891f R600: Use EXPORT_RAT_INST_STORE_DWORD for stores on Cayman 
We were using RAT_INST_STORE_RAW, which seemed to work, but the docs
say this instruction doesn't exist for Cayman, so it's probably safer
to use a documented instruction instead.

Reviewed-by: Vincent Lejeune<vljn at ovi.com>
llvm-svn: 184015
 2013-06-14 22:12:24 +00:00
Vincent Lejeune
2f252fdf26 R600: Anti dep better handled in tex clause 
llvm-svn: 183592
 2013-06-07 23:30:26 +00:00
Tom Stellard
0ffa8d28b1 R600: Rework subtarget info and remove AMDILDevice classes 
This should simplify the subtarget definitions and make it easier to
add new ones.

Reviewed-by: Vincent Lejeune <vljn@ovi.com>
llvm-svn: 183566
 2013-06-07 20:37:48 +00:00
Bill Wendling
aa15a56463 Don't cache the instruction and register info from the TargetMachine, because 
the internals of TargetMachine could change.

No functionality change intended.

llvm-svn: 183561
 2013-06-07 20:28:55 +00:00
Vincent Lejeune
97b4286f95 R600: CALL_FS consumes a stack size entry 
llvm-svn: 183108
 2013-06-03 15:44:42 +00:00
Tom Stellard
dee18e3abb R600: Fix R600ControlFlowFinalizer not considering VTX_READ 128 bit dst reg 
Patch by: Vincent Lejeune

https://bugs.freedesktop.org/show_bug.cgi?id=64877

NOTE: This is a candidate for the 3.3 branch.
llvm-svn: 182600
 2013-05-23 18:26:42 +00:00
Benjamin Kramer
620125412f Move passes from namespace llvm into anonymous namespaces. Sort includes while there. 
llvm-svn: 182594
 2013-05-23 17:10:37 +00:00
Aaron Ballman
1068da3397 Setting the default value (fixes CRT assertions about uninitialized variable use when doing debug MSVC builds), and fixing coding style. 
llvm-svn: 182585
 2013-05-23 14:55:00 +00:00
Vincent Lejeune
d391d51989 R600: Some factorization 
llvm-svn: 182123
 2013-05-17 16:50:02 +00:00
Vincent Lejeune
bf991c018d R600: Factorize Fetch size limit inside AMDGPUSubTarget 
llvm-svn: 182122
 2013-05-17 16:49:55 +00:00
Vincent Lejeune
5d7b2a4aea R600: Signed literals are 64bits wide 
llvm-svn: 180960
 2013-05-02 21:53:03 +00:00
Vincent Lejeune
29f24e0ce8 R600: use native for alu 
llvm-svn: 180761
 2013-04-30 00:14:38 +00:00
Vincent Lejeune
b2f40c2a8c R600: Take inner dependency into tex/vtx clauses 
llvm-svn: 180757
 2013-04-30 00:14:00 +00:00
Vincent Lejeune
4d300cefe8 R600: Turn TEX/VTX into native instructions 
llvm-svn: 180756
 2013-04-30 00:13:53 +00:00
Vincent Lejeune
e641cd06c9 R600: Add FetchInst bit to instruction defs to denote vertex/tex instructions 
v2[Vincent Lejeune]: Split FetchInst into usesTextureCache/usesVertexCache

llvm-svn: 180755
 2013-04-30 00:13:39 +00:00
Tom Stellard
33e7a52e1c R600: Use correct CF_END instruction on Northern Island GPUs 
llvm-svn: 180735
 2013-04-29 22:23:58 +00:00
Vincent Lejeune
3666f07489 R600: Use .AMDGPU.config section to emit stacksize 
llvm-svn: 180124
 2013-04-23 17:34:12 +00:00
Vincent Lejeune
e5ba5f1b14 R600: Add CF_END 
llvm-svn: 180123
 2013-04-23 17:34:00 +00:00
NAKAMURA Takumi
c9309ae42b R600ControlFlowFinalizer.cpp: Fix a warning. [-Wunused-variable] 
llvm-svn: 179263
 2013-04-11 04:16:27 +00:00
NAKAMURA Takumi
1837d9ec3e Whitespace. 
llvm-svn: 179262
 2013-04-11 04:16:22 +00:00
Vincent Lejeune
daa1e69206 R600: Add VTX_READ_* and RAT_WRITE_CACHELESS_* when computing cf addr 
llvm-svn: 179174
 2013-04-10 13:29:20 +00:00
Vincent Lejeune
cbdacdc057 R600: Control Flow support for pre EG gen 
llvm-svn: 179020
 2013-04-08 13:05:49 +00:00
Vincent Lejeune
d5f0b3821e R600: Fix wrong address when substituting ENDIF 
llvm-svn: 178762
 2013-04-04 14:00:03 +00:00
Vincent Lejeune
a680946842 R600: Take export into account when computing cf address 
llvm-svn: 178761
 2013-04-04 13:59:59 +00:00
Vincent Lejeune
bab4692335 R600: Simplify data structure and add DEBUG to R600ControlFlowFinalizer 
llvm-svn: 178665
 2013-04-03 16:24:09 +00:00
Vincent Lejeune
6b257b347d R600: Consider KILLGT as an ALU instruction 
Mesa does not override llvm behavior wrt KILLGT anymore so llvm
has to handle KILLGT on its own.

llvm-svn: 178664
 2013-04-03 16:24:04 +00:00
Vincent Lejeune
dc0e12bd5b R600: Add support for native control flow 
llvm-svn: 178505
 2013-04-01 21:48:05 +00:00