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Commit Graph

12577 Commits

Author SHA1 Message Date
Nick Lewycky
fd664969bc Teach the transformation that moves binary operators around selects to preserve
the subclass optional data.

llvm-svn: 128388
2011-03-27 19:51:23 +00:00
Frits van Bommel
c234349939 Constant folding support for calls to umul.with.overflow(), basically identical to the smul.with.overflow() code.
llvm-svn: 128379
2011-03-27 14:26:13 +00:00
Nick Lewycky
27e865c948 Add a small missed optimization: turn X == C ? X : Y into X == C ? C : Y. This
removes one use of X which helps it pass the many hasOneUse() checks.

In my analysis, this turns up very often where X = A >>exact B and that can't be
simplified unless X has one use (except by increasing the lifetime of A which is
generally a performance loss).

llvm-svn: 128373
2011-03-27 07:30:57 +00:00
Cameron Zwarich
09bd1deda3 Fix a typo and add a test.
llvm-svn: 128331
2011-03-26 04:58:50 +00:00
Jakob Stoklund Olesen
446412de55 Collect and coalesce DBG_VALUE instructions before emitting the function.
Correctly terminate the range of register DBG_VALUEs when the register is
clobbered or when the basic block ends.

The code is now ready to deal with variables that are sometimes in a register
and sometimes on the stack. We just need to teach emitDebugLoc to say 'stack
slot'.

llvm-svn: 128327
2011-03-26 02:19:36 +00:00
Johnny Chen
61713b9c16 Fixed the t2PLD and friends disassembly and add two test cases.
llvm-svn: 128322
2011-03-26 01:32:48 +00:00
Eric Christopher
b51c27cd9a Fix the bfi handling for or (and a mask) (and b mask). We need the two
masks to match inversely for the code as is to work. For the example given
we actually want:

bfi r0, r2, #1, #1

not #0, however, given the way the pattern is written it's not possible
at the moment.

Fixes rdar://9177502

llvm-svn: 128320
2011-03-26 01:21:03 +00:00
Bill Wendling
72b390743d PR9561: A store with a negative offset (via GEP) could erroniously say that it
completely overlaps a previous store, thus mistakenly deleting that store. Check
for this condition.

llvm-svn: 128319
2011-03-26 01:20:37 +00:00
Johnny Chen
7238c61ff7 Add test for A8.6.246 UMULL to both arm-tests.txt amd thumb-tests.txt.
llvm-svn: 128306
2011-03-25 23:02:58 +00:00
Johnny Chen
4c59e0a556 Add two test cases t2SMLABT and t2SMMULR for DisassembleThumb2Mul().
llvm-svn: 128305
2011-03-25 22:43:28 +00:00
Johnny Chen
75c4627aea Fix DisassembleThumb2DPReg()'s handling of RegClass. Cannot hardcode GPRRegClassID.
Also add some test cases.

rdar://problem/9189829

llvm-svn: 128304
2011-03-25 22:19:07 +00:00
Johnny Chen
5b840e19ef DisassembleThumb2LdSt() did not handle t2LDRs correctly with respect to RegClass. Add two test cases.
rdar://problem/9182892

llvm-svn: 128299
2011-03-25 19:35:37 +00:00
Johnny Chen
f16635a8f0 A8.6.226 TBB, TBH:
Add two test cases.

llvm-svn: 128295
2011-03-25 18:40:21 +00:00
Johnny Chen
c69c7b19ae Modify DisassembleThumb2LdStEx() to be more robust/correct in light of recent change to
t2LDREX/t2STREX instructions.  Add two test cases.

llvm-svn: 128293
2011-03-25 18:29:49 +00:00
Daniel Dunbar
1cbd2c6c88 MC: Improve some diagnostics on uses of '.' pseudo-symbol.
llvm-svn: 128289
2011-03-25 17:47:17 +00:00
Johnny Chen
f19366e37b Instruction formats of SWP/SWPB were changed from LdStExFrm to MiscFrm. Modify the disassembler to handle that.
rdar://problem/9184053

llvm-svn: 128285
2011-03-25 17:31:16 +00:00
Jakob Stoklund Olesen
ab0501221b Emit less labels for debug info and stop emitting .loc directives for DBG_VALUEs.
The .dot directives don't need labels, that is a leftover from when we created
line number info manually.

Instructions following a DBG_VALUE can share its label since the DBG_VALUE
doesn't produce any code.

llvm-svn: 128284
2011-03-25 17:20:59 +00:00
Johnny Chen
583b7cb25e Also need to handle invalid imod values for CPS2p.
rdar://problem/9186136

llvm-svn: 128283
2011-03-25 17:03:12 +00:00
Johnny Chen
1f29c2775d Modify the wrong logic in the assert of DisassembleThumb2LdStDual() (the register classes were changed),
modify the comment to be up-to-date, and add a test case for A8.6.66 LDRD (immediate) Encoding T1.

llvm-svn: 128252
2011-03-25 01:09:48 +00:00
Johnny Chen
a4f73530a5 delegate the disassembly of t2ADR to the more generic t2ADDri12/t2SUBri12 instructions, and add a test case for that.
llvm-svn: 128249
2011-03-25 00:17:42 +00:00
Johnny Chen
4a55a733b8 The opcode names ("tLDM", "tLDM_UPD") used for conflict resolution have been stale since
the change to ("tLDMIA", "tLDMIA_UPD").  Update the conflict resolution code and add
test cases for that.

llvm-svn: 128247
2011-03-24 23:42:31 +00:00
Johnny Chen
6345e6a882 The ARM disassembler was confused with the 16-bit tSTMIA instruction.
According to A8.6.189 STM/STMIA/STMEA (Encoding T1), there's only tSTMIA_UPD available.
Ignore tSTMIA for the decoder emitter and add a test case for that.

llvm-svn: 128246
2011-03-24 23:21:14 +00:00
Devang Patel
c6ed54c434 Move test in x86 specific area.
llvm-svn: 128245
2011-03-24 22:39:09 +00:00
Johnny Chen
9672fe0126 Handle the added VBICiv*i* NEON instructions, too.
llvm-svn: 128243
2011-03-24 22:04:39 +00:00
Eric Christopher
d0fd06aeda Testcase for llvm-gcc commit r128230.
llvm-svn: 128242
2011-03-24 21:59:03 +00:00
Johnny Chen
1fc160fa19 T2 Load/Store Multiple:
These instructions were changed to not embed the addressing mode within the MC instructions
We also need to update the corresponding assert stmt.  Also add a test case.

llvm-svn: 128240
2011-03-24 21:36:56 +00:00
Benjamin Kramer
a9c4afdeec Plug a leak in the arm disassembler and put the tests back.
llvm-svn: 128238
2011-03-24 21:14:28 +00:00
Bruno Cardoso Lopes
a5de5df6d8 Add asm parsing support w/ testcases for strex/ldrex family of instructions
llvm-svn: 128236
2011-03-24 21:04:58 +00:00
Johnny Chen
ef99d9b9eb Remove these two test files as they cause llvm-i686-linux-vg_leak build to fail 'test-llvm'.
These two are test cases which should result in 'invalid instruction encoding' from running llvm-mc -disassemble.

llvm-svn: 128235
2011-03-24 20:56:23 +00:00
Johnny Chen
ae5d27987a ADR was added with the wrong encoding for inst{24-21}, and the ARM decoder was fooled.
Set the encoding bits to {0,?,?,0}, not 0.  Plus delegate the disassembly of ADR to
the more generic ADDri/SUBri instructions, and add a test case for that.

llvm-svn: 128234
2011-03-24 20:42:48 +00:00
Devang Patel
4909f41ec5 Keep track of directory namd and fIx regression caused by Rafael's patch r119613.
A better approach would be to move source id handling inside MC.

llvm-svn: 128233
2011-03-24 20:30:50 +00:00
Johnny Chen
f6655e82b3 The r118201 added support for VORR (immediate). Update ARMDisassemblerCore.cpp to disassemble the
VORRiv*i* instructions properly within the DisassembleN1RegModImmFrm() function.  Add a test case.

llvm-svn: 128226
2011-03-24 18:40:38 +00:00
Johnny Chen
154393018f Add comments to the handling of opcode CPS3p to reject invalid instruction encoding,
a test case of invalid CPS3p encoding and one for invalid VLDMSDB due to regs out of range.

llvm-svn: 128220
2011-03-24 17:04:22 +00:00
NAKAMURA Takumi
cabdaca3c7 Target/X86: [PR8777][PR8778] Tweak alloca/chkstk for Windows targets.
FIXME: Some cleanups would be needed.
llvm-svn: 128206
2011-03-24 07:07:00 +00:00
Cameron Zwarich
4d1c5fe9ae Do early taildup of ret in CodeGenPrepare for potential tail calls that have a
void return type. This fixes PR9487.

llvm-svn: 128197
2011-03-24 04:52:10 +00:00
Johnny Chen
404fb6c07f Load/Store Multiple:
These instructions were changed to not embed the addressing mode within the MC instructions
We also need to update the corresponding assert stmt.  Also add two test cases.

llvm-svn: 128191
2011-03-24 01:40:42 +00:00
Johnny Chen
0d55ce3734 STRT and STRBT was incorrectly tagged as IndexModeNone during the refactorings (r119821).
We now tag them as IndexModePost.

llvm-svn: 128189
2011-03-24 01:07:26 +00:00
Johnny Chen
f8507c96f1 The r128103 fix to cope with the removal of addressing modes from the MC instructions
were incomplete.  The assert stmt needs to be updated and the operand index incrment is wrong.
Fix the bad logic and add some sanity checking to detect bad instruction encoding;
and add a test case.

llvm-svn: 128186
2011-03-24 00:28:38 +00:00
Devang Patel
2cea16e9bb Enable GlobalMerge on darwin.
llvm-svn: 128183
2011-03-23 23:34:19 +00:00
Andrew Trick
80893981d6 Revert r128175.
I'm backing this out for the second time. It was supposed to be fixed by r128164, but the mingw self-host must be defeating the fix.

llvm-svn: 128181
2011-03-23 23:11:02 +00:00
Evan Cheng
6e799c3c58 Cmp peephole optimization isn't always safe for signed arithmetics.
int tries = INT_MAX;    
while (tries > 0) {
      tries--;
}

The check should be:
        subs    r4, #1
        cmp     r4, #0
        bgt     LBB0_1

The subs can set the overflow V bit when r4 is INT_MAX+1 (which loop
canonicalization apparently does in this case). cmp #0 would have cleared
it while not changing the N and Z bits. Since BGT is dependent on the V
bit, i.e. (N == V) && !Z, it is not safe to eliminate the cmp #0.

rdar://9172742

llvm-svn: 128179
2011-03-23 22:52:04 +00:00
Eli Friedman
76fcfaab12 PR9535: add support for splitting and scalarizing vector ISD::FP_ROUND.
Also cleaning up some duplicated code while I'm here.

llvm-svn: 128176
2011-03-23 22:18:48 +00:00
Andrew Trick
a7b48f34b1 Reapply Eli's r127852 now that the pre-RA scheduler can spill EFLAGS.
(target-specific branchless method for double-width relational comparisons on x86)

llvm-svn: 128175
2011-03-23 22:16:02 +00:00
Anders Carlsson
8681fe2359 Revert r128140 for now.
llvm-svn: 128149
2011-03-23 15:51:12 +00:00
Cameron Zwarich
9f72ea0a80 Fix PR9464 by correcting some math that just happened to be right in most cases
that were hit in practice.

llvm-svn: 128146
2011-03-23 05:25:55 +00:00
Anders Carlsson
556ad25dec A global variable with internal linkage where all uses are in one function and whose address is never taken is a non-escaping local object and can't alias anything else.
llvm-svn: 128140
2011-03-23 02:19:48 +00:00
Johnny Chen
b9309ecef1 Add disassembly test cases for:
A8.6.292 VCMPE

llvm-svn: 128120
2011-03-22 23:08:56 +00:00
Devang Patel
c323201836 Remove the test.
llvm-svn: 128119
2011-03-22 23:07:03 +00:00
Jakob Stoklund Olesen
28ebc380f6 Reapply r128045 and r128051 with fixes.
This will extend the ranges of debug info variables in registers until they are
clobbered.

Fix 1: Don't mistake DBG_VALUE instructions referring to incoming arguments on
the stack with DBG_VALUE instructions referring to variables in the frame
pointer. This fixes the gdb test-suite failure.

Fix 2: Don't trace through copies to physical registers setting up call
arguments. These registers are call clobbered, and the source register is more
likely to be a callee-saved register that can be extended through the call
instruction.

llvm-svn: 128114
2011-03-22 22:33:08 +00:00
Johnny Chen
beb7e880a2 LDRT and LDRBT was incorrectly tagged as IndexModeNone during the refactorings (r119821).
We now tag them as IndexModePost.

This fixed http://llvm.org/bugs/show_bug.cgi?id=9530.

llvm-svn: 128113
2011-03-22 22:28:49 +00:00