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Commit Graph

64726 Commits

Author SHA1 Message Date
Matheus Almeida
8cdecf1482 [mips][msa] Direct Object Emission support for LD/ST instructions.
llvm-svn: 193082
2013-10-21 13:07:13 +00:00
Matheus Almeida
49a9f349f1 [mips][msa] Direct Object Emission support for LDI instructions.
llvm-svn: 193081
2013-10-21 12:56:20 +00:00
Matheus Almeida
c0cc50e68b [mips][msa] Direct Object Emission support for MOVE.v.
llvm-svn: 193080
2013-10-21 12:43:54 +00:00
Matheus Almeida
e54e855dbb [mips][msa] Direct Object Emission support for CTCMSA and CFCMSA.
These instructions are logically related as they allow read/write of MSA control registers.
Currently MSA control registers are emitted by number but hopefully that will change as soon 
as GAS starts accepting them by name as that would make the assembly easier to read.

llvm-svn: 193078
2013-10-21 12:26:50 +00:00
Matheus Almeida
1fede43958 [mips][msa] Direct Object Emission of SPLAT instruction.
llvm-svn: 193077
2013-10-21 12:07:26 +00:00
Matheus Almeida
1760b2c642 [mips][msa] Fix definition of SLD instruction.
The second parameter of the SLD intrinsic is the number of columns (GPR) to 
slide left the source array.

llvm-svn: 193076
2013-10-21 11:47:56 +00:00
Michael Gottesman
80054d1ccd Fix the predecessor removal logic in r193045.
Additionally some small comment/stylistic fixes are included as well.

llvm-svn: 193068
2013-10-21 05:20:11 +00:00
Bill Wendling
ab46af5515 Don't eliminate a partially redundant load if it's in a landing pad.
A landing pad can be jumped to only by the unwind edge of an invoke
instruction. If we eliminate a partially redundant load in a landing pad, it
will create a basic block that violates this constraint. It then leads to other
problems down the line if it tries to merge that basic block with the landing
pad. Avoid this by not eliminating the load in a landing pad.

PR17621

llvm-svn: 193064
2013-10-21 04:09:17 +00:00
Michael Gottesman
f056facc24 Teach simplify-cfg how to correctly create covered lookup tables for switches on iN with N >= 3.
One optimization simplify-cfg performs is the converting of switches to
lookup tables if the switch has > 4 cases. This is done by:

1. Finding the max/min case value and calculating the switch case range.
2. Create a lookup table basic block.
3. Perform a check in the switch's BB to see if the input value is in
the switch's case range. If the input value satisfies said predicate
branch to the lookup table BB, otherwise branch to the switch's default
destination BB using the default value as the result.

The conditional check consists of subtracting the min case value of the
table from any input iN value and then ensuring that said value is
unsigned less than the size of the lookup table represented as an iN
value.

If the lookup table is a covered lookup table, the size of the table will be N
which is 0 as an iN value. Thus the comparison will be an `icmp ult` of an iN
value against 0 which is always false yielding the incorrect result.

This patch fixes this problem by recognizing if we have a covered lookup table
and if we do, unconditionally jumps to the lookup table BB since the covering
property of the lookup table implies no input values could not be handled by
said BB.

rdar://15268442

llvm-svn: 193045
2013-10-20 07:04:37 +00:00
Peter Collingbourne
657e872155 Emit prefix data after debug and EH directives.
This ensures that the prefix data is treated as part of the function for
the purpose of debug info.  This provides a better debugging experience,
among other things by allowing a debug info client to correctly look up
a function in debug info given a function pointer.

llvm-svn: 193042
2013-10-20 02:16:21 +00:00
Peter Collingbourne
b815e25b6f Emit DWARF line entries for all data in the instruction stream.
r182712 attempted to do this, but it failed to handle data emitted via
EmitBytes.

llvm-svn: 193041
2013-10-20 02:16:18 +00:00
Benjamin Kramer
7113d15173 Remove unused variable.
llvm-svn: 193038
2013-10-19 16:32:15 +00:00
Bill Wendling
fda67cdf91 Perform an intelligent splice of the predecessor with the single successor.
If the predecessor's being spliced into a landing pad, then we need the PHIs to
come first and the rest of the predecessor's code to come *after* the landing
pad instruction.

llvm-svn: 193035
2013-10-19 11:27:12 +00:00
Yaron Keren
d726dbad15 Avoid duplicate search by reusing the iterator.
llvm-svn: 193034
2013-10-19 09:04:26 +00:00
Yaron Keren
9ef9a95d41 Added comments from Andrew Kaylor.
llvm-svn: 193033
2013-10-19 09:03:20 +00:00
Eric Christopher
c835d88313 Reformat.
llvm-svn: 193024
2013-10-19 01:04:47 +00:00
Eric Christopher
fd9639542f Fix up a few minor performance problems spotted in code review.
llvm-svn: 193023
2013-10-19 01:04:42 +00:00
Andrew Trick
027f71d443 SCEV should use NSW to get trip count for positive nonunit stride loops.
SCEV currently fails to compute loop counts for nonunit stride
loops. This comes up frequently. It prevents loop optimization and
forces vectorization to insert extra loop checks.

For example:
void foo(int n, int *x) {
 for (int i = 0; i < n; i += 3) {
   x[i] = i;
   x[i+1] = i+1;
   x[i+2] = i+2;
 }
}

We need to properly handle the case in which limit > INT_MAX-stride. In
the above case: n > INT_MAX-3. In this case the loop counter will step
beyond the limit and overflow at the same time. However, knowing that
signed integer overlow in undefined, we can assume the loop test
behavior is arbitrary after overflow. This obeys both C undefined
behavior rules, and the more strict LLVM poison value rules.

I'm finally fixing this in response to Hal Finkel's persistence.
The most probable reason that we never optimized this before is that
we were being careful to handle case where the developer expected a
side-effect free infinite loop relying on overflow:

for (int i = 0; i < n; i += s) {
  ++j;
}
return j;

If INT_MAX+1 is a multiple of s and n > INT_MAX-s, then we might
expect an infinite loop. However there are plenty of ways to achieve
this effect without relying on undefined behavior of signed overflow.

llvm-svn: 193015
2013-10-18 23:43:53 +00:00
Nadav Rotem
fd357159bc Mark some command line flags as hidden
llvm-svn: 193013
2013-10-18 23:38:13 +00:00
Michael J. Spencer
c222d0edff Can we move to C++11 already?
llvm-svn: 193007
2013-10-18 23:07:01 +00:00
Michael J. Spencer
0a474dd83c [Support][YAML] Add support for accessing tags and tag handle substitution.
llvm-svn: 193004
2013-10-18 22:38:04 +00:00
Manman Ren
7f9f878802 Debug Info: add a newly-created DIE to a parent in the same function.
With this commit, all DIEs created in CompileUnit will be added to parents
inside the same function. Also make getOrCreateTemplateType|Value functions
private.

No functionality change.

llvm-svn: 193002
2013-10-18 21:14:19 +00:00
Manman Ren
f4efad0180 Debug Info: simplify code a bit.
llvm-svn: 193001
2013-10-18 20:52:22 +00:00
Hans Wennborg
c1a311233c MC asm parser: allow ?'s in symbol names, and handle @'s in names in MS asm
This is another (final?) stab at making us able to parse our own asm output
on Windows.

Symbols on Windows often contain @'s and ?'s in their names. Our asm parser
didn't like this. ?'s were not allowed, and @'s were intepreted as trying to
reference PLT/GOT/etc.

We can't just add quotes around the bad names, since e.g. for MinGW, we use gas
to assemble, and it doesn't like quotes in some places (notably in .def
directives).

This commit makes us allow ?'s in symbol names, and @'s in symbol names for MS
assembly.

Differential Revision: http://llvm-reviews.chandlerc.com/D1978

llvm-svn: 193000
2013-10-18 20:46:28 +00:00
Eric Christopher
822ccff656 Revert the rest of r192749 to bring back the buildbot. These two
error messages should not be able to occur at the same time.

llvm-svn: 192985
2013-10-18 16:56:48 +00:00
Richard Barton
4f1967c83f Pure refactoring change.
Patch by Artyom Skrobov.

llvm-svn: 192977
2013-10-18 14:41:50 +00:00
Bill Schmidt
d6db838787 [PATCH] Fix PR17168 (DAG scheduler inserts DBG_VALUE before PHI with fast-isel)
PR17168 describes a test case that fails when compiling for debug with
fast-isel.  Investigation showed that the test was failing because a DBG_VALUE
machine instruction was placed prior to a PHI.

For this problem to occur requires the following:
 * Compile for debug
 * Compile with fast-isel
 * In a block B, fast-isel must partially succeed before punting to DAG-isel
 * B must start with a PHI
 * The first unhandled node in the DAG must not generate a machine instruction
 * A debug value with an order less than that of that first node exists

When all of these circumstances apply, the existing test that an instruction
was not inserted won't fire.  Currently it tests whether the block is empty,
or whether the last instruction generated is a phi.  When fast-isel has
partially succeeded, the last instruction generated will not be a phi.
Instead, we need to check whether the current insert position is immediately
following a phi.  This patch adds that check, and adds the test case from the
PR as a regression test.

llvm-svn: 192976
2013-10-18 14:20:11 +00:00
Benjamin Kramer
5a7ac7cb25 R600: Remove \ at EOL from ascii art comments.
Completely harmless, but GCC likes to warn about it even when the next line is
a comment.

llvm-svn: 192974
2013-10-18 14:12:50 +00:00
Richard Barton
cb6c32ac32 Add hint disassembly syntax for 16-bit Thumb hint instructions.
Patch by Artyom Skrobov

llvm-svn: 192972
2013-10-18 14:09:49 +00:00
Chad Rosier
163fdd3e73 [AArch64] Add support for NEON scalar extract narrow instructions.
llvm-svn: 192970
2013-10-18 14:03:24 +00:00
Ed Maste
f3655708c9 Correct log message typo: ended ad -> ended at
(From LLDB r192897)

llvm-svn: 192968
2013-10-18 13:01:33 +00:00
Silviu Baranga
0e6bbf1a98 Add hardware division as a default feature on Cortex-A15. Also add test cases to check this, and change diagnostics for the hwdiv-arm feature to something useful.
llvm-svn: 192963
2013-10-18 10:18:40 +00:00
David Majnemer
417ca129be CodeGen: Emit a libcall if the target doesn't support 16-byte wide atomics
There are targets that support i128 sized scalars but cannot emit
instructions that modify them directly.  The proper thing to do is to
emit a libcall.

This fixes PR17481.

llvm-svn: 192957
2013-10-18 08:03:43 +00:00
Alp Toker
5f858a6e6b Fix a conversion warning in the mingw32 build
gcc diagnoses this:
  warning: converting to non-pointer type 'unsigned int' from NULL

Also remove an empty statement.

No change in functionality.

llvm-svn: 192955
2013-10-18 07:53:25 +00:00
Alexey Samsonov
4e8af73f01 [DebugInfo] Remove unneeded struct member and hide struct definition. No functionality change.
llvm-svn: 192954
2013-10-18 07:13:32 +00:00
Alp Toker
cb8baf0c62 Fix initialization order warning in mingw32 build
No change in functionality.

llvm-svn: 192953
2013-10-18 07:09:58 +00:00
Alexey Samsonov
5ed6e5276b [DebugInfo] Remove dead code.
llvm-svn: 192952
2013-10-18 07:03:16 +00:00
Hans Wennborg
33576424a9 Revert "Re-commit r192758 - MC: quote tricky symbol names in asm output"
This caused the clang-native-mingw32-win7 buildbot to break.

The assembler was complaining about the following lines that were showing up
in the asm for CrashRecoveryContext.cpp:

  movl  $"__ZL16ExceptionHandlerP19_EXCEPTION_POINTERS@4", 4(%eax)
  calll "_AddVectoredExceptionHandler@8"
  .def   "__ZL16ExceptionHandlerP19_EXCEPTION_POINTERS@4";
  "__ZL16ExceptionHandlerP19_EXCEPTION_POINTERS@4":
  calll "_RemoveVectoredExceptionHandler@4"

Reverting for now.

llvm-svn: 192940
2013-10-18 02:14:40 +00:00
Eric Christopher
1dfc9a91b2 Temporarily revert r192749 as it is causing problems for LTO and
requires a more in depth change to the IR structure.

llvm-svn: 192938
2013-10-18 01:57:30 +00:00
David Blaikie
62e2c71670 DIEHash: Add more things (and remove one character) from the COLLECT_ATTR macro
Makes the uses more terse and requires that they use a semicolon at the
end that helps editors indent proceeding lines correctly.

llvm-svn: 192925
2013-10-17 22:14:08 +00:00
David Blaikie
3f9b6f1dec DIEHash: Support for simple (non-recursive, non-reused) type references
llvm-svn: 192924
2013-10-17 22:07:09 +00:00
David Peixotto
839f0f98a5 17309 ARM backend incorrectly lowers COPY_STRUCT_BYVAL_I32 for thumb1 targets
This commit implements the correct lowering of the
COPY_STRUCT_BYVAL_I32 pseudo-instruction for thumb1 targets.
Previously, the lowering of COPY_STRUCT_BYVAL_I32 generated the
post-increment forms of ldr/ldrh/ldrb instructions. Thumb1 does not
have the post-increment form of these instructions so the generated
assembly contained invalid instructions.

Passing the generated assembly to gcc caused it to complain with an
error like this:

  Error: cannot honor width suffix -- `ldrb r3,[r0],#1'

and the integrated assembler would generate an object file with an
invalid instruction encoding.

This commit contains a small test case that demonstrates the problem
with thumb1 targets as well as an expanded test case that more
throughly tests the lowering of byval struct passing for arm,
thumb1, and thumb2 targets.

llvm-svn: 192916
2013-10-17 19:52:05 +00:00
David Peixotto
22f270719b Refactor lowering for COPY_STRUCT_BYVAL_I32
This commit refactors the lowering of the COPY_STRUCT_BYVAL_I32
pseudo-instruction in the ARM backend. We introduce a new helper
class that encapsulates all of the operations needed during the
lowering. The operations are implemented for each subtarget in
different subclasses. Currently only arm and thumb2 subtargets are
supported.

This refactoring was done to easily implement support for thumb1
subtargets. This initial patch does not add support for thumb1, but
is only a refactoring. A follow on patch will implement the support
for thumb1 subtargets.

No intended functionality change.

llvm-svn: 192915
2013-10-17 19:49:22 +00:00
Anders Waldenborg
35a2684cc0 llvm-c: Add LLVMIntPtrType{,ForAS}InContext
All of the Core API functions have versions which accept explicit context, in
addition to ones which work on global context. This commit adds functions
which accept explicit context to the Target API for consistency.

Patch by Peter Zotov

Differential Revision: http://llvm-reviews.chandlerc.com/D1912

llvm-svn: 192913
2013-10-17 18:51:01 +00:00
Rafael Espindola
e040b98ded Rename fields of GlobalStatus to match the coding style.
llvm-svn: 192910
2013-10-17 18:18:52 +00:00
Chad Rosier
9a6d485c7f [AArch64] Add support for NEON scalar three register different instruction
class.  The instruction class includes the signed saturating doubling
multiply-add long, signed saturating doubling multiply-subtract long, and
the signed saturating doubling multiply long instructions.

llvm-svn: 192908
2013-10-17 18:12:29 +00:00
Rafael Espindola
4e9662d96e rename SafeToDestroyConstant to isSafeToDestroyConstant and clang-format.
llvm-svn: 192907
2013-10-17 18:06:32 +00:00
Rafael Espindola
04822e2dd6 Simplify the interface of AnalyzeGlobal a bit and rename to analyzeGlobal.
No functionality change.

llvm-svn: 192906
2013-10-17 18:00:25 +00:00
Daniel Sanders
f588d8546a [mips][msa] Added lsa instruction
llvm-svn: 192895
2013-10-17 13:38:20 +00:00
Alexey Samsonov
9568db6ca5 [DebugInfo] Delete dead code, simplify and fix code style for some existing code. No functionality change.
llvm-svn: 192894
2013-10-17 13:28:16 +00:00