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209425 Commits

Author SHA1 Message Date
Paul Robinson
8d4bf186a4 [FastISel] Flush local value map on every instruction
Local values are constants or addresses that can't be folded into
the instruction that uses them. FastISel materializes these in a
"local value" area that always dominates the current insertion
point, to try to avoid materializing these values more than once
(per block).

https://reviews.llvm.org/D43093 added code to sink these local
value instructions to their first use, which has two beneficial
effects. One, it is likely to avoid some unnecessary spills and
reloads; two, it allows us to attach the debug location of the
user to the local value instruction. The latter effect can
improve the debugging experience for debuggers with a "set next
statement" feature, such as the Visual Studio debugger and PS4
debugger, because instructions to set up constants for a given
statement will be associated with the appropriate source line.

There are also some constants (primarily addresses) that could be
produced by no-op casts or GEP instructions; the main difference
from "local value" instructions is that these are values from
separate IR instructions, and therefore could have multiple users
across multiple basic blocks. D43093 avoided sinking these, even
though they were emitted to the same "local value" area as the
other instructions. The patch comment for D43093 states:

  Local values may also be used by no-op casts, which adds the
  register to the RegFixups table. Without reversing the RegFixups
  map direction, we don't have enough information to sink these
  instructions.

This patch undoes most of D43093, and instead flushes the local
value map after(*) every IR instruction, using that instruction's
debug location. This avoids sometimes incorrect locations used
previously, and emits instructions in a more natural order.

In addition, constants materialized due to PHI instructions are
not assigned a debug location immediately; instead, when the
local value map is flushed, if the first local value instruction
has no debug location, it is given the same location as the
first non-local-value-map instruction.  This prevents PHIs
from introducing unattributed instructions, which would either
be implicitly attributed to the location for the preceding IR
instruction, or given line 0 if they are at the beginning of
a machine basic block.  Neither of those consequences is good
for debugging.

This does mean materialized values are not re-used across IR
instruction boundaries; however, only about 5% of those values
were reused in an experimental self-build of clang.

(*) Actually, just prior to the next instruction. It seems like
it would be cleaner the other way, but I was having trouble
getting that to work.

This reapplies commits cf1c774d and dc35368c, and adds the
modification to PHI handling, which should avoid problems
with debugging under gdb.

Differential Revision: https://reviews.llvm.org/D91734
2021-01-11 08:32:36 -08:00
Paul Robinson
b0a6f599be NFC: Use -LABEL more
There were a number of tests needing updates for D91734, and I added a
bunch of LABEL directives to help track down where those had to go.
These directives are an improvement independent of the functional
patch, so I'm committing them as their own separate patch.
2021-01-11 08:14:58 -08:00
Giorgis Georgakoudis
68536a3264 [OpenMPOpt][WIP] Expand parallel region merging
The existing implementation of parallel region merging applies only to
consecutive parallel regions that have speculatable sequential
instructions in-between. This patch lifts this limitation to expand
merging with any sequential instructions in-between, except calls to
unmergable OpenMP runtime functions. In-between sequential instructions
in the merged region are sequentialized in a "master" region and any
output values are broadcasted to the following parallel regions and the
sequential region continuation of the merged region.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D90909
2021-01-11 08:06:23 -08:00
Ranjeet Singh
cd887f1ace [ARM] Update existing test case with +pauth targets
Differential Revision: https://reviews.llvm.org/D94414
2021-01-11 15:39:13 +00:00
Simon Pilgrim
8f284c76f5 [X86] Extend lzcnt-cmp tests to test on non-lzcnt targets 2021-01-11 15:27:08 +00:00
Simon Pilgrim
c2f2ca3f5b [X86] Add nounwind to lzcnt-cmp tests
Remove unnecessary cfi markup
2021-01-11 15:06:38 +00:00
Florian Hahn
7ccaba4adc [VPlan] Unify value/recipe printing after VPDef transition.
This patch unifies the way recipes and VPValues are printed after the
transition to VPDef.

VPSlotTracker has been updated to iterate over all recipes and all
their defined values to number those. There is no need to number
values in Value2VPValue.

It also updates a few places that only used slot numbers for
VPInstruction. All recipes now can produce numbered VPValues.
2021-01-11 14:42:46 +00:00
Joe Ellis
24cba9188e [DAGCombiner] Use getVectorElementCount inside visitINSERT_SUBVECTOR
This avoids TypeSize-/ElementCount-related warnings.

Differential Revision: https://reviews.llvm.org/D92747
2021-01-11 14:15:11 +00:00
Jay Foad
f0c8f71b45 [AMDGPU] Fix a urem combine test to test what it was supposed to 2021-01-11 13:32:34 +00:00
Stephan Herhut
216b21a8ed [ARM] Add uses for locals introduced for debug messages. NFC.
This adds uses for locals introduced for new debug messages for the load store optimizer. Those locals are only used on debug statements and otherwise create unused variable warnings.

Differential Revision: https://reviews.llvm.org/D94398
2021-01-11 14:27:28 +01:00
Simon Pilgrim
06d3e8dd8f [X86][SSE] Add 'vectorized sum' test patterns
These are often generated when building a vector from the reduction sums of independent vectors.

I've implemented some typical patterns from various v4f32/v4i32 based off current codegen emitted from the vectorizers, although these tests are more about tweaking some hadd style backend folds to handle whatever the vectorizers/vectorcombine throws at us...
2021-01-11 12:51:18 +00:00
Georgii Rymar
e5a2a54c83 [obj2yaml][test] - Improve and fix section-group.yaml test.
It has multiple issues fixed by this patch:
1) It shouldn't test how llvm-readelf/yaml2obj works.
2) It should use "-NEXT" prefix for check lines.
3) It can use YAML macros, that allows to use a single YAML.
4) It should probably test the case when a group member is a null section.

Differential revision: https://reviews.llvm.org/D93753
2021-01-11 15:24:21 +03:00
Florian Hahn
ac116375b4 [VPlan] Move initial quote emission from ::print to ::dumpBasicBlock.
This means there will be no stray " when printing individual recipes
using print()/dump() in a debugger, for example.
2021-01-11 12:22:15 +00:00
Georgii Rymar
03029fc3ec [llvm-readelf/obj] - Index phdrs and relocations from 0 when reporting warnings.
As was mentioned in comments here:
https://reviews.llvm.org/D92636#inline-864967

we are not consistent and sometimes index things from 0, but sometimes
from 1 in warnings.

This patch fixes 2 places: messages reported for
program headers and messages reported for relocations.

Differential revision: https://reviews.llvm.org/D93805
2021-01-11 15:13:54 +03:00
Georgii Rymar
426d4f9e46 [obj2yaml] - Fix the crash in getUniquedSectionName().
`getUniquedSectionName(const Elf_Shdr *Sec)` assumes that
`Sec` is not `nullptr`.

I've found one place in `getUniquedSymbolName` where it is
not true (because of that we crash when trying to dump
unnamed null section symbols).

Patch fixes the crash and changes the signature of the
`getUniquedSectionName` section to accept a reference.

Differential revision: https://reviews.llvm.org/D93754
2021-01-11 15:04:00 +03:00
Kazushi (Jam) Marukawa
fd10657133 [VE] Support additional VMRGW and VMV intrinsic instructions
Support missing VMRGW and VMV intrinsic instructions and add regression
tests.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D94300
2021-01-11 20:50:31 +09:00
Kazushi (Jam) Marukawa
680d78da27 [VE] Support intrinsic to isnert/extract_subreg of v512i1
Support insert/extract_subreg intrinsic instructions for v512i1
registers and add regression tests.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D94298
2021-01-11 20:40:10 +09:00
Simon Pilgrim
da4d1cab18 [X86][SSE] Add missing SSE test coverage for permute(hop,hop) folds
Should help avoid bugs like reported in rG80dee7965dff
2021-01-11 11:29:04 +00:00
Simon Pilgrim
5c3c6532db Revert rGd43a264a5dd3 "Revert "[X86][SSE] Fold unpack(hop(),hop()) -> permute(hop())""
This reapplies commit rG80dee7965dffdfb866afa9d74f3a4a97453708b2.

[X86][SSE] Fold unpack(hop(),hop()) -> permute(hop())

UNPCKL/UNPCKH only uses one op from each hop, so we can merge the hops and then permute the result.

REAPPLIED with a fix for unary unpacks of HOP.
2021-01-11 11:29:04 +00:00
Kerry McLaughlin
cec12b8160 [SVE][CodeGen] Fix legalisation of floating-point masked gathers
Changes in this patch:
- When lowering floating-point masked gathers, cast the result of the
  gather back to the original type with reinterpret_cast before returning.
- Added patterns for reinterpret_casts from integer to floating point, and
  concat_vector patterns for bfloat16.
- Tests for various legalisation scenarios with floating point types.

Reviewed By: sdesmalen, david-arm

Differential Revision: https://reviews.llvm.org/D94171
2021-01-11 10:57:46 +00:00
Bjorn Pettersson
0798093f86 Require chained analyses in BasicAA and AAResults to be transitive
This patch fixes a bug that could result in miscompiles (at least
in an OOT target). The problem could be seen by adding checks that
the DominatorTree used in BasicAliasAnalysis and ValueTracking was
valid (e.g. by adding DT->verify() call before every DT dereference
and then running all tests in test/CodeGen).

Problem was that the LegacyPassManager calculated "last user"
incorrectly for passes such as the DominatorTree when not telling
the pass manager that there was a transitive dependency between
the different analyses. And then it could happen that an incorrect
dominator tree was used when doing alias analysis (which was a pretty
serious bug as the alias analysis result could be invalid).

Fixes: https://bugs.llvm.org/show_bug.cgi?id=48709

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D94138
2021-01-11 11:50:07 +01:00
Luo, Yuanke
8fb012df95 [X86] Fix tile register spill issue.
The tile register spill need 2 instructions.
%46:gr64_nosp = MOV64ri 64
TILESTORED %stack.2, 1, killed %46:gr64_nosp, 0, $noreg, %43:tile
The first instruction load the stride to a GPR, and the second
instruction store tile register to stack slot. The optimization of merge
spill instruction is done after register allocation. And spill tile
register need create a new virtual register to for stride, so we can't
hoist tile spill instruction in postOptimization() of register
allocation. We can't hoist TILESTORED alone and we can't hoist the 2
instuctions together because MOV64ri will clobber some GPR. This patch
is to disble the spill merge for any spill which need 2 instructions.

Differential Revision: https://reviews.llvm.org/D93898
2021-01-11 18:35:09 +08:00
David Green
05abe00fbc [ARM] Add debug messages for the load store optimizer. NFC 2021-01-11 09:24:28 +00:00
David Sherwood
4e77ab4d6d [NFC][InstructionCost] Change LoopVectorizationCostModel::getInstructionCost to return InstructionCost
This patch is part of a series of patches that migrate integer
instruction costs to use InstructionCost. In the function
selectVectorizationFactor I have simply asserted that the cost
is valid and extracted the value as is. In future we expect
to encounter invalid costs, but we should filter out those
vectorization factors that lead to such invalid costs.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Differential Revision: https://reviews.llvm.org/D92178
2021-01-11 09:22:37 +00:00
Jan Svoboda
b8e9c4d005 Reapply "[clang][cli] Port DiagnosticOpts to new option parsing system"
This reverts commit 8e3e148c

This commit fixes two issues with the original patch:
* The sanitizer build bot reported an uninitialized value. This was caused by normalizeStringIntegral not returning None on failure.
* Some build bots complained about inaccessible keypaths. To mitigate that, "this->" was added back to the keypath to restore the previous behavior.
2021-01-11 10:05:53 +01:00
David Sherwood
c826cad841 [NFC] Remove min/max functions from InstructionCost
Removed the InstructionCost::min/max functions because it's
fine to use std::min/max instead.

Differential Revision: https://reviews.llvm.org/D94301
2021-01-11 09:00:12 +00:00
David Green
a521cb4d34 [ARM] Update trunc costs
We did not have specific costs for larger than legal truncates that were
not otherwise cheap (where they were next to stores, for example). As
MVE does not have a dedicated instruction for them (and we do not use
loads/stores yet), they should be expensive as they get expanded to a
series of lane moves.

Differential Revision: https://reviews.llvm.org/D94260
2021-01-11 08:59:28 +00:00
David Green
e7f6381bd5 [ARM] Additional trunc cost tests. NFC 2021-01-11 08:35:16 +00:00
Zi Xuan Wu
f7fff08a61 [CSKY] Add visibility macro to fix link error
Add LLVM_EXTERNAL_VISIBILITY macro to fix link error of
https://reviews.llvm.org/D88466#2476378
2021-01-11 16:18:01 +08:00
Craig Topper
2a8a6b339a [RISCV] Clear isCodeGenOnly flag on VMSGE(U) pseudo instructions. Remove InstAliases that duplicate the asm strings in the pseudos.
The Pseudo class sets isCodeGenOnly=1 which causes the asm strings
in the pseudos to be ignored. I think this is why the aliases are
needed at all.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D94024
2021-01-10 23:39:08 -08:00
Lang Hames
3e6472ebc3 [JITLink] Rename PostAllocationPasses to PreFixupPasses.
PreFixupPasses better reflects when these passes will run.

A future patch will (re)introduce a PostAllocationPasses list that will run
after allocation, but before JITLinkContext::notifyResolved is called to notify
the rest of the JIT about the resolved symbol addresses.
2021-01-11 18:33:50 +11:00
Hsiangkai Wang
42f384eac3 [NFC][AsmPrinter] Make comments for spill/reload more precise.
The size of spill/reload may be unknown for scalable vector types.
When the size is unknown, print it as "Unknown-size" instead of a very
large number.

Differential Revision: https://reviews.llvm.org/D94299
2021-01-11 15:00:27 +08:00
Serguei Katkov
d6cc630830 [LoopUnroll] Fix a crash
Loop peeling as a last step triggers loop simplification and this
can change the loop structure. As a result all cashed values like
latch branch becomes invalid.

Patch re-structure the code to take into account the possible
changes caused by peeling.

Reviewers: dmgreen, Meinersbur, etiotto, fhahn, efriedma, bmahjour
Reviewed By: Meinersbur, fhahn
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D93686
2021-01-11 10:19:26 +07:00
Craig Topper
c1a38e0929 [RISCV] Convert most of the information about RVV Pseudos into bits in TSFlags.
This patch moves all but the BaseInstr to bits in TSFlags.

For the index fields, we can just use a bit to indicate their presence.
The locations of the operands are well defined.

This reduces the llc binary by about 32K on my build. It also
removes the binary search of the table from the custom inserter.
Instead we just check that the SEW op is present.

Reviewed By: rogfer01

Differential Revision: https://reviews.llvm.org/D94375
2021-01-10 19:15:45 -08:00
QingShan Zhang
1f3b903c4c [DAGCombine] Remove the check for unsafe-fp-math when we are checking the AFN
We are checking the unsafe-fp-math for sqrt but not for fpow, which behaves inconsistent.
As the direction is to remove this global option, we need to remove the unsafe-fp-math
check for sqrt and update the test with afn fast-math flags.

Reviewed By: Spatel

Differential Revision: https://reviews.llvm.org/D93891
2021-01-11 02:25:53 +00:00
Nico Weber
f8baf9e974 Revert "[X86][SSE] Fold unpack(hop(),hop()) -> permute(hop())"
This reverts commit 80dee7965dffdfb866afa9d74f3a4a97453708b2.
Makes clang sometimes hang forever. See
https://bugs.chromium.org/p/chromium/issues/detail?id=1164786#c6 for a
stand-alone repro.
2021-01-10 20:22:53 -05:00
Philip Reames
b5eb31e440 [LoopDeletion] Break backedge of outermost loops when known not taken
This is a resubmit of dd6bb367 (which was reverted due to stage2 build failures in 7c63aac), with the additional restriction added to the transform to only consider outer most loops.

As shown in the added test case, ensuring LCSSA is up to date when deleting an inner loop is tricky as we may actually need to remove blocks from any outer loops, thus changing the exit block set.   For the moment, just avoid transforming this case.  I plan to return to this case in a follow up patch and see if we can do better.

Original commit message follows...

The basic idea is that if SCEV can prove the backedge isn't taken, we can go ahead and get rid of the backedge (and thus the loop) while leaving the rest of the control in place. This nicely handles cases with dispatch between multiple exits and internal side effects.

Differential Revision: https://reviews.llvm.org/D93906
2021-01-10 16:02:33 -08:00
Kazu Hirata
6a844d8634 [StringExtras] Add a helper class for comma-separated lists
This patch introduces a helper class SubsequentDelim to simplify loops
that generate a comma-separated lists.

For example, consider the following loop, taken from
llvm/lib/CodeGen/MachineBasicBlock.cpp:

    for (auto I = pred_begin(), E = pred_end(); I != E; ++I) {
      if (I != pred_begin())
        OS << ", ";
      OS << printMBBReference(**I);
    }

The new class allows us to rewrite the loop as:

    SubsequentDelim SD;
    for (auto I = pred_begin(), E = pred_end(); I != E; ++I)
      OS << SD << printMBBReference(**I);

where SD evaluates to the empty string for the first time and ", " for
subsequent iterations.

Unlike interleaveComma, defined in llvm/include/llvm/ADT/STLExtras.h,
SubsequentDelim can accommodate a wider variety of loops, including:

- those that conditionally skip certain items,
- those that need iterators to call getSuccProbability(I), and
- those that iterate over integer ranges.

As an example, this patch cleans up MachineBasicBlock::print.

Differential Revision: https://reviews.llvm.org/D94377
2021-01-10 14:32:02 -08:00
Shilei Tian
5080e488ba [OpenMP] Not set OPENMP_STANDALONE_BUILD=ON when building OpenMP along with LLVM
For now, `*_STANDALONE_BUILD` is set to ON even if they're built along
with LLVM because of issues mentioned in the comments. This can cause some issues.
For example, if we build OpenMP along with LLVM, we'd like to copy those OpenMP
headers to `<prefix>/lib/clang/<version>/include` such that `clang` can find
those headers without using `-I <prefix>/include` because those headers will be
copied to `<prefix>/include` if it is built standalone.

In this patch, we fixed the dependence issue in OpenMP such that it can be built
correctly even with `OPENMP_STANDALONE_BUILD=OFF`. The issue is in the call to
`add_lit_testsuite`, where `clang` and `clang-resource-headers` are passed as
`DEPENDS`. Since we're building OpenMP along with LLVM, `clang` is set by CMake
to be the C/C++ compiler, therefore these two dependences are no longer needed,
where caused the dependence issue.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D93738
2021-01-10 16:46:19 -05:00
Shilei Tian
37fb949856 [LLVM] Added OpenMP to LLVM_ALL_RUNTIMES
This patch added `openmp` to `LLVM_ALL_RUNTIMES` so that when the CMake argument `LLVM_ENABLE_RUNTIMES=all`, OpenMP can also be built.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D94369
2021-01-10 16:45:51 -05:00
Roman Lebedev
3730886cb5 [NFCI][SimplifyCFG] Prefer to add Insert edges before Delete edges into DomTreeUpdater, if reasonable
This has a measurable impact on the number of DomTree recalculations.
While this doesn't handle all the cases,
it deals with the most obvious ones.
2021-01-11 00:30:44 +03:00
Philip Reames
61c35a98db [Tests] Precommit tests from to simplify rebase 2021-01-10 12:42:08 -08:00
Philip Reames
fa3d45d4a6 Precommit tests requested for D93725 2021-01-10 12:29:34 -08:00
Philip Reames
88b9711598 [Tests] Auto update a vectorizer test to simplify future diff 2021-01-10 12:23:22 -08:00
Sanjay Patel
3e75d0db00 [SLP] fix typo in assert
This snuck into 0aa75fb12faa , but I didn't catch it locally.
2021-01-10 13:15:04 -05:00
Sanjay Patel
e563a6172d [SLP] put verifyFunction call behind EXPENSIVE_CHECKS
A severe compile-time slowdown from this call is noted in:
https://llvm.org/PR48689
My naive fix was to put it under LLVM_DEBUG ( 267ff79 ),
but that's not limiting in the way we want.
This is a quick fix (or we could just remove the call completely
and rely on some later pass to discover potentially wrong IR?).
A bigger/better fix would be to improve/limit verifyFunction()
as noted in:
https://llvm.org/PR47712

Differential Revision: https://reviews.llvm.org/D94328
2021-01-10 12:32:21 -05:00
Kazu Hirata
13eee3533c [llvm] Ensure newlines at the end of files (NFC)
This patch eliminates pesky "No newline at end of file" messages from
git diff.
2021-01-10 09:24:57 -08:00
Kazu Hirata
6264d23300 [MemorySSA] Remove unused dominatesUse (NFC)
The function was introduced without a use on Feb 2, 2016 in commit
e1100f533f0a48f55e80e1152b06f5deab5f9b30.
2021-01-10 09:24:55 -08:00
Kazu Hirata
a6e95fbf6b [CodeGen, DebugInfo] Use llvm::find_if (NFC) 2021-01-10 09:24:53 -08:00
Nikita Popov
f97e87b3dc [ConstantFold] Fold fptoi.sat intrinsics
The APFloat::convertToInteger() API already implements the desired
saturation semantics.
2021-01-10 17:37:27 +01:00