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70 Commits

Author SHA1 Message Date
Evan Cheng
77885c204d Subtarget feature can now set any variable to any value 
llvm-svn: 25678
 2006-01-27 08:09:42 +00:00
Chris Lattner
20d4194a0d PHI and INLINEASM are now built-in instructions provided by Target.td 
llvm-svn: 25674
 2006-01-27 01:46:15 +00:00
Evan Cheng
e720cfd690 New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace 
hasInFlag, hasOutFlag.

llvm-svn: 25155
 2006-01-09 18:28:21 +00:00
Evan Cheng
231b11ba87 Added field noResults to Instruction. 
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.

llvm-svn: 25017
 2005-12-26 09:11:45 +00:00
Evan Cheng
d87688fe72 * Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead. 
* Added a pseudo instruction (for each target) that represent "return void".
  This is a workaround for lack of optional flag operand (return void is not
  lowered so it does not have a flag operand.)

llvm-svn: 24997
 2005-12-23 22:14:32 +00:00
Evan Cheng
297c23d2e7 Added support to specify predicates. 
llvm-svn: 24715
 2005-12-14 22:02:59 +00:00
Evan Cheng
7580d9229f * Added instruction property hasCtrlDep for those which r/w control-flow 
chains.
* Added DAG node property SDNPHasChain for nodes which r/w control-flow
  chains.
* Renamed SDTVT to SDTOther.
* Added several new SDTypeProfiles for BR, BRCOND, RET, and WRITEPORT.
* Added SDNode definitions for BR, BRCOND, RET, and WRITEPORT.

llvm-svn: 24586
 2005-12-04 08:13:17 +00:00
Nate Begeman
811a41a87c Support multiple ValueTypes per RegisterClass, needed for upcoming vector 
work.  This change has no effect on generated code.

llvm-svn: 24563
 2005-12-01 04:51:06 +00:00
Nate Begeman
a1c2df2471 Add the majority of the vector machien value types we expect to support, 
and make a few changes to the legalization machinery to support more than
16 types.

llvm-svn: 24511
 2005-11-29 05:45:29 +00:00
Chris Lattner
c90cd9e5e8 refix typo 
llvm-svn: 24505
 2005-11-29 00:42:30 +00:00
Chris Lattner
7bc9c0d389 revert my change for the time being, which broke the build 
llvm-svn: 24503
 2005-11-29 00:24:08 +00:00
Chris Lattner
9e47c9a37a fix a typo :) 
llvm-svn: 24501
 2005-11-28 22:42:15 +00:00
Chris Lattner
bec2158e66 Capture more operand info, patch by Evan Cheng 
llvm-svn: 24422
 2005-11-19 07:00:10 +00:00
Nate Begeman
4567e9baf6 Also add the new vector value type here, for completeness. 
llvm-svn: 24405
 2005-11-18 00:53:32 +00:00
Jim Laskey
22e578cd95 Add attribute name and type to SubtargetFeatures. 
llvm-svn: 24012
 2005-10-26 17:28:23 +00:00
Jim Laskey
1fbdee408d Plugin new subtarget backend into the build. 
llvm-svn: 23870
 2005-10-21 19:05:19 +00:00
Jim Laskey
514a74d946 Added InstrSchedClass to each of the PowerPC Instructions. 
Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.

llvm-svn: 23830
 2005-10-19 19:51:16 +00:00
Jim Laskey
0918760dec Push processor descriptions to the top of target and add command line info. 
llvm-svn: 23820
 2005-10-19 13:34:52 +00:00
Chris Lattner
2b9c260832 Pull DAG ISel generation nodes out of the PowerPC backend to where they 
can be used by other targets.  For those targets that want to use it,
have at.  :)

llvm-svn: 23680
 2005-10-10 06:00:30 +00:00
Chris Lattner
70ebb767b4 Add a forward def 
llvm-svn: 23621
 2005-10-04 05:09:20 +00:00
Chris Lattner
60e0bcc04a Now that self referential classes are supported, get rid of a work-around. 
llvm-svn: 23544
 2005-09-30 04:13:23 +00:00
Chris Lattner
497c012e54 spell this right 
llvm-svn: 23099
 2005-08-26 20:55:40 +00:00
Chris Lattner
405266a17c Add a flag 
llvm-svn: 23092
 2005-08-26 20:29:01 +00:00
Chris Lattner
713643bc71 add an enum value 
llvm-svn: 23048
 2005-08-25 17:07:09 +00:00
Chris Lattner
2ac3fd08d2 Split RegisterClass 'Methods' into MethodProtos and MethodBodies 
llvm-svn: 22929
 2005-08-19 19:13:20 +00:00
Chris Lattner
9a9fe27bd2 Require that targets specify a namespace for their register classes. 
llvm-svn: 22921
 2005-08-19 18:48:48 +00:00
Chris Lattner
32120e461e Add a new flag 
llvm-svn: 22881
 2005-08-18 23:17:07 +00:00
Chris Lattner
cc26e332b3 Add some bits that can be set for instructions. 
llvm-svn: 19241
 2005-01-02 02:27:48 +00:00
Misha Brukman
628b2ba095 Add isLittleEndianEncoding to InstrInfo class, defaults to `off' 
llvm-svn: 16976
 2004-10-14 05:53:40 +00:00
Chris Lattner
30b5b79aa0 Add initial support for variants 
llvm-svn: 16635
 2004-10-03 19:34:18 +00:00
Nate Begeman
18d4f04e0a Add support for the isLoad and isStore flags, needed by the instruction scheduler 
llvm-svn: 16555
 2004-09-28 21:29:00 +00:00
Chris Lattner
bd2d966db6 Capture delay slot info 
llvm-svn: 16551
 2004-09-28 18:34:14 +00:00
Chris Lattner
aee36bb527 Revamp the Register class, and allow the use of the RegisterGroup class to 
specify aliases directly in register definitions.

Patch contributed by Jason Eckhardt!

llvm-svn: 16330
 2004-09-14 04:17:02 +00:00
Chris Lattner
b85cd02a4e Add two values 
llvm-svn: 15959
 2004-08-21 02:17:39 +00:00
Chris Lattner
f4448de9e1 isdummyclass goes away 
llvm-svn: 15790
 2004-08-15 23:04:35 +00:00
Chris Lattner
60dc932fe9 disable all of the pattern isel stuff 
llvm-svn: 15788
 2004-08-15 23:02:34 +00:00
Chris Lattner
744cbfc089 Add i1imm 
llvm-svn: 15753
 2004-08-15 05:37:00 +00:00
Chris Lattner
d7240cdb18 Make the AsmWriter a first-class tblgen object. Allow targets to specify 
name of the generated asmwriter class, and the name of the format string.

llvm-svn: 15747
 2004-08-14 22:50:53 +00:00
Chris Lattner
27e1f4f412 Fill out immediate operand classes, add a new Operand class 
llvm-svn: 15642
 2004-08-11 01:53:34 +00:00
Misha Brukman
65afbbca70 Remove ClassPrefix variable as it's no longer used. 
llvm-svn: 15586
 2004-08-09 19:13:29 +00:00
Misha Brukman
5f8e406838 Classes need to have a prefix name, so that they can be tacked on to the pieces 
that TableGen creates for them, e.g. CodeEmitter, AsmPrinter, etc.

llvm-svn: 15579
 2004-08-09 17:46:06 +00:00
Chris Lattner
1ca0362e24 Add some immediate forms, make name optional 
llvm-svn: 15401
 2004-08-01 09:36:44 +00:00
Chris Lattner
91a07c84b1 Add the 'ops' marker, add an AsmString initializer 
llvm-svn: 15383
 2004-08-01 04:40:43 +00:00
Chris Lattner
d20c857ba0 Move the 'Expander' node to later in the file, with the other experimental 
stuff.  The pattern becomes a list, add some stuff, add some comments.

llvm-svn: 15378
 2004-08-01 03:23:34 +00:00
Chris Lattner
6ff86f8af6 New flag 
llvm-svn: 15354
 2004-07-31 02:07:07 +00:00
Chris Lattner
ea85b486f1 Expose the "Other" value type to tablegen targets 
llvm-svn: 11304
 2004-02-11 03:08:45 +00:00
John Criswell
de34542f41 Added LLVM copyright header. 
llvm-svn: 9321
 2003-10-21 15:17:13 +00:00
Chris Lattner
250f26f066 Add a bunch of new node types, including a new Void dummy register class 
llvm-svn: 7870
 2003-08-15 04:35:14 +00:00
Chris Lattner
863477568d Rename DNVT_bool to DNVT_i1 to be consistent with type system 
llvm-svn: 7768
 2003-08-12 04:28:21 +00:00
Chris Lattner
2d72c035f0 Add support for basicblocks, setCC instructions, and branches 
llvm-svn: 7767
 2003-08-12 04:17:29 +00:00