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Commit Graph

146437 Commits

Author SHA1 Message Date
Dmitry Preobrazhensky
8fd7a07447 [AMDGPU][MC] Fix for Bugs 28200, 28202 + LIT tests
Fixed several related issues with VOP3 fp modifiers.

Reviewers: artem.tamazov

Differential Revision: https://reviews.llvm.org/D30821

llvm-svn: 298255
2017-03-20 14:50:35 +00:00
Diana Picus
bb031998bf [GlobalISel] Use the correct calling conv for calls
This commit adds a parameter that lets us pass in the calling convention
of the call to CallLowering::lowerCall. This allows us to handle
situations where the calling convetion of the callee is different from
that of the caller.

Differential Revision: https://reviews.llvm.org/D31039

llvm-svn: 298254
2017-03-20 14:40:18 +00:00
Simon Pilgrim
1d42891fcb Use MutableArrayRef for APFloat::convertToInteger
As discussed on D31074, use MutableArrayRef for destination integer buffers to help assert before stack overflows happen.

llvm-svn: 298253
2017-03-20 14:40:12 +00:00
Maxim Ostapenko
3460d90331 [sancov] Fix broken links and displaced coloring in coverage-report-server.py
This patch fixes two issues:

* Fixed relative links to source files
* Enumeration of lines in source files starts from 1 instead of 0 to
  align with .symcov files generated by sancov -symbolize

Patch by Dmitiriy Nikiforov.

Differential Revision: https://reviews.llvm.org/D31038

llvm-svn: 298250
2017-03-20 14:06:04 +00:00
Simon Pilgrim
e2a69f0bd9 Strip trailing whitespace
llvm-svn: 298249
2017-03-20 13:55:35 +00:00
Simon Pilgrim
7e520e52d5 Strip trailing whitespace
llvm-svn: 298248
2017-03-20 13:54:44 +00:00
Simon Pilgrim
cd77b1a217 Strip trailing whitespace
llvm-svn: 298247
2017-03-20 13:53:59 +00:00
Konstantin Zhuravlyov
6fe40181b8 Revert "[AMDGPU] Run always inliner early in opt"
This reverts commit r297958, it breaks device-libs build.

llvm-svn: 298239
2017-03-20 09:26:08 +00:00
Craig Topper
336d3faa34 [IR] Move a few static functions in Instruction class inline.
They just check for certain opcodes and opcode enums are available in Instruction.h.

llvm-svn: 298237
2017-03-20 06:40:39 +00:00
Michael Zolotukhin
978da1ce40 [ConstantRange] Add setSizeSmallerThanOf method.
Summary:
ConstantRange class currently has a method getSetSize, which is mostly used to
compare set sizes of two constant ranges (there is only one spot where it's used
in a slightly different scenario). This patch introduces setSizeSmallerThanOf
method, which does such comparison in a more efficient way. In the original
method we have to extend our types to (BitWidth+1), which can result it using
slow case of APInt, extra memory allocations, etc.

The change is supposed to not change any functionality, but it slightly improves
compile time. Here is compile time improvements that I observed on CTMark:
* tramp3d-v4	-2.02%
* pairlocalalign	-1.82%
* lencod	-1.67%

Reviewers: sanjoy, atrick, pete

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31104

llvm-svn: 298236
2017-03-20 06:33:07 +00:00
Craig Topper
1f9677a77f [IR] Remove some unneeded includes from Operator.h and fix cpp files that were transitively depending on it. NFC
llvm-svn: 298235
2017-03-20 05:08:41 +00:00
Craig Topper
f8885dfc95 [IR] Add missing copyright header.
llvm-svn: 298234
2017-03-20 05:08:38 +00:00
Craig Topper
42c5924a25 [APInt] Don't initialize VAL to 0 in APInt constructors. Push it down to the initSlowCase and other init methods.
I'm not sure if zeroing VAL before writing pVal is really necessary, but at least one other place did it in code.

But by taking the store out of line, this reduces the opt binary by about 20k on my local x86-64 build.

llvm-svn: 298233
2017-03-20 01:29:52 +00:00
Xin Tong
0e18f0b49e Remove unnecessary IDom check
Summary: This Idom check seems unnecessary. The immediate children of a node on the Dominator Tree should always be the IDom of its immediate children in this case.

Reviewers: hfinkel, majnemer, dberlin

Reviewed By: dberlin

Subscribers: dberlin, davide, llvm-commits

Differential Revision: https://reviews.llvm.org/D26954

llvm-svn: 298232
2017-03-20 00:30:19 +00:00
Craig Topper
6be007af4f [InstCombine] Remove duplicate code in SimplifyDemandedUseBits for URem. NFC
llvm-svn: 298231
2017-03-19 21:45:57 +00:00
Craig Topper
c7a2af7fa6 [AVX-512] Handle kor/kand/kandn/kxor/kxnor/knot intrinsics at lowering time instead of isel
Summary:
Currently we handle these intrinsics at isel with special patterns. But as they just map to normal logic operations, we should just handle them at lowering. This will expose them to DAG combine optimizations. Right now the kor-sequence test generates a bunch of regclass copies between GR16 and VK16 that the peephole optimizer and/or register coallescing are removing to keep everything in the mask domain. By handling the logic op intrinsics earlier, these copies become bitcasts in the DAG and get removed by DAG combine which seems more robust.

This should help enable my plan to stop copying between K registers and GR8/GR16. The peephole optimizer can't remove a chain of copies between K and GR32 with insert_subreg/extract_subreg present in the chain so the kor-sequence test break. But this patch should dodge the problem entirely.

Reviewers: zvi, delena, RKSimon, igorb

Reviewed By: igorb

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31056

llvm-svn: 298228
2017-03-19 17:11:09 +00:00
Craig Topper
128018c801 [InstCombine] Use update_test_checks.py to regenerate a test. NFC
llvm-svn: 298227
2017-03-19 17:04:52 +00:00
Simon Pilgrim
8e3c60968e Fix constant folding of fp2int to large integers
We make the assumption in most of our constant folding code that a fp2int will target an integer of 128-bits or less, calling the APFloat::convertToInteger with only uint64_t[2] of raw bits for the result.

Fuzz testing (PR24662) showed that we don't handle other cases at all, resulting in stack overflows and all sorts of crashes.

This patch uses the APSInt version of APFloat::convertToInteger instead to better handle such cases.

Differential Revision: https://reviews.llvm.org/D31074

llvm-svn: 298226
2017-03-19 16:50:25 +00:00
Simon Pilgrim
fd15ce160a Fix MSVC warning: "switch statement contains 'default' but no 'case' labels". NFCI.
llvm-svn: 298225
2017-03-19 16:39:04 +00:00
Ahmed Bougacha
0d77054e90 [GlobalISel] Don't select trivially dead instructions.
Folding instructions when selecting can cause them to become dead.
Don't select these dead instructions (if they don't have other side
effects, and don't define physical registers).

Preserve existing tests by adding COPYs.

In some tests, the G_CONSTANT vregs never get constrained to a class:
the only use of the vreg was folded into another instruction, so the
G_CONSTANT, now dead, never gets selected.

llvm-svn: 298224
2017-03-19 16:13:00 +00:00
Ahmed Bougacha
e5469c1061 [GlobalISel][AArch64] Add DBG_VALUE select test. NFC.
llvm-svn: 298223
2017-03-19 16:12:53 +00:00
Ahmed Bougacha
8d29928f08 [GlobalISel][AArch64] Split out cast select tests. NFC.
And remove some redundant bitcast tests.

Also split the test functions themselves: it makes it obvious to see
what's tested where and what isn't, it makes the tests much easier to
read and manually update, and, most importantly, it makes them almost
trivial to update using tooling.  Yes, it's obnoxiously verbose, but
said tooling helps upgrade to better MIR syntax whenever available.

llvm-svn: 298222
2017-03-19 16:12:51 +00:00
Ahmed Bougacha
faa968ec35 [GlobalISel] Move method definition to the proper file. NFC.
llvm-svn: 298221
2017-03-19 16:12:48 +00:00
Ahmed Bougacha
6280066b11 [CodeGen] Update hasSideEffects comment. NFC.
We used to have 3 side effect flags, but as of r222809, we only have
hasSideEffects.  Change the comment to reflect that.

llvm-svn: 298220
2017-03-19 16:12:45 +00:00
Xin Tong
260ba6468c Correct a rebase mistake.
Left out AA in jumpthreading SimplifyPartiallyRedundantLoad

llvm-svn: 298219
2017-03-19 15:41:46 +00:00
Xin Tong
b88e8777b2 Remove unused arguments. NFCI
llvm-svn: 298218
2017-03-19 15:31:16 +00:00
Xin Tong
92773d49ef [JumpThreading] Perform phi-translation in SimplifyPartiallyRedundantLoad.
Summary:
In case we are loading on a phi-load in SimplifyPartiallyRedundantLoad.
Try to phi translate it into incoming values in the predecessors before
we search for available loads.

This needs https://reviews.llvm.org/D30524

Reviewers: davide, sanjoy, efriedma, dberlin, rengolin

Reviewed By: dberlin

Subscribers: junbuml, llvm-commits

Differential Revision: https://reviews.llvm.org/D30543

llvm-svn: 298217
2017-03-19 15:30:53 +00:00
Xin Tong
7ed0553795 Extract FindAvailablePtrLoadStore out of FindAvailableLoadedValue. NFCI
Summary:
Extract FindAvailablePtrLoadStore out of FindAvailableLoadedValue.
Prepare for upcoming change which will do phi-translation for load on
phi pointer in jump threading SimplifyPartiallyRedundantLoad.

This is in preparation for https://reviews.llvm.org/D30543

Reviewers: efriedma, sanjoy, davide, dberlin

Reviewed By: davide

Subscribers: junbuml, davide, llvm-commits

Differential Revision: https://reviews.llvm.org/D30524

llvm-svn: 298216
2017-03-19 15:27:52 +00:00
Teresa Johnson
164ab9b4a4 Enable stripping of multiple DILocation on !llvm.loop metadata
Summary:
I found that stripDebugInfo was still leaving significant amounts of
debug info due to !llvm.loop that contained DILocation after stripping.
The support for stripping debug info on !llvm.loop added in r293377 only
removes a single DILocation. Enhance that to remove all DILocation from
!llvm.loop.

Reviewers: hfinkel, aprantl, dsanders

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31117

llvm-svn: 298213
2017-03-19 13:54:57 +00:00
Oren Ben Simhon
989d98a4ce [MIR] Test assumes x64 windows calling convention upon printing/parsing MIR output/input.
llvm-svn: 298212
2017-03-19 13:23:20 +00:00
Benjamin Kramer
b746d1c363 [MIR] Add triple to test that assumes it runs on windows.
llvm-svn: 298211
2017-03-19 13:04:35 +00:00
Oren Ben Simhon
c948cb6123 CalleeSavedRegister was removed from MIR and is recalculated upon MIR parsing.
llvm-svn: 298210
2017-03-19 11:18:09 +00:00
Oren Ben Simhon
f9c240ea8b Moving the test to x86 because other architectures do not suport regcall calling convention.
llvm-svn: 298209
2017-03-19 08:53:42 +00:00
Oren Ben Simhon
cfab6a83e8 [MIR] Support Customed Register Mask and CSRs
The MIR printer dumps a string that describe the register mask of a function.
A static predefined list of register masks matches a static list of strings.
However when the register mask is not from the static predefined list, there is no descriptor string and the printer fails.
This patch adds support to custom register mask printing and dumping.
Also the list of callee saved registers (describing the registers that must be preserved for the caller) might be dynamic.
As such this data needs to be dumped and parsed back to the Machine Register Info.

Differential Revision: https://reviews.llvm.org/D30971

llvm-svn: 298207
2017-03-19 08:14:18 +00:00
Craig Topper
3688f17b57 [InstCombine] Use setHighBits/setLowBits/setBitsFrom in place of getLowBitsSet/getHighBitsSet.
llvm-svn: 298204
2017-03-19 05:49:16 +00:00
Brian Gesiak
61982c1630 [Analysis] bitreverse(undef) returns undef
Summary:
The reverse of an artbitrary bitpattern is also an arbitrary
bitpattern.

Reviewers: trentxintong, arsenm, majnemer

Reviewed By: majnemer

Subscribers: majnemer, wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D31118

llvm-svn: 298201
2017-03-19 04:40:42 +00:00
Daniel Berlin
8084288961 NewGVN: Now that we have a better verifier, we can prove that we can erase the predicateuser set each time we mark it touched
llvm-svn: 298199
2017-03-19 00:07:32 +00:00
Daniel Berlin
b1b7419df3 NewGVN: Remove dead code (for now)
llvm-svn: 298198
2017-03-19 00:07:27 +00:00
Craig Topper
f85e0d3530 [GVN] Fix accidental double storage of the function BasicBlock list in iterateOnFunction
Summary:
iterateOnFunction creates a ReversePostOrderTraversal object which does a post order traversal in its constructor and stores the results in an internal vector. Iteration over it just reads from the internal vector in reverse order.

The GVN code seems to be unaware of this and iterates over ReversePostOrderTraversal object and makes a copy of the vector into a local vector. (I think at one point in time we used a DFS here instead which would have required the local vector).

The net affect of this is that we have two vectors containing the basic block list. As I didn't want to expose the implementation detail of ReversePostOrderTraversal's constructor to GVN, I've changed the code to do an explicit post order traversal storing into the local vector and then reverse iterate over that.

I've also removed the reserve(256) since the ReversePostOrderTraversal wasn't doing that. I can add it back if we thinks it important. Though it seemed weird that it wasn't based on the size of the function.

Reviewers: davide, anemet, dberlin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31084

llvm-svn: 298191
2017-03-18 18:24:41 +00:00
Craig Topper
0a85a90476 [ValueTracking] Remove deadish code from computeKnownBitsAddSub.
The code assigned to KnownZero, but later code unconditionally assigned over it. I'm pretty sure the later code can handle the same cases and more equally well.

llvm-svn: 298190
2017-03-18 18:21:46 +00:00
Daniel Berlin
1230ec8164 NewGVN: Greatly enhance the ability of the NewGVN verifier to detect
issues, subsuming previous verifier.

llvm-svn: 298188
2017-03-18 15:41:40 +00:00
Daniel Berlin
54d98b54f5 NewGVN: Fix PHI evaluation bug exposed by new verifier. We were checking whether the incoming block was reachable instead of whether the specific edge was reachable
llvm-svn: 298187
2017-03-18 15:41:36 +00:00
Daniel Berlin
a267a93237 DebugCounters: Add API for setting/unsetting programatically.
This is required so we can re-set the counter state for verifiers,
etc.

llvm-svn: 298186
2017-03-18 15:41:13 +00:00
Matthias Braun
ea69eb48b2 ExecutionDepsFix: Let targets specialize the pass; NFC
Let targets specialize the pass with the register class so we can get a
parameterless default constructor and can put the pass into the pass
registry to enable testing with -run-pass=.

llvm-svn: 298184
2017-03-18 05:08:58 +00:00
Matthias Braun
ea385b5555 ExecutionDepsFix: Normalize names; NFC
Normalize ExeDepsFix, execution-fix, ExecutionDependencyFix and
ExecutionDepsFix to the last one.

llvm-svn: 298183
2017-03-18 05:05:40 +00:00
Matthias Braun
39f221aa28 CodeGen.cpp: Sort alphabetically; NFC
llvm-svn: 298182
2017-03-18 05:05:32 +00:00
Matthias Braun
d6b0e4a6a4 InitializePasses.h: Cleanup; NFC
- Sort alphabetically
- Normalize spaces

llvm-svn: 298181
2017-03-18 05:05:29 +00:00
Craig Topper
41e75a32fb [ValueTracking] Add APInt::setSignBit and use it to replace ORing with getSignBit which will malloc if the bit width is larger than 64.
llvm-svn: 298180
2017-03-18 04:01:29 +00:00
Nirav Dave
88936693e4 Make library calls sensitive to regparm module flag (Fixes PR3997).
Reviewers: mkuper, rnk

Subscribers: mehdi_amini, jyknight, aemerson, llvm-commits, rengolin

Differential Revision: https://reviews.llvm.org/D27050

llvm-svn: 298179
2017-03-18 00:44:07 +00:00
Nirav Dave
c91fe2d028 Capitalize ArgListEntry fields. NFC.
llvm-svn: 298178
2017-03-18 00:43:57 +00:00