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Commit Graph

105151 Commits

Author SHA1 Message Date
Rafael Espindola
90be969cdb Invert the MC -> Object dependency.
Now that we have a lib/MC/MCAnalysis, the dependency was there just because
of two helper classes. Move the two over to MC.

This will allow IRObjectFile to parse inline assembly.

llvm-svn: 212248
2014-07-03 02:01:39 +00:00
Eric Christopher
f23b8b3bbe Make these preprocessor directives match all of the others in the port.
llvm-svn: 212245
2014-07-03 00:44:31 +00:00
Eric Christopher
be5a55af78 Remove dead code.
llvm-svn: 212244
2014-07-03 00:44:28 +00:00
Chandler Carruth
fc0fe5064b [codegen,aarch64] Add a target hook to the code generator to control
vector type legalization strategies in a more fine grained manner, and
change the legalization of several v1iN types and v1f32 to be widening
rather than scalarization on AArch64.

This fixes an assertion failure caused by scalarizing nodes like "v1i32
trunc v1i64". As v1i64 is legal it will fail to scalarize v1i32.

This also provides a foundation for other targets to have more granular
control over how vector types are legalized.

Patch by Hao Liu, reviewed by Tim Northover. I'm committing it to allow
some work to start taking place on top of this patch as it adds some
really important hooks to the backend that I'd like to immediately start
using. =]

http://reviews.llvm.org/D4322

llvm-svn: 212242
2014-07-03 00:23:43 +00:00
Eric Christopher
f60da84887 Move subtarget dependent features into the subtarget from the target
machine. Includes a fix for a subtarget initialization for
hard floating point on mips16.

llvm-svn: 212240
2014-07-03 00:10:24 +00:00
Eric Christopher
3a910292e0 So that we can include frame lowering in the subtarget, remove include
circular dependency with the subtarget by inlining accessor methods and
outlining a routine.

llvm-svn: 212236
2014-07-02 23:29:55 +00:00
Kevin Enderby
6e20245be0 Add the -reverse-sort flag (aka -r) to llvm-nm
which exists in other Unix nm(1)’s.

llvm-svn: 212235
2014-07-02 23:23:58 +00:00
Eric Christopher
d616eca2ec So that we can include target lowering in the subtarget, remove include
circular dependency with the subtarget by inlining accessor methods and
outlining a routine.

llvm-svn: 212234
2014-07-02 23:18:40 +00:00
Rafael Espindola
d72954b9fc Update comment and include guard.
I missed these when moving the files.

llvm-svn: 212231
2014-07-02 22:31:51 +00:00
Peter Zotov
171cddf9b3 [OCaml] Documentation improvements.
Patch by Julien Sagot

llvm-svn: 212230
2014-07-02 22:17:20 +00:00
Eric Christopher
02e3de51ef Fix typos.
llvm-svn: 212228
2014-07-02 22:05:40 +00:00
David Blaikie
a46a55b3e8 Revert "DebugInfo: Ensure that all debug location scope chains from instructions within a function, lead to the function itself."
This reverts commit r212205.

Reverting this again, still seeing crashes when building compiler-rt...
Sorry for the continued noise, not sure why I'm failing to reproduce
this locally.

llvm-svn: 212226
2014-07-02 21:42:28 +00:00
Eric Christopher
d83d891cbb Move the data layout and selection dag info from the mips target machine
down to the subtarget.

llvm-svn: 212224
2014-07-02 21:29:23 +00:00
Adam Nemet
e66defe4d5 [X86] AVX512: Allow writemask argument in vpermt* intrinsics
llvm-svn: 212223
2014-07-02 21:26:01 +00:00
Adam Nemet
d43dcabf24 [X86] AVX512: Generate Pat<>'s for the vpermt2* intrinsics via multiclass
This new multiclass, avx512_perm_table_3src derives from the current one and
provides the Pat<>.  The next patch will add another Pat<> that uses the
writemask.

Note that I dropped the type annotation from the intrinsic call, i.e.: (v16f32
VR512:$src1) -> R512:$src1.  I think that this should be fine (at least many
intrinsic calls don't provide them) and it greatly reduces the number of
template arguments.

llvm-svn: 212222
2014-07-02 21:25:58 +00:00
Adam Nemet
ef83b36688 [X86] AVX512: Add writemask variants for vperm*2*
This includes assembler and codegen support (see the new tests in
avx512-encodings.s and avx512-shuffle.ll).

<rdar://problem/17492620>

llvm-svn: 212221
2014-07-02 21:25:54 +00:00
Tom Stellard
e220f55c61 R600: Add a comment that llvm.AMDGPU.trunc is a legacy intrinsic
llvm-svn: 212218
2014-07-02 20:53:57 +00:00
Tom Stellard
c4ab9c96da R600/SI: Use a ComplexPattern for ADDR64 addressing of MUBUF loads
llvm-svn: 212217
2014-07-02 20:53:56 +00:00
Tom Stellard
209c137768 R600: Promote i64 loads to v2i32
llvm-svn: 212216
2014-07-02 20:53:54 +00:00
Tom Stellard
5343a390b0 R600/SI: Adjsut SGPR live ranges before register allocation
SGPRs are written by instructions that sometimes will ignore control flow,
which means if you have code like:

if (VGPR0) {
  SGPR0 = S_MOV_B32 0
} else {
  SGPR0 = S_MOV_B32 1
}

The value of SGPR0 will 1 no matter what the condition is.

In order to deal with this situation correctly, we need to view the
program as if it were a single basic block when we calculate the
live ranges for the SGPRs.  They way we actually update the live
range is by iterating over all of the segments in each LiveRange
object and setting the end of each segment equal to the start of
the next segment.  So a live range like:

[3888r,9312r:0)[10032B,10384B:0)  0@3888r

will become:

[3888r,10032B:0)[10032B,10384B:0)  0@3888r

This change will allow us to use SALU instructions within branches.

llvm-svn: 212215
2014-07-02 20:53:48 +00:00
Tom Stellard
1f2dabfbae R600/SI: Add verifier check for immediates in register operands.
llvm-svn: 212214
2014-07-02 20:53:44 +00:00
Alexey Samsonov
58b70a4353 Remove non-static field initializer to appease MSVC
llvm-svn: 212212
2014-07-02 20:25:42 +00:00
Rafael Espindola
b0b3a01657 Fix configure+make build.
llvm-svn: 212210
2014-07-02 20:05:48 +00:00
Rafael Espindola
388e436556 Move CFG building code to a new lib/MC/MCAnalysis library.
The new library is 150KB on a Release+Asserts build, so it is quiet a bit of
code that regular users of MC don't need to link with now.

llvm-svn: 212209
2014-07-02 19:49:34 +00:00
David Blaikie
0cd27a9633 DebugInfo: Ensure that all debug location scope chains from instructions within a function, lead to the function itself.
Originally committed in r211723, reverted in r211724 due to failure
cases found and fixed (ArgumentPromotion: r211872, Inlining: r212065),
committed again in r212085 and reverted again in r212089 after fixing
some other cases, such as debug info subprogram lists not keeping track
of the function they represent (r212128) and then short-circuiting
things like LiveDebugVariables that build LexicalScopes for functions
that might not have full debug info.

And again, I believe the invariant actually holds for some reasonable
amount of code (but I'll keep an eye on the buildbots and see what
happens... ).

Original commit message:

PR20038: DebugInfo: Inlined call sites where the caller has debug info
but the call itself has no debug location.

This situation does bad things when inlined, so I've fixed Clang not to
produce inlinable call sites without locations when the caller has debug
info (in the one case where I could find that this occurred). This
updates the PR20038 test case to be what clang now produces, and readds
the assertion that had to be removed due to this bug.

I've also beefed up the debug info verifier to help diagnose these
issues in the future, and I hope to add checks to the inliner to just
assert-fail if it encounters this situation. If, in the future, we
decide we have to cope with this situation, the right thing to do is
probably to just remove all the DebugLocs from the inlined instructions.

llvm-svn: 212205
2014-07-02 18:32:05 +00:00
Quentin Colombet
fcd6cc7327 [RegAllocGreedy] Provide a subtarget hook to disable the local reassignment
heuristic.
By default, no functionality change.
This is a follow-up of r212099.

This hook provides a finer grain to control the optimization.

<rdar://problem/17444599>

llvm-svn: 212204
2014-07-02 18:32:04 +00:00
David Blaikie
f63c5eb709 Don't try to construct debug LexicalScopes hierarchy for functions that do not have top level debug information.
If a function isn't actually in a CU's subprogram list in the debug info
metadata, ignore all the DebugLocs and don't try to build scopes, track
variables, etc.

While this is possibly a minor optimization, it's also a correctness fix
for an incoming patch that will add assertions to LexicalScopes and the
debug info verifier to ensure that all scope chains lead to debug info
for the current function.

Fix up a few test cases that had broken/incomplete debug info that could
violate this constraint.

Add a test case where this occurs by design (inlining a
debug-info-having function in an attribute nodebug function - we want
this to work because /if/ the nodebug function is then inlined into a
debug-info-having function, it should be fine (and will work fine - we
just stitch the scopes up as usual), but should the inlining not happen
we need to not assert fail either).

llvm-svn: 212203
2014-07-02 18:31:35 +00:00
David Blaikie
f6bdd89397 Constify the Function pointers in the result of makeSubprogramMap
These don't need to be mutable and callers being added soon in CodeGen
won't have access to non-const Module&.

llvm-svn: 212202
2014-07-02 18:30:05 +00:00
Duncan P. N. Exon Smith
3ca30c6b7f AArch64: Re-enable AArch64AddressTypePromotion
This reverts commits r212189 and r212190.

While this pass was accidentally disabled (until r212073), r205437
slipped in a use of `auto` that should have been `auto&`.

This fixes PR20188.

llvm-svn: 212201
2014-07-02 18:17:40 +00:00
Duncan P. N. Exon Smith
53a9506052 AArch64: Remove unnecessary parens
llvm-svn: 212199
2014-07-02 18:14:03 +00:00
Matt Arsenault
6aca178583 R600: Fix crashes when an illegal type load or store is not handled.
I don't think anything hits this now, but will be exposed in future
patches.

llvm-svn: 212197
2014-07-02 17:44:53 +00:00
Puyan Lotfi
12ce21e429 Just adding a getHalfTy method to IRBuilder for completeness.
llvm-svn: 212195
2014-07-02 17:33:00 +00:00
Duncan P. N. Exon Smith
08df999c69 AArch64: Merge isa with dyn_cast
llvm-svn: 212194
2014-07-02 17:26:39 +00:00
Duncan P. N. Exon Smith
971c17962b XFAIL the test to go with r202189
llvm-svn: 212190
2014-07-02 17:07:03 +00:00
Duncan P. N. Exon Smith
3a2ea7e9a6 AArch64: Temporarily disable AArch64AddressTypePromotion
Temporarily disable AArch64AddressTypePromotion, which was effectively
re-enabled in r212073 and r212075, while I look into PR20188.

llvm-svn: 212189
2014-07-02 17:03:16 +00:00
Alexey Samsonov
036373fe61 [ASan] Print exact source location of global variables in error reports.
See https://code.google.com/p/address-sanitizer/issues/detail?id=299 for the
original feature request.

Introduce llvm.asan.globals metadata, which Clang (or any other frontend)
may use to report extra information about global variables to ASan
instrumentation pass in the backend. This metadata replaces
llvm.asan.dynamically_initialized_globals that was used to detect init-order
bugs. llvm.asan.globals contains the following data for each global:
  1) source location (file/line/column info);
  2) whether it is dynamically initialized;
  3) whether it is blacklisted (shouldn't be instrumented).

Source location data is then emitted in the binary and can be picked up
by ASan runtime in case it needs to print error report involving some global.
For example:

  0x... is located 4 bytes to the right of global variable 'C::array' defined in '/path/to/file:17:8' (0x...) of size 40

These source locations are printed even if the binary doesn't have any
debug info.

This is an ABI-breaking change. ASan initialization is renamed to
__asan_init_v4(). Pre-built libraries compiled with older Clang will not work
with the fresh runtime.

llvm-svn: 212188
2014-07-02 16:54:41 +00:00
Chad Rosier
f00a3b6176 Revert "Revert "MachineScheduler: better book-keeping for asserts.""
This reverts commit r212109, which reverted r212088.

However, disable the assert as it's not necessary for correctness.  There are
several corner cases that the assert needed to handle better for in-order
scheduling, but none of them are incorrect scheduler behavior. The assert is
mainly there to collect good unit tests like this and ensure that the
target-independent scheduler is working as expected with the various machine
models.

llvm-svn: 212187
2014-07-02 16:46:08 +00:00
Sylvestre Ledru
1f3e92c871 Also document the 'arc commit' commands in the 'Committing a change' section of the Phabricator doc
llvm-svn: 212184
2014-07-02 15:25:25 +00:00
Benjamin Kramer
972b4f1dd9 X86: When combining shuffles just remove shuffles that are completely redundant.
CombineTo doesn't allow replacing a node with itself so this would crash if the
combined shuffle is the same as the input shuffle.

llvm-svn: 212181
2014-07-02 15:09:44 +00:00
Axel Naumann
ef74b5b7d7 Undefine R2, R4, R6 after use.
llvm-svn: 212179
2014-07-02 14:40:35 +00:00
Elena Demikhovsky
2a53c3fac5 AVX-512: dec/inc instructions are slow on KNL
After Alexey Volkov, I'm adding the same property for KNL, that prefers ADD/SUB instead of INC/DEC.
Added a test.

llvm-svn: 212178
2014-07-02 14:11:05 +00:00
Matt Arsenault
73757b2b4b Move operator[] to DomTreeNodeBase
The comment in base even refers to it, but it was only defined
in the subclass.

llvm-svn: 212169
2014-07-02 06:50:48 +00:00
Matt Arsenault
4dc8768d57 Fix missing const
llvm-svn: 212168
2014-07-02 06:45:26 +00:00
David Majnemer
68ed1a9119 InstCombine: Optimize x/INT_MIN to x==INT_MIN
The result of x/INT_MIN is either 0 or 1, we can just use an icmp
instead.

llvm-svn: 212167
2014-07-02 06:42:13 +00:00
Chandler Carruth
d3bf1762bd [cleanup] Hoist an if-else chain on ISD opcodes (really designed for
switches) into a switch, and sink them into a dispatch function that can
return the result rather than awkward variable setting with breaks.

llvm-svn: 212166
2014-07-02 06:23:34 +00:00
David Majnemer
0418802b47 InstCombine: Add a vector variant test for PR20186
No functional change, just adding more test coverage that was meant to
go in with r212164.

llvm-svn: 212165
2014-07-02 06:14:13 +00:00
David Majnemer
5449bfbb6f InstCombine: Don't turn -(x/INT_MIN) -> x/INT_MIN
It is not safe to negate the smallest signed integer, doing so yields
the same number back.

This fixes PR20186.

llvm-svn: 212164
2014-07-02 06:07:09 +00:00
Owen Anderson
220bba5c5d Add range for-loop iterator adapter for cases in SwitchInst.
Patch by Marcello Maggioni, reviewed by Reid Kleckner.

llvm-svn: 212163
2014-07-02 05:32:13 +00:00
Saleem Abdulrasool
ac95fd68f3 aarch64: support target-specific .req assembler directive
Based on the support for .req on ARM. The aarch64 variant has to keep track if
the alias register was a vector register (v0-31) or a general purpose or
VFP/Advanced SIMD ([bhsdq]0-31) register.

Patch by Janne Grunau!

llvm-svn: 212161
2014-07-02 04:50:23 +00:00
Chandler Carruth
456bcaba88 [cleanup] Remove dead 'break;' statements that I meant to nuke in
r212158 but missed.

Thanks to Craig for spotting the goof!

llvm-svn: 212159
2014-07-02 04:39:34 +00:00