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Commit Graph

68854 Commits

Author SHA1 Message Date
Tim Northover
91319dbcd6 AArch64/ARM64: allow negative addends, at least on ELF.
llvm-svn: 207111
2014-04-24 12:56:38 +00:00
Tim Northover
cc19f68db6 ARM64: support relocated "TBZ/TBNZ" instructions.
llvm-svn: 207110
2014-04-24 12:56:34 +00:00
Tim Northover
e881c63815 AArch64/ARM64: support relocated ADR instruction
llvm-svn: 207109
2014-04-24 12:56:30 +00:00
Tim Northover
58031e937f AArch64/ARM64: add support for :abs_gN_s: MOVZ modifiers
We only need assembly support, so it's fairly easy.

llvm-svn: 207108
2014-04-24 12:56:27 +00:00
Tim Northover
34f590d2a6 ARM64: shut up warning about variable only used in assert.
llvm-svn: 207106
2014-04-24 12:22:12 +00:00
Tim Northover
dff10eef24 AArch64/ARM64: disentangle the "B.CC" and "LDR lit" operands
These can have different relocations in ELF. In particular both:

    b.eq global
    ldr x0, global

are valid, giving different relocations. The only possible way to distinguish
them is via a different fixup, so the operands had to be separated throughout
the backend.

llvm-svn: 207105
2014-04-24 12:12:10 +00:00
Tim Northover
586e442827 AArch64/ARM64: implement BFI optimisation
ARM64 was not producing pure BFI instructions for bitfield insertion
operations, unlike AArch64. The approach had to be a little different (in
ISelDAGToDAG rather than ISelLowering), and the outcomes aren't identical but
hopefully this gives it similar power.

This should address PR19424.

llvm-svn: 207102
2014-04-24 12:11:53 +00:00
Chandler Carruth
9e4513f082 [LCG] Incorporate the core trick of improvements on the naive Tarjan's
algorithm here: http://dl.acm.org/citation.cfm?id=177301.

The idea of isolating the roots has even more relevance when using the
stack not just to implement the DFS but also to implement the recursive
step. Because we use it for the recursive step, to isolate the roots we
need to maintain two stacks: one for our recursive DFS walk, and another
of the nodes that have been walked. The nice thing is that the latter
will be half the size. It also fixes a complete hack where we scanned
backwards over the stack to find the next potential-root to continue
processing. Now that is always the top of the DFS stack.

While this is a really nice improvement already (IMO) it further opens
the door for two important simplifications:

1) De-duplicating some of the code across the two different walks. I've
   actually made the duplication a bit worse in some senses with this
   patch because the two are starting to converge.
2) Dramatically simplifying the loop structures of both walks.

I wanted to do those separately as they'll be essentially *just* CFG
restructuring. This patch on the other hand actually uses different
datastructures to implement the algorithm itself.

llvm-svn: 207098
2014-04-24 11:05:20 +00:00
Chandler Carruth
9e16f14789 [LCG] Rotate logic applied to the top of the DFSStack to instead be
applied prior to pushing a node onto the DFSStack. This is the first
step toward avoiding the stack entirely for leaf nodes. It also
simplifies things a bit and I think is pointing the way toward factoring
some more of the shared logic out of the two implementations.

It is also making it more obvious how to restructure the loops
themselves to be a bit easier to read (although no different in terms of
functionality).

llvm-svn: 207095
2014-04-24 09:59:59 +00:00
Evgeniy Stepanov
6eb633223c [asan] Fix instrumentation of x86 intel syntax inline assembly.
Patch by Yuri Gorshenin.

llvm-svn: 207092
2014-04-24 09:56:15 +00:00
Chandler Carruth
cd39f4c2e6 [LCG] Switch the parent SCC tracking from a SmallSetVector to
a SmallPtrSet. Currently, there is no need for stable iteration in this
dimension, and I now thing there won't need to be going forward.

If this is ever re-introduced in any form, it needs to not be
a SetVector based solution because removal cannot be linear. There will
be many SCCs with large numbers of parents. When encountering these, the
incremental SCC update for intra-SCC edge removal was quadratic due to
linear removal (kind of).

I'm really hoping we can avoid having an ordering property here at all
though...

llvm-svn: 207091
2014-04-24 09:22:31 +00:00
Chandler Carruth
ccccef94ac [LCG] We don't actually need a set in each SCC to track the nodes. We
can use the node -> SCC mapping in the top-level graph to test this on
the rare occasions we need it.

llvm-svn: 207090
2014-04-24 08:55:36 +00:00
Benjamin Kramer
ec7fca3a00 X86: Emit test instead of constant shift + compare if the shift result is unused.
This allows us to compile
  return (mask & 0x8 ? a : b);
into
  testb $8, %dil
  cmovnel %edx, %esi
instead of
  andl  $8, %edi
  shrl  $3, %edi
  cmovnel %edx, %esi

which we formed previously because dag combiner canonicalizes setcc of and into shift.

llvm-svn: 207088
2014-04-24 08:15:31 +00:00
Karthik Bhat
fd6c53ce06 Allow vectorization of few missed llvm intrinsic calls in BBVectorizor by handling them in isVectorizableIntrinsic function.
llvm-svn: 207085
2014-04-24 07:29:55 +00:00
Craig Topper
c7c3a99ec2 [C++] Use 'nullptr'.
llvm-svn: 207083
2014-04-24 06:44:33 +00:00
Stepan Dyatkovskiy
686d334b05 Fix for PR18921, "vmov" part.
Added support for bytes replication feature, so it could be GAS compatible.

E.g. instructions below:
"vmov.i32 d0, 0xffffffff"
"vmvn.i32 d0, 0xabababab"
"vmov.i32 d0, 0xabababab"
"vmov.i16 d0, 0xabab"
are incorrect, but we could deal with such cases.

For first one we should emit:
"vmov.i8 d0, 0xff"
For second one ("vmvn"):
"vmov.i8 d0, 0x54"
For last two instructions it should emit:
"vmov.i8 d0, 0xab"

P.S.: In ARMAsmParser.cpp I have also fixed few nearby style issues in old code.
Just for keeping method bodies in harmony with themselves.

llvm-svn: 207080
2014-04-24 06:03:01 +00:00
David Blaikie
052cdbf046 Remove unused parameter
llvm-svn: 207061
2014-04-24 01:25:10 +00:00
David Blaikie
7e6a431bb1 Remove the intermediate AccelTypes maps in DWARF units.
llvm-svn: 207060
2014-04-24 01:23:49 +00:00
David Blaikie
cba93c7350 Remove the intermediate AccelNamespace maps in DWARF units.
llvm-svn: 207059
2014-04-24 01:02:42 +00:00
Michael J. Spencer
65065bf94f [InstCombine][x86] Constant fold psll intrinsics.
This excludes avx512 as I don't have hardware to verify. It excludes _dq
variants because they are represented in the IR as <{2,4} x i64> when it's
actually a byte shift of the entire i{128,265}.

This also excludes _dq_bs as they aren't at all supported by the backend.
There are also no corresponding instructions in the ISA. I have no idea why
they exist...

llvm-svn: 207058
2014-04-24 00:58:18 +00:00
David Blaikie
00d0daca29 Remove the intermediate AccelObjC maps in DWARF units
llvm-svn: 207057
2014-04-24 00:53:32 +00:00
Filipe Cabecinhas
696e2aae90 Optimize some special cases for SSE4a insertqi
Summary:
Since the upper 64 bits of the destination register are undefined when
performing this operation, we can substitute it and let the optimizer
figure out that only a copy is needed.

Also added range merging, if an instruction copies a range that can be
merged with a previous copied range.

Added test cases for both optimizations.

Reviewers: grosbach, nadav

CC: llvm-commits

Differential Revision: http://reviews.llvm.org/D3357

llvm-svn: 207055
2014-04-24 00:38:14 +00:00
Matt Arsenault
bc017b7e11 Handle addrspacecast when looking at memcpys from globals
llvm-svn: 207054
2014-04-24 00:01:09 +00:00
Chandler Carruth
a18f590cc4 [LCG] Normalize the post-order SCC iterator to just iterate over the SCC
values rather than having pointers in weird places.

llvm-svn: 207053
2014-04-23 23:51:07 +00:00
David Blaikie
16ac64caec And actually use the DwarfDebug::AccelNames to emit the names.
Fix for r207049 which would've emitted no accelerated names at all...

llvm-svn: 207051
2014-04-23 23:46:25 +00:00
David Blaikie
3a329f9b6e More formatting...
llvm-svn: 207050
2014-04-23 23:38:39 +00:00
David Blaikie
0ea0080644 Remove intermediate accelerator table for names.
(similar changes coming for the other accelerator tables)

llvm-svn: 207049
2014-04-23 23:37:35 +00:00
Chandler Carruth
1d124691ed [LCG] Switch the primary node iterator to be a *much* more normal C++
iterator, returning a Node by reference on dereference.

llvm-svn: 207048
2014-04-23 23:34:48 +00:00
Chandler Carruth
18f0202abb [LCG] Make the insertion and query paths into the LCG which cannot fail
return references to better model this property.

No functionality changed.

llvm-svn: 207047
2014-04-23 23:20:36 +00:00
Chandler Carruth
ddc1da4ac6 [LCG] Switch the SCC lookup to be in terms of call graph nodes rather
than functions. So far, this access pattern is *much* more common. It
seems likely that any user of this interface is going to have nodes at
the point that they are querying the SCCs.

No functionality changed.

llvm-svn: 207045
2014-04-23 23:12:06 +00:00
David Blaikie
b5a0b53e34 DwarfAccelTable: Remove trivial dtor and simplify construction with an array.
llvm-svn: 207044
2014-04-23 23:03:45 +00:00
Chandler Carruth
e064af9075 [LCG] Switch the primary SCC building code to use the negative low-link
values rather than an expensive dense map query to test whether children
have already been popped into an SCC. This matches the incremental SCC
building code. I've also included the assert that I put there but
updated both of their text.

No functionality changed here.

I still don't have any great ideas for sharing the code between the two
implementations, but I may try a brute-force approach to factoring it at
some point.

llvm-svn: 207042
2014-04-23 22:28:13 +00:00
Justin Bogner
6f40bf9196 llvm-cov: Add support for gcov's --long-file-names option
GCOV provides an option to prepend output file names with the source
file name, to disambiguate between covered data that's included from
multiple sources. Add a flag to llvm-cov that does the same.

llvm-svn: 207035
2014-04-23 21:44:55 +00:00
Saleem Abdulrasool
171f112dca MC: honour IMAGE_SCN_CNT_INITIALIZED_DATA
Emit the flag to indicate to the assembler that a section contains data if there
is pre-populated data present.

llvm-svn: 207028
2014-04-23 21:29:34 +00:00
David Blaikie
f96fd788df Move the AddressPool from DwarfFile to DwarfDebug.
There's only ever one address pool, not one per DWARF output file, so
let's just have one.

(similar refactoring of the string pool to come soon)

llvm-svn: 207026
2014-04-23 21:20:10 +00:00
David Blaikie
ae2c262f6c clang-format for my previous commit (I keep forgetting... )
llvm-svn: 207025
2014-04-23 21:20:07 +00:00
Matt Arsenault
76edcfc0e1 Use pointer size function where only a pointer is expected
llvm-svn: 207023
2014-04-23 21:10:15 +00:00
David Blaikie
ef5afb8970 Separate out the DWARF address pool into its own type/files.
llvm-svn: 207022
2014-04-23 21:04:59 +00:00
Matt Arsenault
b37a455d1d Remove more default address space argument usage.
These places are inconsequential in practice.

llvm-svn: 207021
2014-04-23 20:58:57 +00:00
Quentin Colombet
b541414228 [ARM64] Fix the information we give to the peephole optimizer for comparison.
ANDS does not use the same encoding scheme as other xxxS instructions (e.g.,
ADDS). Take that into account to avoid wrong peephole optimization.

<rdar://problem/16693089>

llvm-svn: 207020
2014-04-23 20:43:38 +00:00
Matt Arsenault
71fe4a9cad Don't use default address space arguments in GlobalOpt
llvm-svn: 207019
2014-04-23 20:36:10 +00:00
David Blaikie
aa205a84ff clang-format r207010
llvm-svn: 207016
2014-04-23 19:44:08 +00:00
Quentin Colombet
92e7065bf4 [X86] Fix missing/wrong scheduling model found by code inspection.
llvm-svn: 207014
2014-04-23 19:30:26 +00:00
David Blaikie
24e0c7bf4c Split out DwarfFile from DwarfDebug into its own .h/.cpp files.
Some of these types (DwarfDebug in particular) are quite large to begin
with (and I keep forgetting whether DwarfFile is in DwarfDebug or
DwarfUnit... ) so having a few smaller files seems like goodness.

llvm-svn: 207010
2014-04-23 18:54:00 +00:00
Justin Bogner
77d58782d8 ProfileData: Avoid unnecessary copies of CounterData
We're currently copying CounterData from InstrProfWriter into the
OnDiskHashTable, even though we don't need to, and then carelessly
leaking those copies. A const pointer is much better here.

llvm-svn: 207009
2014-04-23 18:50:16 +00:00
Simon Atanasyan
1e9d84c111 [yaml2obj][ELF] Remove unnecessary space between namespace name and
colons.

llvm-svn: 207003
2014-04-23 17:30:29 +00:00
Alexander Potapenko
eb29afd291 [ASan] Move the shadow range on 32-bit iOS (and iOS Simulator)
to 0x40000000-0x60000000 to avoid address space clash with system libraries.
The solution has been proposed by tahabekireren@gmail.com in https://code.google.com/p/address-sanitizer/issues/detail?id=210
This is also known to fix some Chromium iOS tests.

llvm-svn: 207002
2014-04-23 17:14:45 +00:00
Matt Arsenault
457de98b62 Remove dead code in instcombine.
Don't replace shifts greater than the type with the maximum shift.

This isn't hit anywhere in the tests, and somewhere else is replacing
these with undef.

llvm-svn: 207000
2014-04-23 16:48:40 +00:00
NAKAMURA Takumi
daf1d14b91 X86AsmParser.cpp: Fix memory leak at replacing movsd to movsl.
llvm-svn: 206991
2014-04-23 14:51:35 +00:00
NAKAMURA Takumi
dd0e1d3175 cl::ParseCommandLineOptions(): Use StringRef to receive sys::path::filename() instead of std::string.
llvm-svn: 206990
2014-04-23 14:51:23 +00:00