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Commit Graph

31 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
67af9a72f4 Added floating point lowering for setcc and brcond.
Fixed COMM asm directive usage.
ConstantPool using custom FourByteConstantSection.

llvm-svn: 54139
2008-07-28 19:11:24 +00:00
Bruno Cardoso Lopes
e6a9345187 Added initial support for small sections on Mips.
Added gp_rel relocations to support addressing small section contents.
Added command line to specify small section threshold in bytes.

llvm-svn: 53869
2008-07-21 18:52:34 +00:00
Anton Korobeynikov
cab6b6d44d Use chars, where possible
llvm-svn: 53791
2008-07-19 13:16:32 +00:00
Anton Korobeynikov
099f340556 Switch MIPS to new ELFTargetAsmInfo. Add few FIXMEs.
llvm-svn: 53790
2008-07-19 13:16:11 +00:00
Bruno Cardoso Lopes
0c154df07f Fixed call stack alignment. Improved AsmPrinter alignment issues.
llvm-svn: 53585
2008-07-15 02:03:36 +00:00
Bruno Cardoso Lopes
f5a55301e0 Added Subtarget support into RegisterInfo
Added HasABICall and HasAbsoluteCall (equivalent to gcc -mabicall and 
-mno-shared). HasAbsoluteCall is not implemented but HasABICall is the 
default for o32 ABI. Now, both should help into a more accurate 
relocation types implementation. 
Added IsLinux is needed to choose between asm directives.
Instruction name strings cleanup.
AsmPrinter improved.

llvm-svn: 53551
2008-07-14 14:42:54 +00:00
Bruno Cardoso Lopes
2bad4772e7 Fixe typos and 80 column size problems
llvm-svn: 53272
2008-07-09 04:45:36 +00:00
Bruno Cardoso Lopes
d738f1e6c7 Several changes to Mips backend, experimental fp support being the most
important.
- Cleanup in the Subtarget info with addition of new features, not all support
  yet, but they allow the future inclusion of features easier. Among new features,
  we have : Arch family info (mips1, mips2, ...), ABI info (o32, eabi), 64-bit
  integer
  and float registers, allegrex vector FPU (VFPU), single float only support.
- TargetMachine now detects allegrex core.
- Added allegrex (Mips32r2) sext_inreg instructions.
- *Added Float Point Instructions*, handling single float only, and
  aliased accesses for 32-bit FPUs.
- Some cleanup in FP instruction formats and FP register classes.
- Calling conventions improved to support mips 32-bit EABI.
- Added Asm Printer support for fp cond codes.
- Added support for sret copy to a return register.
- EABI support added into LowerCALL and FORMAL_ARGS.
- MipsFunctionInfo now keeps a virtual register per function to track the
  sret on function entry until function ret.
- MipsInstrInfo FP support into methods (isMoveInstr, isLoadFromStackSlot, ...),
  FP cond codes mapping and initial FP Branch Analysis.
- Two new Mips SDNode to handle fp branch and compare instructions : FPBrcond,
  FPCmp
- MipsTargetLowering : handling different FP classes, Allegrex support, sret
  return copy, no homing location within EABI, non 32-bit stack objects
  arguments, and asm constraint for float.

llvm-svn: 53146
2008-07-05 19:05:21 +00:00
Evan Cheng
4416f16a6a Unneeded include's.
llvm-svn: 52478
2008-06-19 01:21:02 +00:00
Bruno Cardoso Lopes
5a4d1d0fd3 Some Mips minor fixes
Added support for mips little endian arch => mipsel

llvm-svn: 51923
2008-06-04 01:45:25 +00:00
Dale Johannesen
768b6f281e Add CommonLinkage; currently tentative definitions
are represented as "weak", but there are subtle differences
in some cases on Darwin, so we need both.  The intent
is that "common" will behave identically to "weak" unless
somebody changes their target to do something else.
No functional change as yet.

llvm-svn: 51118
2008-05-14 20:12:51 +00:00
Evan Cheng
f8b1257d2e Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries.
llvm-svn: 47703
2008-02-28 00:43:03 +00:00
Bill Wendling
2cae66e28b Final de-tabification.
llvm-svn: 47663
2008-02-27 06:33:05 +00:00
Bill Wendling
50f5c4be14 Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool
would have been a Godsend here!

llvm-svn: 47625
2008-02-26 21:11:01 +00:00
Dan Gohman
cabaec582f Rename MRegisterInfo to TargetRegisterInfo.
llvm-svn: 46930
2008-02-10 18:45:23 +00:00
Evan Cheng
f61d1115af Get rid of the annoying blank lines before labels.
llvm-svn: 46667
2008-02-02 08:39:46 +00:00
Chris Lattner
9e5cc35593 Add new shorter predicates for testing machine operands for various types:
e.g. MO.isMBB() instead of MO.isMachineBasicBlock().  I don't plan on 
switching everything over, so new clients should just start using the 
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(), 
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.

llvm-svn: 45464
2007-12-30 23:10:15 +00:00
Chris Lattner
12477d46b4 Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
llvm-svn: 45453
2007-12-30 20:49:49 +00:00
Chris Lattner
ad9a6ccb83 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Bruno Cardoso Lopes
0661f1be90 Added JumpTable support
Fixed some AsmPrinter issues
Added GLOBAL_OFFSET_TABLE Node handle.

llvm-svn: 44024
2007-11-12 19:49:57 +00:00
Bruno Cardoso Lopes
569b5512b0 Added support for PIC code with "explicit relocations" *only*.
Removed all macro code for PIC (goodbye "la").
Support tested with shootout bench.

llvm-svn: 43697
2007-11-05 03:02:32 +00:00
Duncan Sands
d1bdbd010b Eliminate the remaining uses of getTypeSize. This
should only effect x86 when using long double.  Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment).  This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.

llvm-svn: 43688
2007-11-05 00:04:43 +00:00
Evan Cheng
33df6a6bed Revert 42908 for now.
llvm-svn: 42960
2007-10-14 05:57:21 +00:00
Dan Gohman
a75e4a62e6 Change the names used for internal labels to use the current
function symbol name instead of a codegen-assigned function
number.

Thanks Evan! :-)

llvm-svn: 42908
2007-10-12 14:53:36 +00:00
Bruno Cardoso Lopes
627ba10946 Position Independent Code (PIC) support [2]
- Added a function to hold the stack location 
  where GP must be stored during LowerCALL
- AsmPrinter now emits directives based on
  relocation type
- PIC_ set to default relocation type (same as GCC)

llvm-svn: 42779
2007-10-09 03:01:19 +00:00
Bruno Cardoso Lopes
23468a24c9 Added "LoadEffective" pattern to handle stack locations.
Fixed some comments

llvm-svn: 42271
2007-09-24 20:15:11 +00:00
Bruno Cardoso Lopes
96894b2c93 Mask directive completed with CalleeSave info
Comments for Mips directives added.

llvm-svn: 41526
2007-08-28 05:06:17 +00:00
Bruno Cardoso Lopes
d13e0b33d1 Couple of small changes. Delay Slot handle header declared.
Newline added after macros at function init on generated asm!

llvm-svn: 41157
2007-08-18 02:05:24 +00:00
Dan Gohman
0fc4e0cf47 Don't ignore the return value of AsmPrinter::doInitialization and
AsmPrinter::doFinalization.

llvm-svn: 40487
2007-07-25 19:33:14 +00:00
Bruno Cardoso Lopes
27f5beafb2 Added support for Mips specific GAS directives
Fixed print immediate 
Fixed Identation on MipsISelDAGToDAG.cpp

llvm-svn: 39764
2007-07-11 23:24:41 +00:00
Bruno Cardoso Lopes
709699b8d3 Initial Mips support, here we go! =)
- Modifications from the last patch included
  (issues pointed by Evan Cheng are now fixed).
- Added more MipsI instructions.
- Added more patterns to match branch instructions.

llvm-svn: 37461
2007-06-06 07:42:06 +00:00