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Commit Graph

199682 Commits

Author SHA1 Message Date
Nikita Popov
91a47585e0 [SCCP] Use range metadata for loads and calls
When all else fails, use range metadata to constrain the result
of loads and calls. It should also be possible to use !nonnull,
but that would require some general support for inequalities in
SCCP first.

Differential Revision: https://reviews.llvm.org/D83179
2020-07-07 21:09:21 +02:00
Michał Górny
9ebde1f21d [llvm] [docs] Do not require recommonmark for manpage build
Do not enforce recommonmark dependency if sphinx is called to build
manpages.  In order to do this, try to import recommonmark first
and do not configure it if it's not available.  Additionally, declare
a custom tags for the selected builder via CMake, and ignore
recommonmark import failure when 'man' target is used.

This will permit us to avoid the problematic recommonmark dependency
for the majority of Gentoo users that do not need to locally build
the complete documentation but want to have tool manpages.

Differential Revision: https://reviews.llvm.org/D83161
2020-07-07 20:59:02 +02:00
Stanislav Mekhanoshin
634b6f1d8b LIS: fix handleMove to properly extend main range
handleMoveDown or handleMoveUp cannot properly repair a main
range of a LiveInterval since they only get LiveRange. There
is a problem if certain use has moved few segments away and
there is a hole in the main range in between of these two
locations. We may get a SubRange with a very extended Segment
spanning several Segments of the main range and also spanning
that hole. If that happens then we end up with the main range
not covering its SubRange which is an error.

It might be possible to attempt fixing the main range in place
just between of the old and new index by extending all of its
Segments in between, but it is unclear this logic will be
faster than just straight constructMainRangeFromSubranges,
which itself is pretty cheap since it only contains interval
logic. That will also require shrinkToUses() call after which
is probably even more expensive.

In the test second move is from 64B to 92B for the sub1.
Subrange is correctly fixed:

L000000000000000C [16r,32B:0)[32B,92r:1)  0@16r 1@32B-phi

But the main range has a hole in between 80d and 88r after
updateRange():

%1 [16r,32B:0)[32B,80r:4)[80r,80d:3)[88r,96r:1)[96r,160B:2)

Since source position is 64B this segment is not even considered
by the updateRange().

Differential Revision: https://reviews.llvm.org/D82916
2020-07-07 11:52:32 -07:00
Nikita Popov
9420decd84 [SCCP] Handle assume predicates
Take assume predicates into account when visiting ssa.copy. The
handling is the same as for branch predicates, with the difference
that we're always on the true edge.

Differential Revision: https://reviews.llvm.org/D83257
2020-07-07 20:22:52 +02:00
Simon Pilgrim
e9634a1ef8 [X86][AVX] Don't fold PEXTR(VBROADCAST_LOAD(X)) -> LOAD(X).
We were checking the VBROADCAST_LOAD element size against the extraction destination size instead of the extracted vector element size - PEXTRW/PEXTB have implicit zext'ing so have i32 destination sizes for v8i16/v16i8 vectors, resulting in us extracting from the wrong part of a load.

This patch bails from the fold if the vector element sizes don't match, and we now use the target constant extraction code later on like the pre-AVX2 targets, fixing the test case.

Found by internal fuzzing tests.
2020-07-07 19:10:03 +01:00
Zola Bridges
8716bce35b [x86][lvi][seses] Use SESES at O0 for LVI mitigation
Use SESES as the fallback at O0 where the optimized LVI pass isn't desired due
to its effect on build times at O0.

I updated the LVI tests since this changes the code gen for the tests touched in the parent revision.

This is a follow up to the comments I made here: https://reviews.llvm.org/D80964

Hopefully we can continue the discussion here.

Also updated SESES to handle LFENCE instructions properly instead of adding
redundant LFENCEs. In particular, 1) no longer add LFENCE if the current
instruction being processed is an LFENCE and 2) no longer add LFENCE if the
instruction right before the instruction being processed is an LFENCE

Reviewed By: sconstab

Differential Revision: https://reviews.llvm.org/D82037
2020-07-07 11:05:09 -07:00
LLVM GN Syncbot
ddd17f6c62 [gn build] Port dfa0db79d0e 2020-07-07 17:49:12 +00:00
Thomas Lively
748afaf37d [WebAssembly] Avoid scalarizing vector shifts in more cases
Since WebAssembly's vector shift instructions take a scalar shift
amount rather than a vector shift amount, we have to check in ISel
that the vector shift amount is a splat. Previously, we were checking
explicitly for splat BUILD_VECTOR nodes, but this change uses the
standard utilities for detecting splat values that can handle more
complex splat patterns. Since the C++ ISel lowering is now more
general than the ISel patterns, this change also simplifies shift
lowering by using the C++ lowering for all SIMD shifts rather than
mixing C++ and normal pattern-based lowering.

This change improves ISel for shifts to the point that the
simd-shift-unroll.ll regression test no longer tests the code path it
was originally meant to test. The bug corresponding to that regression
test is no longer reproducible with its original reported reproducer,
so rather than try to fix the regression test, this change just
removes it.

Differential Revision: https://reviews.llvm.org/D83278
2020-07-07 10:45:26 -07:00
Arthur Eubanks
10a62a0b36 [BasicAA] Remove -basicaa alias
Follow up of https://reviews.llvm.org/D82607.

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D83067
2020-07-07 10:44:23 -07:00
Arthur Eubanks
72cee2da2e [NewPM][LoopFusion] Rename loop-fuse -> loop-fusion
The legacy pass name is "loop-fusion".

Fixes most tests under Transforms/LoopFusion under NPM.

Reviewed By: Whitney

Differential Revision: https://reviews.llvm.org/D83066
2020-07-07 10:43:07 -07:00
Simon Pilgrim
5a634aec9c [X86][AVX] Add test case showing incorrect extraction from VBROADCAST_LOAD on AVX2 targets
On AVX2 we tend to lower BUILD_VECTOR of constants as broadcasts if we can, in this case a <2 x i16> non-uniform constant has been lowered as a <4 x i32> broadcast.

The test case shows that the extraction folding code has incorrectly extracted the wrong part (lower WORD) of the resulting i32 memory source.

Found by internal fuzzing tests.
2020-07-07 18:32:32 +01:00
Simon Pilgrim
25c2d5b49a [X86][AVX] Add AVX2 tests to extractelement-load.ll 2020-07-07 18:32:32 +01:00
Chris Lattner
1819c62500 Expand the LLVM Developer Policy to include new sections on adding
a project to the LLVM Monorepo, and a second about the LLVM
Incubator projects.

Differential Revision: https://reviews.llvm.org/D83182
2020-07-07 10:30:24 -07:00
Biplob Mishra
20220d08fc [PowerPC] Implement Vector Replace Builtins in LLVM
Provide the LLVM intrinsics needed to implement vector replace element
builtins in altivec.h which will be added in a subsequent patch.

Differential Revision: https://reviews.llvm.org/D83308
2020-07-07 12:22:52 -05:00
Hans Wennborg
877f26b3a6 [GlobalOpt] Don't remove inalloca from musttail-called functions
Otherwise the verifier complains about the mismatching function ABIs.

Differential revision: https://reviews.llvm.org/D83300
2020-07-07 19:02:46 +02:00
Sanjay Patel
2b732d9d28 [x86] fix miscompile in buildvector v16i8 lowering
In the test based on PR46586:
https://bugs.llvm.org/show_bug.cgi?id=46586
...we are inserting 16-bits into the high element of the vector, shuffling it
to element 0, and extracting 32-bits. But xmm1 was never initialized, so the
top 16-bits of the extract are undef without this patch.

(It seems like we could do better than this by recognizing that we only demand
a subsection of the build vector, but I want to make sure we fix the
miscompile 1st.)

This path is only used for pre-SSE4.1, and simpler patterns get squashed
somewhere along the way, so the test still includes a 'urem' as it did in the
original test from the bug report.

Differential Revision: https://reviews.llvm.org/D83319
2020-07-07 13:02:31 -04:00
Amy Huang
b8c3f111de [NativeSession] Add column numbers to NativeLineNumber.
Summary:
This adds column numbers if they are present, and otherwise
sets the column number to be zero.

Bug: https://bugs.llvm.org/show_bug.cgi?id=41795

Reviewers: amccarth

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81950
2020-07-07 09:59:22 -07:00
Sanjay Patel
3f5cef4036 [x86] add test for buildvector lowering miscompile (PR46586); NFC 2020-07-07 12:24:56 -04:00
SharmaRithik
ee7090c659 [CodeMoverUtils] Make specific analysis dependent checks optional
Summary: This patch makes code motion checks optional which are dependent on
specific analysis example, dominator tree, post dominator tree and dependence
info. The aim is to make the adoption of CodeMoverUtils easier for clients that
don't use analysis which were strictly required by CodeMoverUtils. This will
also help in diversifying code motion checks using other analysis example MSSA.
Authored By: RithikSharma
Reviewer: Whitney, bmahjour, etiotto
Reviewed By: Whitney
Subscribers: Prazek, hiraditya, george.burgess.iv, asbirlea, llvm-commits
Tag: LLVM
Differential Revision: https://reviews.llvm.org/D82566
2020-07-07 20:11:07 +05:30
Guillaume Chatelet
a3a41cd01b [Bitfields][NFC] Make sure bitfields are contiguous
Differential Revision: https://reviews.llvm.org/D83202
2020-07-07 14:35:13 +00:00
Alexey Bataev
b9d820cbde [DEBUGINFO]Add dwarf versions to the test, NFC. 2020-07-07 10:10:44 -04:00
Roman Lebedev
8dc7c350a2 [Scalarizer] When gathering scattered scalar, don't replace it with itself
The (previously-crashing) test-case would cause us to seemingly-harmlessly
replace some use with something else, but we can't replace it with itself,
so we would crash.
2020-07-07 17:03:53 +03:00
Liu, Chen3
28e2081c60 [X86] Fix a bug that when lowering byval argument
When an argument has 'byval' attribute and should be
passed on the stack according calling convention,
a stack copy would be emitted twice. This will cause
the real value will be put into stack where the pointer
should be passed.

Differential Revision: https://reviews.llvm.org/D83175
2020-07-07 21:49:31 +08:00
Georgii Rymar
089f3ae98c [llvm-readobj] - Refactor the MipsGOTParser<ELFT> to stop using report_fatal_error().
`MipsGOTParser` is a helper class that is used to dump MIPS GOT and PLT.
There is a problem with it: it might call report_fatal_error() on invalid input.
When this happens, the tool reports a crash:

```
# command stderr:
LLVM ERROR: Cannot find PLTGOT dynamic table tag.
PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash backt
race.
Stack dump:
...
```

Such error were not tested. In this patch I've refactored `MipsGOTParser`:

I've splitted handling of GOT and PLT to separate methods. This allows to propagate
any possible errors to caller and should allow to dump the PLT when something is wrong
with the GOT and vise versa in the future.

I've added tests for each `report_fatal_error()`
and now calling the `reportError` instead. In the future we might want to switch to
reporting warnings, but it requres the additional testing and should
be performed independently.

I've kept `unwrapOrError` calls untouched for now as I'd like to focus on eliminating
`report_fatal_error` calls in this patch only.

Differential revision: https://reviews.llvm.org/D83225
2020-07-07 16:43:38 +03:00
Georgii Rymar
c315f53aff [llvm-readobj] - Fix indentation in broken-dynamic-reloc.test. NFC.
Fix a broken indentation introduced my myself in rG4a3c3d741a17.
2020-07-07 16:22:10 +03:00
Georgii Rymar
d4b928b169 [llvm-readobj] - Don't abort when dumping dynamic relocations when an object has both REL and RELA.
Currently, llvm-readobj calls `report_fatal_error` when an object has
both REL and RELA dynamic relocations.

llvm-readelf is able to handle this case properly. This patch adds such a test case
and adjusts the llvm-readobj code to follow (and be consistent with its own RELR and PLTREL cases).

Differential revision: https://reviews.llvm.org/D83232
2020-07-07 16:14:51 +03:00
Sam McCall
7fd13f8bce [clangd] Store index in '.cache/clangd/index' instead of '.clangd/index'
Summary:
.clangd/index was well-intentioned in 2754942cbaef, but `.clangd` is the best
filename for the clangd config file (matching .clang-format and .clang-tidy).
And of course we can't have both .clangd/index and .clangd...

There are a few overlapping goals to satisfy:
 - it should be clear from the directory name that this is transient
   data that is safe to delete at the cost of recomputation, i.e. a cache
 - it should be easy and self-documenting to blacklist these files in .gitignore
 - we should have some consistency between filenames in-tree and
   corresponding files in user storage (e.g. under XDG's ~/.cache/)
 - we should be consistent across platforms (including windows, which
   doesn't have distinct cache vs config directories)

So the plan is:
  $PROJECT/.clangd                    (project config)
  $PROJECT/.cache/clangd/index/       (project index)
  $PROJECT/.cache/clangd/modules/     (maybe in future)
  $XDG_CONFIG_HOME/clangd/config.yaml (user config)
  $XDG_CACHE_HOME/clangd/index/       (index of non-project files)
  $XDG_CACHE_HOME/clangd/modules/     (maybe in future)
This is sensible if XDG_{CONFIG,CACHE}_HOME coincide, and has a simple
.gitignore rule going forward: `.cache/`.

The monorepo gitignore is updated to reflect the backwards-compatible practice:
  ignore .clangd/ (with trailing slash) matching index files from clangd 9/10
  ignore .cache matching index from clangd 11+, and potentially other tools.
The entries from llvm-project/llvm gitignore are removed (obsolete).

Reviewers: kadircet, hokein

Subscribers: ilya-biryukov, MaskRay, jkorous, omtcyfz, arphaman, usaxena95, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D83099
2020-07-07 14:53:45 +02:00
Ayal Zaks
dfe7df7bd4 [LV] Vectorize without versioning-for-unit-stride under -Os/-Oz
If a loop is in a function marked OptSize, Loop Access Analysis should refrain
from generating runtime checks for unit strides that will version the loop.

If a loop is in a function marked OptSize and its vectorization is enabled, it
should be vectorized w/o any versioning.

Fixes PR46228.

Differential Revision: https://reviews.llvm.org/D81345
2020-07-07 15:04:21 +03:00
Georgii Rymar
d46bc6cdf6 [llvm-readobj] - Add prepending # to mips-got.test and mips-plt.test. NFC.
It was requested in D83225 review to do it separately.
2020-07-07 14:44:30 +03:00
Georgii Rymar
76117cb7dd [llvm-readobj] - Refine the error reporting in LLVMStyle<ELFT>::printELFLinkerOptions.
It is possible to:
1) Avoid using the `unwrapOrError` calls and hence allow to continue dumping even when
   something is not OK with one of SHT_LLVM_LINKER_OPTIONS sections.
2) replace `reportWarning` with `reportUniqueWarning` calls. In this method it is no-op,
   because it is not possible to have a duplicated warnings anyways, but since we probably
   want to switch to `reportUniqueWarning` globally, this is a good thing to do.

This patch addresses both these points.

Differential revision: https://reviews.llvm.org/D83131
2020-07-07 14:04:17 +03:00
Georgii Rymar
120dc4c2d4 [llvm-readobj] - Split the printHashSymbols. NFCI.
This introduces `printHashTableSymbols` and
`printGNUHashTableSymbols` to split the `printHashSymbols`.

It makes the code more readable and consistent.

Differential revision: https://reviews.llvm.org/D83040
2020-07-07 14:01:34 +03:00
Kerry McLaughlin
a7ecd67d40 [SVE][CodeGen] Legalisation of unpredicated store instructions
Summary:
When splitting a store of a scalable type, the new address is
calculated in SplitVecOp_STORE using a vscale and an add instruction.

Reviewers: sdesmalen, efriedma, david-arm

Reviewed By: david-arm

Subscribers: tschuett, hiraditya, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D83041
2020-07-07 11:47:10 +01:00
Georgii Rymar
2b61b9d440 [llvm-readobj] - Refactor ELFDumper<ELFT>::getStaticSymbolName.
This is a followup for D83129.
It is possible to make `getStaticSymbolName` report warnings inside
and return the "<?>" on a error. This allows to encapsulate errors handling
and slightly simplifies the logic in callers code.

Differential revision: https://reviews.llvm.org/D83208
2020-07-07 13:33:47 +03:00
Georgii Rymar
5a53f6b304 [llvm-readobj] - Allow dumping partially corrupted SHT_LLVM_CALL_GRAPH_PROFILE sections.
The code we have currently reports an error if something is not right with the
profile section. Instead we can report a warning and continue dumping when it is possible.
This patch does it.

Differential revision: https://reviews.llvm.org/D83129
2020-07-07 13:30:12 +03:00
Kerry McLaughlin
884e13dafb [SVE][CodeGen] Legalisation of unpredicated load instructions
Summary:
When splitting a load of a scalable type, the new address is
calculated in SplitVecRes_LOAD using a vscale and an add instruction.

This patch also adds a DAG combiner fold to visitADD for vscale:
 - Fold (add (vscale(C0)), (vscale(C1))) to (add (vscale(C0 + C1)))

Reviewers: sdesmalen, efriedma, david-arm

Reviewed By: david-arm

Subscribers: tschuett, hiraditya, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82792
2020-07-07 11:05:03 +01:00
Guillaume Chatelet
966a5c445d [NFC] Adding the align attribute on Atomic{CmpXchg|RMW}Inst
This is the first step to add support for the align attribute to AtomicRMWInst and AtomicCmpXchgInst.
Next step is to add support in IRBuilder and BitcodeReader.
Bug: https://bugs.llvm.org/show_bug.cgi?id=27168

Differential Revision: https://reviews.llvm.org/D83136
2020-07-07 09:54:13 +00:00
Georgii Rymar
1e4f015d35 [llvm-readobj] - Fix a crash scenario in GNUStyle<ELFT>::printHashSymbols().
We might crash when the dynamic symbols table is empty (or not found)
and --hash-symbols is requested. Both .hash and .gnu.hash logic is affected.

The patch fixes this issue.

Differential revision: https://reviews.llvm.org/D83037
2020-07-07 11:59:00 +03:00
David Sherwood
f96f4eb390 [SVE] Add more warnings checks to clang and LLVM SVE tests
There are now more SVE tests in LLVM and Clang that do not
emit warnings related to invalid use of EVT::getVectorNumElements()
and VectorType::getNumElements(). For these tests I have added
additional checks that there are no warnings in order to prevent
any future regressions.

Differential Revision: https://reviews.llvm.org/D82943
2020-07-07 09:33:20 +01:00
David Sherwood
654ddede3d [SVE][CodeGen] Fix bug when falling back to DAG ISel
In an earlier commit 584d0d5c1749c13625a5d322178ccb4121eea610 I
added functionality to allow AArch64 CodeGen support for falling
back to DAG ISel when Global ISel encounters scalable vector
types. However, it seems that we were not falling back early
enough as llvm::getLLTForType was still being invoked for scalable
vector types.

I've added a new fallback function to the call lowering class in
order to catch this problem early enough, rather than wait for
lowerFormalArguments to reject scalable vector types.

Differential Revision: https://reviews.llvm.org/D82524
2020-07-07 09:23:04 +01:00
David Sherwood
204220c193 [CodeGen] Fix warnings in sve-vector-splat.ll and sve-trunc.ll
This patch fixes all remaining warnings in:

  llvm/test/CodeGen/AArch64/sve-trunc.ll
  llvm/test/CodeGen/AArch64/sve-vector-splat.ll

I hit some warnings related to getCopyPartsToVector. I fixed two
issues:

1. In widenVectorToPartType() we assumed that we'd always be
using BUILD_VECTOR nodes to expand from one vector type to another,
which is incorrect for scalable vector types. I've fixed this for now
by simply bailing out immediately for scalable vectors.
2. In getCopyToPartsVector() I've changed the code to compare
the element counts of different types.

Differential Revision: https://reviews.llvm.org/D83028
2020-07-07 09:21:47 +01:00
Craig Topper
1e80ccda63 [X86] Add 64bit and retpoline-external-thunk to list of featuers in X86TargetParser.def.
'64bit' shows up from -march=native on 64-bit capable CPUs.
'retpoline-eternal-thunk' isn't a real feature but shows up
when -mretpoline-external-thunk is passed to clang.
2020-07-07 00:57:04 -07:00
Craig Topper
60f4d9c7ac [X86] Remove assert for missing features from X86::getImpliedFeatures
This is failing on the bots. Remove while I try to figure out
what feature I missed in the table.
2020-07-07 00:18:01 -07:00
Carl Ritson
a8e0822749 [AMDGPU] Update isFMAFasterThanFMulAndFAdd assumptions
MAD/MAC is no longer always available.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D83207
2020-07-07 15:40:44 +09:00
Craig Topper
95ea32cdc2 [X86] Move the feature dependency handling in X86TargetInfo::setFeatureEnabledImpl to a table based lookup in X86TargetParser.cpp
Previously we had to specify the forward and backwards feature dependencies separately which was error prone. And as dependencies have gotten more complex it was hard to be sure the transitive dependencies were handled correctly. The way it was written was also not super readable.

This patch replaces everything with a table that lists what features a feature is dependent on directly. Then we can recursively walk through the table to find the transitive dependencies. This is largely based on how we handle subtarget features in the MC layer from the tablegen descriptions.

Differential Revision: https://reviews.llvm.org/D83273
2020-07-06 23:14:02 -07:00
Max Kazantsev
7b7a02bc50 [Test] Add one more missing optimization opportunity test 2020-07-07 13:04:15 +07:00
Craig Topper
58ab399869 [X86] Remove duplicate SSE4A feature bit from X86TargetParser.def. NFC
We had both SSE4A and SSE4_A. So remove one of them.
2020-07-06 22:11:51 -07:00
Sameer Arora
9aaa6b386c [llvm-install-name-tool] Merge install-name options
This diff merges all options for llvm-install-name-tool under a single
function processLoadCommands. Also adds another test case for -add_rpath
option.

Test plan: make check-all

Reviewed by: jhenderson, alexshap, smeenai, Ktwu

Differential Revision: https://reviews.llvm.org/D82812
2020-07-06 20:32:32 -07:00
Nemanja Ivanovic
2e394d9166 [PowerPC] Do not RAUW combined nodes in VECTOR_SHUFFLE legalization
When legalizing shuffles, we make an attempt to combine it into
a PPC specific canonical form that avoids a need for a swap. If the
combine is successful, we RAUW the node and the custom legalization
replaces the now dead node instead of the one it should replace.
Remove that erroneous call to RAUW.
2020-07-06 22:09:28 -05:00
LLVM GN Syncbot
cd295c72b1 [gn build] Port 939d8309dbd 2020-07-07 02:20:39 +00:00
Valentin Clement
dbcd284c77 [openmp] Move isAllowedClauseForDirective to tablegen + add clause version to OMP.td
Summary:
Generate the isAllowedClauseForDirective function from tablegen. This patch introduce
the VersionedClause in the tablegen file so that clause can be encapsulated in this class to
specify a range of validity on a directive.

VersionedClause has default minVersion, maxVersion so it can be used without them or
minVersion.

Reviewers: jdoerfert, jdenny

Reviewed By: jdenny

Subscribers: yaxunl, hiraditya, guansong, jfb, sstefan1, aaron.ballman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82982
2020-07-06 22:20:06 -04:00