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Author SHA1 Message Date
Jakob Stoklund Olesen
2bba415e6f Don't crash when a value is defined after the last split point. 
llvm-svn: 128962
 2011-04-05 23:43:14 +00:00
Jakob Stoklund Olesen
88a0367967 Permit blocks to branch directly to a landing pad. 
Treat the landing pad as a normal successor when that happens.

llvm-svn: 128961
 2011-04-05 23:43:11 +00:00
Jim Grosbach
5530392fa3 Remove extraneous 'return'. 
llvm-svn: 128959
 2011-04-05 23:39:08 +00:00
Johnny Chen
48b39632aa Fix a typo in the handling of PKHTB opcode, plus add sanity check for illegal register 
encodings for DisassembleArithMiscFrm().

rdar://problem/9238659

llvm-svn: 128958
 2011-04-05 23:28:00 +00:00
Chris Lattner
362c5df787 finished my pass through all the 2.9 commits, now to make this intelligible 
llvm-svn: 128955
 2011-04-05 23:22:33 +00:00
Chris Lattner
1dd86fd6f4 mention llvm::ArrayRef, which should be use much more pervasively than 
it already is.

llvm-svn: 128954
 2011-04-05 23:18:20 +00:00
Bob Wilson
89dce9ab06 Clean up some code for clarity. 
llvm-svn: 128953
 2011-04-05 23:03:25 +00:00
Chandler Carruth
715cc35206 Provide an empty virtual destructor to go with the virtual methods in 
this class. Clang was warning on this with -Wnon-virtual-dtor.

llvm-svn: 128952
 2011-04-05 23:03:24 +00:00
Owen Anderson
c8ceb7246f Revert r128946 while I figure out why it broke the buildbots. 
llvm-svn: 128951
 2011-04-05 23:03:06 +00:00
Johnny Chen
359b9a2331 A7.3 register encoding 
Qd -> bit[12] == 0
    Qn -> bit[16] == 0
    Qm -> bit[0]  == 0

If one of these bits is 1, the instruction is UNDEFINED.

rdar://problem/9238399
rdar://problem/9238445

llvm-svn: 128949
 2011-04-05 22:57:07 +00:00
Devang Patel
03d0891c10 Add support to encode function's template parameters. 
llvm-svn: 128947
 2011-04-05 22:52:06 +00:00
Owen Anderson
809f1a74d1 Give RSBS and RSCS the pseudo treatment. 
llvm-svn: 128946
 2011-04-05 22:42:54 +00:00
Johnny Chen
cf11408b65 ARM disassembler was erroneously accepting an invalid RSC instruction. 
Added checks for regs which should not be 15.

rdar://problem/9237734

llvm-svn: 128945
 2011-04-05 22:18:07 +00:00
Chris Lattner
a2345ee59d remove postdom frontiers, because it is dead. Forward dom frontiers are 
still used by RegionInfo :(

llvm-svn: 128943
 2011-04-05 21:57:17 +00:00
NAKAMURA Takumi
74a55198e0 docs/ReleaseNotes.html: Please use proper *Heading* elements instead of classified div. 
It would be better to browse without stylesheet. (eg. on ViewVC)

llvm-svn: 128942
 2011-04-05 21:55:14 +00:00
Johnny Chen
6e1367d5dd ARM disassembler was erroneously accepting an invalid LSL instruction. 
For register-controlled shifts, we should check that the encoding constraint
Inst{7} = 0 and Inst{4} = 1 is satisfied.

rdar://problem/9237693

llvm-svn: 128941
 2011-04-05 21:49:44 +00:00
Owen Anderson
b73d1741c6 Fix bugs in the pseuo-ization of ADCS/SBCS pointed out by Jim, as well as doing the expansion earlier (using a custom inserter) to allow for the chance of predicating these instructions. 
llvm-svn: 128940
 2011-04-05 21:48:57 +00:00
Chris Lattner
91618e9fd8 remove graphprinter support for domfrontier. 
llvm-svn: 128938
 2011-04-05 21:43:56 +00:00
Jakob Stoklund Olesen
a0e0f8d74b These tests no longer require linear scan because reserved register coalescing is now universal. 
llvm-svn: 128936
 2011-04-05 21:40:41 +00:00
Jakob Stoklund Olesen
a819faa2f7 Run LiveDebugVariables in RegAllocBasic and RegAllocGreedy. 
llvm-svn: 128935
 2011-04-05 21:40:37 +00:00
Chris Lattner
bb45d35288 only 7 more weeks to go. 
llvm-svn: 128933
 2011-04-05 21:37:08 +00:00
Devang Patel
af7f5f4ada Refactor. 
llvm-svn: 128929
 2011-04-05 21:08:24 +00:00
Jakob Stoklund Olesen
e104258b57 Document llvm/ADT/IntEqClasses.h in ProgrammersManual.html 
llvm-svn: 128927
 2011-04-05 20:56:08 +00:00
Bob Wilson
ef86806800 Add an assertion instead of crashing when the scavenger goes past the end 
of a basic block.

llvm-svn: 128925
 2011-04-05 20:44:15 +00:00
Nick Lewycky
26bf6ca0d3 Fix typos. Adjust some whitespace for style. No functionality change. 
llvm-svn: 128924
 2011-04-05 20:39:27 +00:00
Johnny Chen
b50ab34083 The r128085 checkin modified the operand ordering for MRC/MRC2 instructions. 
Modify DisassembleCoprocessor() of ARMDisassemblerCore.cpp to react to the change.

rdar://problem/9236873

llvm-svn: 128922
 2011-04-05 20:32:23 +00:00
Roman Divacky
52e462b5e5 Add support for detection of Intel SandyBridge. 
llvm-svn: 128920
 2011-04-05 20:25:36 +00:00
Jakob Stoklund Olesen
c6297924dd Fix one more batch of X86 tests to be register allocation dependent. 
llvm-svn: 128919
 2011-04-05 20:20:30 +00:00
Jakob Stoklund Olesen
613bcf88be When dead code elimination removes all but one use, try to fold the single def into the remaining use. 
Rematerialization can leave single-use loads behind that we might as well fold whenever possible.

llvm-svn: 128918
 2011-04-05 20:20:26 +00:00
Devang Patel
2be08abc94 Do not emit empty name. 
llvm-svn: 128914
 2011-04-05 20:14:13 +00:00
Johnny Chen
4a15bdc1aa ARM disassembler should flag (rGPRRegClassID, r13|r15) as an error. 
llvm-svn: 128913
 2011-04-05 19:42:11 +00:00
Andrew Trick
f275156c40 Fix a typo. 
llvm-svn: 128912
 2011-04-05 19:13:11 +00:00
Andrew Trick
7e2e555075 Added *hidden* flags -print-options and -print-all-options so 
developers can see if their driver changed any cl::Option's. The
current implementation isn't perfect but handles most kinds of
options. This is nice to have when decomposing the stages of
compilation and moving between different drivers. It's also a good
sanity check when comparing results produced by different command line
invocations that are expected to produce the comparable results.

Note: This is not an attempt to prolong the life of cl::Option. On the
contrary, it's a placeholder for a feature that must exist when
cl::Option is replaced by a more appropriate framework. A new
framework needs: a central option registry, dynamic name lookup,
non-global containers of option values (e.g. per-module,
per-function), *and* the ability to print options values and their defaults at
any point during compilation.

llvm-svn: 128910
 2011-04-05 18:54:36 +00:00
Johnny Chen
f2d8c2ea3d LDRD now prints out two dst registers. 
llvm-svn: 128909
 2011-04-05 18:53:14 +00:00
Johnny Chen
8b1acb8d9b Fix test-llvm failures. 
llvm-svn: 128906
 2011-04-05 18:41:40 +00:00
Andrew Trick
b7629d86a7 whitespace 
llvm-svn: 128905
 2011-04-05 18:41:31 +00:00
Shantonu Sen
a1467abb18 An MCDisassembler has the option to not implement 
getEDInfo(), in which case this code would dereference
NULL. EDInst can already handle NULL info, so avoid
the dereference and pass NULL through.

Reviewed by Sean Callanan

llvm-svn: 128904
 2011-04-05 18:40:45 +00:00
Jim Grosbach
7bdaed671d Make second source operand of LDRD pre/post explicit. 
Finish what r128736 started.

llvm-svn: 128903
 2011-04-05 18:40:13 +00:00
Chris Lattner
85ebfdb7dd more notes to self. 
llvm-svn: 128902
 2011-04-05 18:38:45 +00:00
Johnny Chen
d37098ae32 Constants with multiple encodings (ARM): 
An alternative syntax is available for a modified immediate constant that permits the programmer to specify
the encoding directly. In this syntax, #<const> is instead written as #<byte>,#<rot>, where:

    <byte> is the numeric value of abcdefgh, in the range 0-255
    <rot> is twice the numeric value of rotation, an even number in the range 0-30.

llvm-svn: 128897
 2011-04-05 18:02:46 +00:00
Johnny Chen
626c0a35f6 Check for invalid register encodings for UMAAL and friends where: 
if dLo == 15 || dHi == 15 || n == 15 || m == 15 then UNPREDICTABLE;
    if dHi == dLo then UNPREDICTABLE;

rdar://problem/9230202

llvm-svn: 128895
 2011-04-05 17:43:10 +00:00
Owen Anderson
b314020ff7 Convert ADCS and SBCS instructions into pseudos that are expanded to the ADC/ABC with the appropriate S-bit input value. 
llvm-svn: 128892
 2011-04-05 17:24:25 +00:00
Stuart Hastings
3ed284e001 ARM doesn't support byval yet. XFAIL this test until it does. 
llvm-svn: 128891
 2011-04-05 17:16:21 +00:00
Oscar Fuentes
b6eccf955f Rename LLVMConfig.cmake to LLVM-Config.cmake. The *Config.cmake naming 
scheme is used by the functionality related to find_package.

llvm-svn: 128889
 2011-04-05 17:02:48 +00:00
Jakob Stoklund Olesen
2bef449b52 Ensure all defs referring to a virtual register are marked dead by addRegisterDead(). 
There can be multiple defs for a single virtual register when they are defining
sub-registers.

The missing <dead> flag was stopping the inline spiller from eliminating dead
code after rematerialization.

llvm-svn: 128888
 2011-04-05 16:53:50 +00:00
Rafael Espindola
7618e7be93 Print visibility info for external variables. 
llvm-svn: 128887
 2011-04-05 15:51:32 +00:00
Jakob Stoklund Olesen
731b0d77a2 Use std::unique instead of a SmallPtrSet to ensure unique instructions in UseSlots. 
This allows us to always keep the smaller slot for an instruction which is what
we want when a register has early clobber defines.

Drop the UsingInstrs set and the UsingBlocks map. They are no longer needed.

llvm-svn: 128886
 2011-04-05 15:18:18 +00:00
Nadav Rotem
8bb81fc184 InstCombine optimizes gep(bitcast(x)) even when the bitcasts casts away address 
space info. We crash with an assert in this case. This change checks that the
address space of the bitcasted pointer is the same as the gep ptr.

llvm-svn: 128884
 2011-04-05 14:29:52 +00:00
NAKAMURA Takumi
b6e583dc5f docs/ReleaseNotes.html: Add a few notes to MCCOFF and x64. FIXME: fixme! 
llvm-svn: 128882
 2011-04-05 08:24:22 +00:00
NAKAMURA Takumi
66a6d92da5 docs/GettingStarted.html: FIXME: dg, lit, and source tree layout. 
llvm-svn: 128881
 2011-04-05 08:24:15 +00:00