Dale Johannesen
3f62c40108
Add "inreg" field to CallSDNode (doesn't increase
...
its size). Adjust various lowering functions to
pass this info through from CallInst. Use it to
implement sseregparm returns on X86. Remove
X86_ssecall calling convention.
llvm-svn: 56677
2008-09-26 19:31:26 +00:00
Oscar Fuentes
65859a84d0
CMake: Builds all targets.
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llvm-svn: 56641
2008-09-26 04:40:32 +00:00
Anton Korobeynikov
7367de00cf
Reapply 56585:56589 with proper fix for some gcc versions
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llvm-svn: 56621
2008-09-25 21:00:33 +00:00
Evan Cheng
12a67b5226
Temporarily backing out 56585:56589 to unbreak the build.
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llvm-svn: 56607
2008-09-25 07:38:08 +00:00
Anton Korobeynikov
1c1eeb6b7b
Get rid of virtual inheritance for ARM TAI
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llvm-svn: 56587
2008-09-24 22:22:27 +00:00
Anton Korobeynikov
b9294473f0
Get rid of ReadOnlySection duplicate
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llvm-svn: 56582
2008-09-24 22:20:27 +00:00
Anton Korobeynikov
9b9c3a38ad
Get rid of now unused {Four,Eight,Sixteen}ByteConstantSection
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llvm-svn: 56580
2008-09-24 22:18:54 +00:00
Anton Korobeynikov
1b3c67c5cf
Get rid of duplicate char*/Section* stuff for TLS sections
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llvm-svn: 56577
2008-09-24 22:17:06 +00:00
Anton Korobeynikov
dca16f3acf
Get rid of duplicate char*/Section* DataSection
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llvm-svn: 56575
2008-09-24 22:16:16 +00:00
Anton Korobeynikov
c7ac49c632
Move actual section printing stuff to AsmPrinter from TAI reducing heap traffic.
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llvm-svn: 56573
2008-09-24 22:14:23 +00:00
Anton Korobeynikov
9e5d24042c
Drop obsolete hook and change all usage to new interface
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llvm-svn: 56572
2008-09-24 22:13:07 +00:00
Dan Gohman
a712c8d29e
Fix these enums' starting values to reflect the way that
...
instruction opcodes are now numbered. No functionality change.
llvm-svn: 56497
2008-09-23 18:42:32 +00:00
Dale Johannesen
3722f4c14c
Make log, log2, log10, exp, exp2 use Expand by
...
default.
llvm-svn: 56471
2008-09-22 21:57:32 +00:00
Evan Cheng
6acdef5d11
Duh. Default to ARMCC::AL (always).
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llvm-svn: 56301
2008-09-18 07:28:19 +00:00
Evan Cheng
99a186e39f
Clean up.
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llvm-svn: 56300
2008-09-18 07:27:23 +00:00
Evan Cheng
b44e839f76
Cosmetic.
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llvm-svn: 56299
2008-09-18 07:24:33 +00:00
Evan Cheng
f2c04a10e6
Fix addrmode1 instruction encodings; fix bx_ret encoding.
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llvm-svn: 56277
2008-09-17 07:53:38 +00:00
Evan Cheng
d268288d39
Specify instruction encoding using range list to avoid endianess issues.
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llvm-svn: 56276
2008-09-17 07:16:21 +00:00
Bill Wendling
932818c75a
Reverting r56249. On further investigation, this functionality isn't needed.
...
Apologies for the thrashing.
llvm-svn: 56251
2008-09-16 21:48:12 +00:00
Bill Wendling
1a240c8033
- Change "ExternalSymbolSDNode" to "SymbolSDNode".
...
- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol
These changes pave the way to allowing SymbolSDNodes with non-external linkage.
llvm-svn: 56249
2008-09-16 21:12:30 +00:00
Dan Gohman
fa32c7c6d9
Remove isImm(), isReg(), and friends, in favor of
...
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.
llvm-svn: 56189
2008-09-13 17:58:21 +00:00
Evan Cheng
63b98ccd5e
Fix random abort.
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llvm-svn: 56184
2008-09-13 01:55:59 +00:00
Dan Gohman
3450a8252f
Define CallSDNode, an SDNode subclass for use with ISD::CALL.
...
Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.
And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.
CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.
llvm-svn: 56183
2008-09-13 01:54:27 +00:00
Evan Cheng
775a37e4b4
Typo.
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llvm-svn: 56182
2008-09-13 01:44:01 +00:00
Evan Cheng
200cdea934
Rely on instruction format to determine so_reg operand for now.
...
llvm-svn: 56181
2008-09-13 01:38:29 +00:00
Evan Cheng
0a3a595612
Revert 56176. All those instruction formats are still needed.
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llvm-svn: 56180
2008-09-13 01:35:33 +00:00
Evan Cheng
1ac0a5f278
Accidentially flipped the condition.
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llvm-svn: 56179
2008-09-13 01:29:57 +00:00
Evan Cheng
d68f2947a9
Add debug dumps.
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llvm-svn: 56178
2008-09-13 01:15:21 +00:00
Evan Cheng
18fd8337b3
Eliminate unnecessary instruction formats.
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llvm-svn: 56176
2008-09-12 23:15:39 +00:00
Evan Cheng
66e7651a16
Addrmode 1 S bit can be dynamically set. Look for CPSR def.
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llvm-svn: 56172
2008-09-12 22:45:55 +00:00
Evan Cheng
adf6720626
Rewrite address mode 1 code emission routines.
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llvm-svn: 56171
2008-09-12 22:01:15 +00:00
Dan Gohman
89660301e3
Rename ConstantSDNode::getValue to getZExtValue, for consistency
...
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.
llvm-svn: 56159
2008-09-12 16:56:44 +00:00
Jim Grosbach
a25a322741
udpate header comment: s/VP/VFP/
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llvm-svn: 56126
2008-09-11 21:41:29 +00:00
Dale Johannesen
1ed08a58d1
Fix logic for not emitting no-dead-strip for some
...
objects in llvm.used (thanks Anton). Makes visible
the magic 'l' prefix for symbols on Darwin which are
to be passed through the assembler, then removed at
linktime (previously all references to this had been
hidden in the ObjC FE code, oh well).
llvm-svn: 55973
2008-09-09 01:21:22 +00:00
Dan Gohman
fedd10cd95
Delete an unused variable.
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llvm-svn: 55915
2008-09-08 16:28:17 +00:00
Dan Gohman
e1f9be27bc
Tidy up several unbeseeming casts from pointer to intptr_t.
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llvm-svn: 55779
2008-09-04 17:05:41 +00:00
Dale Johannesen
9e4d101fab
Add intrinsics for log, log2, log10, exp, exp2.
...
No functional change (and no FE change to generate them).
llvm-svn: 55753
2008-09-04 00:47:13 +00:00
Evan Cheng
126bd60288
Add Mac OS X compatible JIT callback routine.
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llvm-svn: 55625
2008-09-02 07:49:03 +00:00
Evan Cheng
e97c48a34a
Revamp ARM JIT.
...
llvm-svn: 55624
2008-09-02 06:52:38 +00:00
Evan Cheng
738426a2a1
Control flow instruction encodings.
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llvm-svn: 55601
2008-09-01 08:25:56 +00:00
Evan Cheng
36170e63a3
ldm / stm instruction encodings.
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llvm-svn: 55599
2008-09-01 07:48:18 +00:00
Evan Cheng
01019d7909
AXI2 and AXI3 instruction encodings.
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llvm-svn: 55598
2008-09-01 07:34:13 +00:00
Evan Cheng
fdae49e627
Reorganize instruction formats again; AXI1 encoding.
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llvm-svn: 55597
2008-09-01 07:19:00 +00:00
Evan Cheng
26305b192f
addrmode3 instruction encodings.
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llvm-svn: 55596
2008-09-01 07:00:14 +00:00
Evan Cheng
eb40cb3e42
Reorganize some instruction format definitions. No functionality change.
...
llvm-svn: 55594
2008-09-01 01:51:14 +00:00
Evan Cheng
fa095aec1e
Rest of addrmode2 instruction encodings.
...
llvm-svn: 55593
2008-09-01 01:27:33 +00:00
Evan Cheng
4c8338c0d3
Addr2 word / byte load encodings.
...
llvm-svn: 55591
2008-08-31 19:02:21 +00:00
Evan Cheng
94f3d276c6
Addr1 instructions opcodes are encoded in bits 21-24; encode S bit.
...
llvm-svn: 55590
2008-08-31 18:32:16 +00:00
Evan Cheng
3fb02ae0b6
TableGen'ing instruction encodings.
...
llvm-svn: 55533
2008-08-29 07:42:03 +00:00
Evan Cheng
b38decd917
addrmode1 (data processing) instruction encoding: bits 5-6 are 0, bits 7-10 encode the opcode.
...
llvm-svn: 55531
2008-08-29 07:40:52 +00:00