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Commit Graph

209349 Commits

Author SHA1 Message Date
Sriraman Tallam
9557829438 This adds a new test checking llvm-symbolizer with an object built with basic block sections.
Build a object with -fbasic-block-sections and reorder the basic blocks to be
non-contiguous. Then check if llvm-symbolizer correctly reports the symbolized
addresses. Included the source to build the object with command lines.

Differential Revision: https://reviews.llvm.org/D91678
2021-01-08 22:12:36 -08:00
Jonas Devlieghere
e8e78db050 [DWARFLinker] Link against BinaryFormat 2021-01-08 18:57:36 -08:00
Jonas Devlieghere
aac2afdb36 [DWARFLinker] Print the unsupport DWARF form as part of the warning 2021-01-08 18:51:40 -08:00
Kazu Hirata
a9e27959a1 [SCEV] Remove unused getExactExistingExpansion (NFC)
The last use was removed on Sep 4, 2018 in commit
2cbba5633753552a984572c8b9a5997e5c96496d.
2021-01-08 18:39:57 -08:00
Kazu Hirata
3da3875591 [Tablegen] Use llvm::find_if (NFC) 2021-01-08 18:39:55 -08:00
Kazu Hirata
ea45e4cb34 [Target, Transforms] Use *Set::contains (NFC) 2021-01-08 18:39:54 -08:00
Ben Shi
1d79d41494 [RISCV] Optimize multiplication with constant
1. Break MUL with specific constant to a SLLI and an ADD/SUB on riscv32
   with the M extension.
2. Break MUL with specific constant to two SLLI and an ADD/SUB, if the
   constant needs a pair of LUI/ADDI to construct.

Reviewed by: craig.topper

Differential Revision: https://reviews.llvm.org/D93619
2021-01-09 10:37:21 +08:00
Craig Topper
94793077cb [X86] Remove IntrArgMemOnly from ldmxcsr intrinsic.
Since we're leaving this as ReadWrite with the "write" reflecting
the update to MXCSR, we shouldn't say it only writes arg memory.

Hopefully this fixes the issue reported in post-commit in D93571.
2021-01-08 17:50:28 -08:00
Tony
ccb53c0a97 [AMDGPU] Add volatile support to SIMemoryLegalizer
Treat a non-atomic volatile load and store as a relaxed atomic at
system scope for the address spaces accessed. This will ensure all
relevant caches will be bypassed.

A volatile atomic is not changed and still only bypasses caches upto
the level specified by the SyncScope operand.

Differential Revision: https://reviews.llvm.org/D94214
2021-01-09 00:52:33 +00:00
Arthur Eubanks
29f461772d [NewPM] Run ObjC ARC passes
Match the legacy PM in running various ObjC ARC passes.

This requires making some module passes into function passes. These were
initially ported as module passes since they add function declarations
(e.g. https://reviews.llvm.org/D86178), but that's still up for debate
and other passes do so.

Reviewed By: ahatanak

Differential Revision: https://reviews.llvm.org/D93743
2021-01-08 15:47:11 -08:00
Vedant Kumar
3533461f4c [InitLLVM] Ensure SIGPIPE handler installed before sigaction()
The pipe signal handler must be installed before any other handlers are
registered. This is because the Unix RegisterHandlers function does not
perform a sigaction() for SIGPIPE unless a one-shot handler is present,
to allow long-lived processes (like lldb) to fully opt-out of llvm's
SIGPIPE handling and ignore the signal safely.

Fixes a bug introduced in D70277.

Tested by running Nick's test case:

% xcrun ./bin/clang -E -fno-integrated-cc1 x.c | tee foo.txt | head

I verified that child cc1 process exits with IO_ERR, and that the parent
recognizes the error code, exiting cleanly.

Differential Revision: https://reviews.llvm.org/D94324
2021-01-08 15:13:04 -08:00
Mircea Trofin
028f228360 [NFC] Disallow unused prefixes in CodeGen/AMDGPU
This adds the lit config, and cleans up remaining tests.

Differential Revision: https://reviews.llvm.org/D94245
2021-01-08 11:49:23 -08:00
Craig Topper
bac27278dc [RISCV] Cleanup a few section comments in RISCVInstrInfoVPseudos.td. NFC 2021-01-08 11:36:31 -08:00
Raul Tambre
6b1d01045f [CMake] Fix incorrect rpath for tests if LLVM_LOCAL_RPATH isn't set
d9ce31ae7d (D94322) removed the check because I thought it was dead
due to checking the existance of a variable (which always existed).

This causes LLDB tests to fail as they set NO_INSTALL_RPATH because
they're never meant to be installed, but we still would end up using
the install rpath.

Add the check back and make it explicitly check for an empty value
to make the purpose clearer and avoid implicit test for a false/true
value.

Differential Revision: https://reviews.llvm.org/D94326
2021-01-08 21:24:18 +02:00
Vedant Kumar
3be36bc6be [Signal] Re-raise SIGPIPE if the handler is uninstalled
Instead of falling through to RunSignalHandlers after the SIGPIPE
handler is uninstalled and we get a SIGPIPE, re-raise the signal, just
like we do for other IntSigs.

This was discussed and informally OK'd here:

https://reviews.llvm.org/rG9a3f892d018238dce5181e458905311db8e682f5#856804
2021-01-08 11:13:43 -08:00
Raul Tambre
103ca3f4a4 Re-land "[CMake] Don't enable BUILD_WITH_INSTALL_RPATH when using custom build rpath"
Reverted check for empty CMAKE_BUILD_RPATH fixed.

When `BUILD_WITH_INSTALL_RPATH` is enabled it prevents using a custom rpath only
for the build tree as the install rpath will be used. This makes it impossible to run a
runtimes build when compiling with Clang and wanting the installed rpath to be
empty (i.e. `-DCMAKE_BUILD_RPATH="<some path>" -DCMAKE_SKIP_INSTALL_RPATH=ON`).

Disable `BUILD_WITH_INSTALL_RPATH` when `CMAKE_BUILD_RPATH` is non-empty to
allow for such build scenarios.

Differential Revision: https://reviews.llvm.org/D94322
2021-01-08 20:26:08 +02:00
Paul C. Anagnostopoulos
915b9b46d6 [TableGen] Fix use of *CurRec when CurRec is null.
I cannot build with the undefined sanitizer on Visual Studio.
2021-01-08 13:21:57 -05:00
David Green
a48b75c0a0 [ARM] Custom lower i1 vector truncates
The ISel patterns we have for truncating to i1's under MVE do not seem
to be correct. Instead custom lower to icmp(ne, and(x, 1), 0).

Differential Revision: https://reviews.llvm.org/D94226
2021-01-08 18:21:00 +00:00
Raul Tambre
066963805a Revert "[CMake] Don't enable BUILD_WITH_INSTALL_RPATH when using custom build rpath"
This reverts commit 0ebc1fb29f278db0665423f15c53e6ee9601dddb.

The behaviour should have been the same as before unless specifying CMAKE_BUILD_RPATH,
which was previously broken.
However, this seems to have broken builds for some people that don't specify it.
Reverting until I can investigate.

Differential Revision: https://reviews.llvm.org/D94319
2021-01-08 19:59:20 +02:00
Florian Hahn
539b21f066 [VPlan] Move reduction start value creation to widenPHIRecipe.
This was suggested to prepare for D93975.

By moving the start value creation to widenPHInstruction, we set the
stage to manage the start value directly in VPWidenPHIRecipe, which be
used subsequently to set the 'resume' value for reductions during
epilogue vectorization.

It also moves RdxDesc to the recipe, so we do not have to rely on Legal
to look it up later.

Reviewed By: gilr

Differential Revision: https://reviews.llvm.org/D94175
2021-01-08 17:49:43 +00:00
Ganesh Gopalasubramanian
61dae8142f [X86] Add TLBSYNC, INVLPGB and SNP instructions
Differential Revision: https://reviews.llvm.org/D94134
2021-01-08 22:28:53 +05:30
David Green
e38c30e9ac [ConstProp] Constant propagation for get.active.lane.mask instrinsics
Similar to the Arm VCTP intrinsics, if the operands of an
active.lane.mask are both known, the constant lane mask can be
calculated. This can come up after unrolling the loops.

Differential Revision: https://reviews.llvm.org/D94103
2021-01-08 16:10:01 +00:00
Simon Pilgrim
5421497eac [X86][SSE] Fold unpack(hop(),hop()) -> permute(hop())
UNPCKL/UNPCKH only uses one op from each hop, so we can merge the hops and then permute the result.
2021-01-08 15:22:17 +00:00
David Green
1f049187d8 [ARM][LV] Additional loop invariant reduction test. NFC 2021-01-08 15:15:08 +00:00
Paul C. Anagnostopoulos
942aec297e [TableGen] Remove unused declaration that caused build failures. 2021-01-08 10:10:54 -05:00
Heejin Ahn
50147487de [WebAssembly] Rename wasm_rethrow_in_catch intrinsic/builtin
`wasm_rethrow_in_catch` intrinsic and builtin are used in order to
rethrow an exception when the exception is caught but there is no
matching clause within the current `catch`. For example,
```
try {
  foo();
} catch (int n) {
  ...
}
```
If the caught exception does not correspond to C++ `int` type, it should
be rethrown. These intrinsic/builtin were renamed `rethrow_in_catch`
because at the time I thought there would be another intrinsic for C++'s
`throw` keyword, which rethrows an exception. It turned out that `throw`
keyword doesn't require wasm's `rethrow` instruction, so we rename
`rethrow_in_catch` to just `rethrow` here.

Reviewed By: dschuff, tlively

Differential Revision: https://reviews.llvm.org/D94038
2021-01-08 06:55:04 -08:00
David Green
c9c47363e5 [ARM] Update and regenerate test checks. NFC 2021-01-08 14:54:16 +00:00
Paul C. Anagnostopoulos
d74e81058e [TableGen] Add the assert statement, step 1
Differential Revision: https://reviews.llvm.org/D93911

This first step adds the assert statement and supports it at top level
and in record definitions. Later steps will support it in class
definitions and multiclasses.
2021-01-08 09:47:51 -05:00
Simon Pilgrim
a33e47faab [X86][SSE] Add vphaddd/vphsubd unpack(hop(),hop()) tests 2021-01-08 14:39:37 +00:00
Alexey Bataev
13839002c0 [SLP][NFC]Add a test for reused shrink check, NFC. 2021-01-08 06:23:23 -08:00
Simon Pilgrim
af818934a3 [X86][SSE] Add tests for unpack(hop(),hop())
We should be able to convert these to permute(hop()) as we only ever use one of the ops from each hop.
2021-01-08 14:11:37 +00:00
Kazushi (Jam) Marukawa
1baf49d5a7 [VE] Support pack_f32p and pack_f32a intrinsic instructions
Support pack_f32p and pack_f32a intrinsic instructions and regression tests.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D94296
2021-01-08 22:59:11 +09:00
Heejin Ahn
ab6a8685af [WebAssembly] Change label numbers to variables in test
cfg-stackify-eh.ll contains many `CHECK` lines specifying label / catch
comments with numbers. These numbers are subject to change every time
any block/loop/try is added in the middle in existing functions or any
other function is added in the middle of the file, generating a large
number of lines in diffs. This change converts them to variables so they
can be more resistent to future changes.

Reviewed By: dschuff, tlively

Differential Revision: https://reviews.llvm.org/D94037
2021-01-08 05:49:59 -08:00
Alexander Belyaev
0d8c596c50 Revert "[SLP]Need shrink the load vector after reordering."
This reverts commit 4284afdf9432f7d756f56b0ab21d69191adefa8d.

This changes computed values in fused_batchnorm_test_cpu.

Not equal to tolerance rtol=1e-06, atol=0.001
Mismatched value: a is different from b.
not close where = (array([0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
       1, 1]), array([1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
       1, 1]), array([0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
       1, 1]), array([0, 1, 2, 3, 4, 5, 0, 1, 2, 3, 4, 5, 0, 1, 2, 3, 4, 5, 0, 1, 2, 3,
       4, 5]))
not close lhs = [-0.6636615  -0.9804948  -1.148275   -0.68193716 -0.8572368  -0.65046215
 -0.6993756  -1.2244141  -1.0938729  -0.50369143 -0.51830524 -0.738452
 -0.7214286  -0.48115745 -0.9380924  -0.9341769  -0.5916775  -1.2896856
 -0.7264182  -0.9746917  -0.783249   -0.7659018  -0.86214024 -0.47784212]
not close rhs = [ 0.44102234  0.12418899 -0.04359123  0.42274666  0.24744703  0.45422167
  0.40530816 -0.11973029  0.01081094  0.6009924   0.5863786   0.3662318
  0.38325527  0.62352633  0.1665914   0.1705069   0.5130063  -0.18500176
  0.37826565  0.12999213  0.3214348   0.338782    0.24254355  0.62684166]
not close dif = [1.1046839 1.1046838 1.1046838 1.1046839 1.1046839 1.1046839 1.1046838
 1.1046839 1.1046839 1.1046839 1.1046839 1.1046839 1.1046839 1.1046838
 1.1046839 1.1046839 1.1046839 1.1046839 1.1046839 1.1046839 1.1046839
 1.1046839 1.1046838 1.1046838]
not close tol = [0.00100044 0.00100012 0.00100004 0.00100042 0.00100025 0.00100045
 0.00100041 0.00100012 0.00100001 0.0010006  0.00100059 0.00100037
 0.00100038 0.00100062 0.00100017 0.00100017 0.00100051 0.00100019
 0.00100038 0.00100013 0.00100032 0.00100034 0.00100024 0.00100063]
2021-01-08 14:42:26 +01:00
LLVM GN Syncbot
3c6978b84b [gn build] Port 9c4b2225b24 2021-01-08 13:30:54 +00:00
Simon Moll
97946e16bb [VP] ISD helper functions [VE] isel for vp_add, vp_and
This implements vp_add, vp_and for the VE target by lowering them to the
VVP_* layer. We also add helper functions for VP SDNodes (isVPSDNode,
getVPMaskIdx, getVPExplicitVectorLengthIdx).

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D93766
2021-01-08 14:29:45 +01:00
Mark Murray
9ad1687341 [AArch64] Add +flagm archictecture option, allowing the v8.4a flag modification extension.
Differential Revision: https://reviews.llvm.org/D94081
2021-01-08 13:21:12 +00:00
Mark Murray
1bb511bb4c [AArch64] Add +pauth archictecture option, allowing the v8.3a pointer authentication extension.
Differential Revision: https://reviews.llvm.org/D94083
2021-01-08 13:21:11 +00:00
Sanjay Patel
0132b1afa9 [SLP] limit verifyFunction to debug build (PR48689)
As noted in PR48689, the verifier may have some kind
of exponential behavior that should be addressed
separately. For now, only run it in debug mode to
prevent problems for release+asserts.
That limit is what we had before D80401, and I'm
not sure if there was a reason to change it in that
patch.
2021-01-08 08:10:17 -05:00
Kazushi (Jam) Marukawa
6e69ff3625 [VE][NFC] Clean ISel patterns for LSV and LVS
Clean ISel patterns for LSV and LVS before upstream more hand-written
ISel patterns.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D94291
2021-01-08 21:47:33 +09:00
Nicholas Guy
338f32fab6 [AArch64] Fix crash caused by invalid vector element type
Fixes a crash caused by D91255, when LLVMTy is null when
calling changeExtendedVectorElementType.

Differential Revision: https://reviews.llvm.org/D94234
2021-01-08 12:02:54 +00:00
Cullen Rhodes
c86066d035 [LV] Legalize scalable VF hints
In the following loop:

  void foo(int *a, int *b, int N) {
    for (int i=0; i<N; ++i)
      a[i + 4] = a[i] + b[i];
  }

The loop dependence constrains the VF to a maximum of (4, fixed), which
would mean using <4 x i32> as the vector type in vectorization.
Extending this to scalable vectorization, a VF of (4, scalable) implies
a vector type of <vscale x 4 x i32>. To determine if this is legal
vscale must be taken into account. For this example, unless
max(vscale)=1, it's unsafe to vectorize.

For SVE, the number of bits in an SVE register is architecturally
defined to be a multiple of 128 bits with a maximum of 2048 bits, thus
the maximum vscale is 16. In the loop above it is therefore unfeasible
to vectorize with SVE. However, in this loop:

  void foo(int *a, int *b, int N) {
    #pragma clang loop vectorize_width(X, scalable)
    for (int i=0; i<N; ++i)
      a[i + 32] = a[i] + b[i];
  }

As long as max(vscale) multiplied by the number of lanes 'X' doesn't
exceed the dependence distance, it is safe to vectorize. For SVE a VF of
(2, scalable) is within this constraint, since a vector of <16 x 2 x 32>
will have no dependencies between lanes. For any number of lanes larger
than this it would be unsafe to vectorize.

This patch extends 'computeFeasibleMaxVF' to legalize scalable VFs
specified as loop hints, implementing the following behaviour:
  * If the backend does not support scalable vectors, ignore the hint.
  * If scalable vectorization is unfeasible given the loop
    dependence, like in the first example above for SVE, then use a
    fixed VF.
  * Accept scalable VFs if it's safe to do so.
  * Otherwise, clamp scalable VFs that exceed the maximum safe VF.

Reviewed By: sdesmalen, fhahn, david-arm

Differential Revision: https://reviews.llvm.org/D91718
2021-01-08 10:49:44 +00:00
Simon Moll
04d52fc380 [VE] Expand single-element BUILD_VECTOR to INSERT_VECTOR_ELT
We do this mostly to be able to test the insert_vector_elt isel
patterns. As long as we don't, most single element insertions show up as
`BUILD_VECTOR` in the backend.

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D93759
2021-01-08 11:48:01 +01:00
Simon Moll
a2f27abba6 [VE] Extract & insert vector element isel
Isel and tests for extract_vector_elt and insert_vector_elt.

Reviewed By: kaz7

Differential Revision: https://reviews.llvm.org/D93687
2021-01-08 11:46:59 +01:00
Christian Sigg
7814cef668 Fix two pessimizing moves.
See https://en.cppreference.com/w/cpp/language/return#Automatic_move_from_local_variables_and_parameters

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D94218
2021-01-08 11:44:29 +01:00
Qiu Chaofan
b09bb79732 [NFC] Update some PPC tests marked as auto-generated
Update CodeGen regression tests with marker at first line telling it's
auto-generated by the script, under PowerPC directory. For some reason,
these tests are generated but manually written, which makes things
unclear when someone's change affecting them.

However, some tests only show simple change after re-generated, like
extra blank lines, disappearing '.localentry', etc. Besides, some tests
are generated but added checks for debug output. This commit doesn't try
updating them.
2021-01-08 17:59:13 +08:00
Jan Svoboda
550fdcecfd Revert "[clang][cli] Port DiagnosticOpts to new option parsing system"
This reverts commit 8e3230ff
2021-01-08 10:53:12 +01:00
David Green
40a4684746 [LV] Don't sink into replication regions
The new test case here contains a first order recurrences and an
instruction that is replicated. The first order recurrence forces an
instruction to be sunk _into_, as opposed to after the replication
region. That causes several things to go wrong including registering
vector instructions multiple times and failing to create dominance
relations correctly.

Instead we should be sinking to after the replication region, which is
what this patch makes sure happens.

Differential Revision: https://reviews.llvm.org/D93629
2021-01-08 09:50:10 +00:00
Kazushi (Jam) Marukawa
b3f3566228 [VE] Add SVOB intrinsic instruction
Add SVOB intrinsic instruction and a regression test.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D94279
2021-01-08 18:49:17 +09:00
Jan Svoboda
2946e24cb2 [clang][cli] Port DiagnosticOpts to new option parsing system
This patch introduces additional infrastructure necessary to accommodate DiagnosticOptions.

DiagnosticOptions are unique in that they are parsed by the same function in cc1 AND in the Clang driver. The call to the parsing function from the driver occurs early on in the compilation process, where no proper DiagnosticEngine exists, because the diagnostic options (passed through command line) are not known yet.

To preserve the current behavior, we need to be able to selectively parse:
* all options (for -cc1),
* only diagnostic options (for driver).

This patch achieves that in the following way:
* new MacroPrefix field is added to the Option TableGen class,
* new IsDiag TableGen mixin sets MacroPrefix to "DIAG_",
* TableGen backend serializes option records into a macro with the prefix,
* CompilerInvocation parse/generate methods define the [DIAG_]OPTION_WITH_MARSHALLING macros to handle diagnostic options separately.

Depends on D93700, D93701 & D93702.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D84673
2021-01-08 10:44:22 +01:00