1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-23 04:52:54 +02:00
Commit Graph

79 Commits

Author SHA1 Message Date
Dan Gohman
955fdc7a4c Add explicit keywords.
llvm-svn: 53179
2008-07-07 18:00:37 +00:00
Evan Cheng
3f664b6fd3 Split scheduling from instruction selection.
llvm-svn: 52923
2008-06-30 20:45:06 +00:00
Chris Lattner
5cb886d4d6 split sparc lowering out into SparcISelLowering.{cpp|h} to follow
best practices.

llvm-svn: 48442
2008-03-17 03:21:36 +00:00
Chris Lattner
5aef54c950 refactor the LowerOperation code out to individual functions for
each lowering, which is 'best practice'.

llvm-svn: 48441
2008-03-17 02:52:07 +00:00
Evan Cheng
7d9e5a7680 Default ISD::PREFETCH to expand.
llvm-svn: 48169
2008-03-10 19:38:10 +00:00
Evan Cheng
dba1dfe962 Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions.
llvm-svn: 48042
2008-03-08 00:58:38 +00:00
Chris Lattner
c1851542a5 Sparc backend doesn't support debug info yet, mark the nodes as expand. This fixes a crash on
test/DebugInfo/funccall.ll

llvm-svn: 47709
2008-02-28 05:54:25 +00:00
Chris Lattner
f989deed26 Fix CodeGen/Generic/storetrunc-fp.ll on sparc, PR2105
llvm-svn: 47707
2008-02-28 05:48:04 +00:00
Chris Lattner
0f0fc0ccd4 fix CodeGen/Generic/2008-01-25-dag-combine-mul.ll on sparc, PR2105
llvm-svn: 47706
2008-02-28 05:44:20 +00:00
Andrew Lenharth
da54523742 I cannot find a libgcc function for this builtin. Therefor expanding it to a noop (which is how it use to be treated). If someone who knows the x86 backend better than me could tell me how to get a lock prefix on an instruction, that would be nice to complete x86 support.
llvm-svn: 47213
2008-02-16 14:46:26 +00:00
Duncan Sands
0056f1e823 In TargetLowering::LowerCallTo, don't assert that
the return value is zero-extended if it isn't
sign-extended.  It may also be any-extended.
Also, if a floating point value was returned
in a larger floating point type, pass 1 as the
second operand to FP_ROUND, which tells it
that all the precision is in the original type.
I think this is right but I could be wrong.
Finally, when doing libcalls, set isZExt on
a parameter if it is "unsigned".  Currently
isSExt is set when signed, and nothing is
set otherwise.  This should be right for all
calls to standard library routines.

llvm-svn: 47122
2008-02-14 17:28:50 +00:00
Nate Begeman
1ef1013b6c Change how FP immediates are handled.
1) ConstantFP is now expand by default
2) ConstantFP is not turned into TargetConstantFP during Legalize
   if it is legal.

This allows ConstantFP to be handled like Constant, allowing for 
targets that can encode FP immediates as MachineOperands.

As a bonus, fix up Itanium FP constants, which now correctly match,
and match more constants!  Hooray.

llvm-svn: 47121
2008-02-14 08:57:00 +00:00
Dan Gohman
99b38405e3 Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBits
to pass the mask APInt by value, not by reference. 

llvm-svn: 47096
2008-02-13 22:28:48 +00:00
Dan Gohman
09023887f8 Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t.
Add an overload that supports the uint64_t interface for use by clients
that haven't been updated yet.

llvm-svn: 47039
2008-02-13 00:35:47 +00:00
Dan Gohman
f00842e086 Re-apply the memory operand changes, with a fix for the static
initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.

llvm-svn: 46827
2008-02-06 22:27:42 +00:00
Evan Cheng
1c67dcaae7 Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead.
llvm-svn: 46724
2008-02-04 23:06:48 +00:00
Chris Lattner
e926ece00b explicitly include Compiler.h instead of getting it from tblgen in the middle of a class.
llvm-svn: 46676
2008-02-03 05:43:57 +00:00
Evan Cheng
c57ec111f2 SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc.
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.

llvm-svn: 46659
2008-02-02 04:07:54 +00:00
Evan Cheng
2a533e6894 Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit.
llvm-svn: 46623
2008-01-31 21:00:00 +00:00
Dan Gohman
4326d513ab Create a new class, MemOperand, for describing memory references
in the backend. Introduce a new SDNode type, MemOperandSDNode, for
holding a MemOperand in the SelectionDAG IR, and add a MemOperand
list to MachineInstr, and code to manage them. Remove the offset
field from SrcValueSDNode; uses of SrcValueSDNode that were using
it are all all using MemOperandSDNode now.

Also, begin updating some getLoad and getStore calls to use the
PseudoSourceValue objects.

Most of this was written by Florian Brander, some
reorganization and updating to TOT by me.

llvm-svn: 46585
2008-01-31 00:25:39 +00:00
Evan Cheng
918b9c9335 Even though InsertAtEndOfBasicBlock is an ugly hack it still deserves a proper name. Rename it to EmitInstrWithCustomInserter since it does not necessarily insert
instruction at the end.

llvm-svn: 46562
2008-01-30 18:18:23 +00:00
Duncan Sands
aff4eef6df The last pieces needed for loading arbitrary
precision integers.  This won't actually work
(and most of the code is dead) unless the new
legalization machinery is turned on.  While
there, I rationalized the handling of i1, and
removed some bogus (and unused) sextload patterns.
For i1, this could result in microscopically
better code for some architectures (not X86).
It might also result in worse code if annotating
with AssertZExt nodes turns out to be more harmful
than helpful.

llvm-svn: 46280
2008-01-23 20:39:46 +00:00
Chris Lattner
96167aa93c Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start 
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

llvm-svn: 45467
2007-12-31 04:13:23 +00:00
Chris Lattner
12477d46b4 Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
llvm-svn: 45453
2007-12-30 20:49:49 +00:00
Chris Lattner
ad9a6ccb83 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Bill Wendling
cc75435ebf Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack
adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).

This can only result in tears...

llvm-svn: 44037
2007-11-13 00:44:25 +00:00
Dan Gohman
edc841fb53 Set ISD::FPOW to Expand.
llvm-svn: 42881
2007-10-11 23:21:31 +00:00
Chris Lattner
88dcf28e45 Fix CodeGen/Generic/BasicInstrs.llx on sparc by marking divrem
illegal.  Thanks to gabor for pointing this out!

llvm-svn: 42832
2007-10-10 18:10:57 +00:00
Duncan Sands
c358890f73 Fold the adjust_trampoline intrinsic into
init_trampoline.  There is now only one
trampoline intrinsic.

llvm-svn: 41841
2007-09-11 14:10:23 +00:00
Duncan Sands
e8bb2c6d32 Support for trampolines, except for X86 codegen which is
still under discussion.

llvm-svn: 40549
2007-07-27 12:58:54 +00:00
Chris Lattner
7cba3578aa Fix CodeGen/Generic/print-arith-fp.ll on sparc (PR1551)
llvm-svn: 39813
2007-07-13 16:24:10 +00:00
Lauro Ramos Venancio
18fc770fd0 Assert when TLS is not implemented.
llvm-svn: 39737
2007-07-11 17:19:51 +00:00
Dan Gohman
a62327ea40 Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.

llvm-svn: 37704
2007-06-22 14:59:07 +00:00
Anton Korobeynikov
85d6c1ebad Refactoring of formal parameter flags. Enable properly use of
zext/sext/aext stuff.

llvm-svn: 35008
2007-03-07 16:25:09 +00:00
Jim Laskey
b57ee1fc37 Simplify lowering and selection of exception ops.
llvm-svn: 34488
2007-02-22 14:56:36 +00:00
Jim Laskey
6a937ad320 Support to provide exception and selector registers.
llvm-svn: 34482
2007-02-21 22:54:50 +00:00
Nate Begeman
dc46021355 Finish off bug 680, allowing targets to custom lower frame and return
address nodes.

llvm-svn: 33636
2007-01-29 22:58:52 +00:00
Jim Laskey
23ed7d2625 Make LABEL a builtin opcode.
llvm-svn: 33537
2007-01-26 14:34:52 +00:00
Reid Spencer
dda168599d For PR950:
Three changes:
1. Convert signed integer types to signless versions.
2. Implement the @sext and @zext parameter attributes. Previously the
   type of an function parameter was used to determine whether it should
   be sign extended or zero extended before the call. This information is
   now communicated via the function type's parameter attributes.
3. The interface to LowerCallTo had to be changed in order to accommodate
   the parameter attribute information. Although it would have been
   convenient to pass in the FunctionType itself, there isn't always one
   present in the caller. Consequently, a signedness indication for the
   result type and for each parameter was provided for in the interface
   to this method. All implementations were changed to make the adjustment
   necessary.

llvm-svn: 32788
2006-12-31 05:55:36 +00:00
Bill Wendling
f13d78d3b8 What should be the last unnecessary <iostream>s in the library.
llvm-svn: 32333
2006-12-07 22:21:48 +00:00
Evan Cheng
98fa7ab4d7 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
of opcode and number of operands.

llvm-svn: 31947
2006-11-27 23:37:22 +00:00
Evan Cheng
736a8eb3cd Match tblegen changes.
llvm-svn: 31571
2006-11-08 20:34:28 +00:00
Evan Cheng
5766dd6455 All targets expand BR_JT for now.
llvm-svn: 31294
2006-10-30 08:02:39 +00:00
Evan Cheng
fe5bb5dbe6 Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
llvm-svn: 30945
2006-10-13 21:14:26 +00:00
Evan Cheng
d22f3dd3ed Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
llvm-svn: 30844
2006-10-09 20:57:25 +00:00
Evan Cheng
275825195a Make use of getStore().
llvm-svn: 30759
2006-10-05 23:01:46 +00:00
Evan Cheng
494e8e6971 Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
extra operand to LOADX to specify the exact value extension type.

llvm-svn: 30714
2006-10-04 00:56:09 +00:00
Evan Cheng
dd52a60189 Reflects MachineConstantPoolEntry changes.
llvm-svn: 30279
2006-09-12 21:04:05 +00:00
Evan Cheng
1c3d571e4b SelectNodeTo now returns a SDNode*.
llvm-svn: 29901
2006-08-26 08:00:10 +00:00
Evan Cheng
2db7799507 Select() no longer require Result operand by reference.
llvm-svn: 29898
2006-08-26 05:34:46 +00:00