1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-30 07:22:55 +01:00
Commit Graph

159 Commits

Author SHA1 Message Date
Evan Cheng
efdfb534a7 If a pattern's root node is a constant, its size should be 3 rather than 2.
llvm-svn: 25870
2006-02-01 06:06:31 +00:00
Chris Lattner
b7616b85bc simplify some code
llvm-svn: 25791
2006-01-29 20:01:35 +00:00
Andrew Lenharth
1ba3cfd622 it is nice not to chop off bits for those blessed with lots of bits
llvm-svn: 25766
2006-01-29 05:22:37 +00:00
Andrew Lenharth
fde505e9f5 make the casts actually cast to the variable type
llvm-svn: 25765
2006-01-29 05:17:22 +00:00
Andrew Lenharth
896015b24f start of the 64bit safety cleanup
llvm-svn: 25764
2006-01-29 05:07:04 +00:00
Chris Lattner
024ea8e7ca Emit series of conditionals with &&, emitting stuff like this:
if (N1.getOpcode() == ISD::LOAD &&
        N1.hasOneUse() &&
        !CodeGenMap.count(N1.getValue(0)) &&
        !CodeGenMap.count(N1.getValue(1))) {

instead of this:

    if (N1.getOpcode() == ISD::LOAD) {
      if (N1.hasOneUse()) {
        if (!CodeGenMap.count(N1.getValue(0))) {
          if (!CodeGenMap.count(N1.getValue(1))) {

llvm-svn: 25763
2006-01-29 04:41:05 +00:00
Chris Lattner
8624868903 Factor matching code that is common between patterns. This works around
GCC not jump-threading across this common code, and produces far nicer
output.

llvm-svn: 25762
2006-01-29 04:25:26 +00:00
Chris Lattner
f94049edf9 Split out code generation from analysis from emission
llvm-svn: 25759
2006-01-29 02:57:39 +00:00
Chris Lattner
6be3b584f4 move some code around, no change in the generated code
llvm-svn: 25758
2006-01-29 02:43:35 +00:00
Chris Lattner
3cdfba635c now that we have control over emission of the code, emit the code using nested
"if" statements (indenting it appropriately, of course) instead of using goto's.

This inverts the logic for all of the if statements, which makes things simpler
to understand in addition to making the generated code easier to read.

llvm-svn: 25757
2006-01-28 20:43:52 +00:00
Chris Lattner
b6fc7b5e71 Change PatternCodeEmitter to emit code into a buffer instead of emitting it
directly to the output file.  This makes things simple because the code doesn't
have to worry about indentation or the case when there is no goto.  It also
allows us to indent the code better without touching everything :)

llvm-svn: 25756
2006-01-28 20:31:24 +00:00
Chris Lattner
d9026d62f8 Fit to 80 columns, no functionality change
llvm-svn: 25752
2006-01-28 19:06:51 +00:00
Jeff Cohen
96bb922537 Teach tablegen to generate code that is VC++ warning-free.
llvm-svn: 25709
2006-01-27 22:22:28 +00:00
Evan Cheng
450fcb1d91 (store (op (load ...)), ...)
If store's chain operand is load, then use load's chain operand instead. If
it isn't (likely a TokenFactor), then do not allow the folding.

llvm-svn: 25708
2006-01-27 22:13:45 +00:00
Chris Lattner
0ee2c3b109 Teach the dag selectors to select InlineAsm nodes.
Aren't we happy the pattern selectors are almost all gone?

llvm-svn: 25666
2006-01-26 23:08:55 +00:00
Evan Cheng
8b6fb0763c Another folding problem: if a node r/w chain or flag, don't fold it if it
has already been selected. The number of use check is not strong enough since
a node can be replaced with newly created target node. e.g. If the original
node has two uses, when it is selected for one of the uses it is replaced with
another. Each node now has a single use but isel still should not fold it.

llvm-svn: 25651
2006-01-26 19:13:45 +00:00
Evan Cheng
37d647c562 Add a FIXME comment.
llvm-svn: 25635
2006-01-26 02:13:31 +00:00
Evan Cheng
849d522805 Incoming (and optional) flag bugs. They may be embedded inside a inner node of
a pattern. Also, nodes which take incoming flag should not be folded if it has
more than one use.

llvm-svn: 25627
2006-01-26 00:22:25 +00:00
Evan Cheng
dd2ee4821a Fix an optional in flag bug.
llvm-svn: 25590
2006-01-24 20:46:50 +00:00
Evan Cheng
1f68845c8c Optional InFlag was not being included in node.
llvm-svn: 25588
2006-01-24 20:07:38 +00:00
Evan Cheng
d3713a9b9a Prevent folding of a node with multiple uses if the node already folds a load!
Here is an example where the load ended up being done twice:

%A = global uint 0

uint %test(uint %B, ubyte %C) {
	%tmp = load uint *%A;
	%X = shl uint %tmp, ubyte %C
	%Cv = sub ubyte 32, %C
	%Y = shr uint %B, ubyte %Cv
	%Z = or uint %Y, %X
	store uint %Z, uint* %A
	ret uint %Z
}

==>

	subl $4, %esp
	movl %ebx, (%esp)
	movl 8(%esp), %edx
	movl A, %eax
	movb 12(%esp), %bl
	movb %bl, %cl
	shldl %cl, %edx, %eax
	movb %bl, %cl
	shldl %cl, %edx, A
	movl (%esp), %ebx
	addl $4, %esp
	ret

llvm-svn: 25471
2006-01-20 01:11:03 +00:00
Evan Cheng
4a3ee9d5a6 Bug fix. Flag operand number may be calculated incorrectly.
llvm-svn: 25465
2006-01-19 21:57:10 +00:00
Evan Cheng
f168c680e5 Use pattern information to determine whether the use expects this
instruction to produce a result. e.g MUL8m, the instruction does not
produce a explicit result. However it produces an implicit result in
AL which would be copied to a temp. The root operator of the matching
pattern is a mul so the use would expect it to produce a result.

llvm-svn: 25458
2006-01-19 10:12:58 +00:00
Evan Cheng
49fa8f2cea Prevent unnecessary CopyToReg when the same HW register appears in two spots
in the pattern.

llvm-svn: 25437
2006-01-19 01:55:45 +00:00
Evan Cheng
e840301269 Emit a type matching check for ComplexPatterns.
llvm-svn: 25392
2006-01-17 07:36:41 +00:00
Evan Cheng
ddc62a9b61 Type inferencing bug
llvm-svn: 25337
2006-01-15 10:04:45 +00:00
Evan Cheng
dc7ec6c63e Allow transformation from GlobalAddress to TargetGlobalAddress and
ExternalSymbol to TargetExternalSymbol.

llvm-svn: 25252
2006-01-12 19:35:54 +00:00
Evan Cheng
bbe910088d GlobalAddress -> TargetGlobalAddress; ExternalSymbol -> TargetExternalSymbol
llvm-svn: 25245
2006-01-12 07:54:57 +00:00
Evan Cheng
5fa1397b29 Some minor fixes.
llvm-svn: 25227
2006-01-11 22:16:13 +00:00
Chris Lattner
4e465047c1 Always select target registers to themselves
llvm-svn: 25218
2006-01-11 19:52:27 +00:00
Chris Lattner
0343518492 Emit an error instead of an assertion if trying to do bogus things in result patterns.
llvm-svn: 25194
2006-01-11 01:33:49 +00:00
Evan Cheng
7b8f8c317e * Remove instruction fields hasInFlag / hasOutFlag and added SNDPInFlag and
SNDPOutFlag to DAG nodes. These properties do not belong to target specific
instructions.
* Added DAG node property SNDPOptInFlag. It's same as SNDPInFlag except it's
optional. Used by ret / call, etc.

llvm-svn: 25154
2006-01-09 18:27:06 +00:00
Evan Cheng
353958d60c Pattern complexity calculation fix.
llvm-svn: 25133
2006-01-06 22:19:44 +00:00
Evan Cheng
1d376c6eb2 Tweak pattern complexity calc.
llvm-svn: 25122
2006-01-06 02:30:23 +00:00
Evan Cheng
c6ad7a02a8 Bug fix wrt chain operand.
llvm-svn: 25115
2006-01-06 00:41:12 +00:00
Jeff Cohen
2230844c7b Replace fix with one less disruptive to the original code.
Also note that GCC 4.1 also correctly flags the syntax error.

llvm-svn: 25076
2006-01-04 03:23:30 +00:00
Jeff Cohen
8c5173a440 Tblgen was generating syntactically illegal C++ code like:
SDOperand Tmp0,Tmp1,Tmp2,Tmp3,;

GCC has a bug (24907) in which is fails to catch this, but VC++ correctly
notes its illegality, so tblgen must be taught to only generate legal C++.

llvm-svn: 25075
2006-01-04 03:15:19 +00:00
Chris Lattner
5a6761490a Remove obsolete comment, make things look a bit nicer
llvm-svn: 25070
2006-01-04 00:32:01 +00:00
Chris Lattner
ae035f3604 reduce stack usage of the recursive SelectCode function by out-lining each
case of the switch statement into its own method.

llvm-svn: 25069
2006-01-04 00:25:00 +00:00
Chris Lattner
f6418363ba Remove my previous ugly hack that tries to reduce the stack space usage
of SelectCode to make way for a better solution.

llvm-svn: 25068
2006-01-03 22:55:16 +00:00
Duraid Madina
d3cf232a4f HP-UX DVDs are crunchy and good to eat
llvm-svn: 25052
2005-12-30 16:41:48 +00:00
Nate Begeman
ec7c28a28c Add support for generating v4i32 altivec code
llvm-svn: 25046
2005-12-30 00:12:56 +00:00
Evan Cheng
231b11ba87 Added field noResults to Instruction.
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.

llvm-svn: 25017
2005-12-26 09:11:45 +00:00
Andrew Lenharth
b42cc57048 support targetexternalsym
llvm-svn: 25005
2005-12-24 23:36:59 +00:00
Evan Cheng
bd79f871a2 * Support for hasInFlag and hasOutFlag (on instructions). Remove nameless FLAG
support which is fragile.
* Fixed a number of bugs.

llvm-svn: 24996
2005-12-23 22:11:47 +00:00
Chris Lattner
d752db6276 silence some bogus gcc warnings
llvm-svn: 24962
2005-12-22 20:37:36 +00:00
Evan Cheng
b18b8c847f Attempt to fix a crash on WIN32.
llvm-svn: 24936
2005-12-22 02:35:21 +00:00
Evan Cheng
578fad3f9d * Added support for FLAG - a special nameless flag register. Can be used as
either an operand or a result.
* Fixed some more flag / chain bugs.

llvm-svn: 24933
2005-12-22 02:24:50 +00:00
Evan Cheng
3b09247bb9 Allows instructions which no explicit operands. e.g. X86 RET which has but
an implicit flag operand.

llvm-svn: 24916
2005-12-21 20:20:49 +00:00
Chris Lattner
643e6c2b9e Eliminate some GCC warnings from the generated code
llvm-svn: 24897
2005-12-21 05:31:05 +00:00