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Commit Graph

98265 Commits

Author SHA1 Message Date
NAKAMURA Takumi
96bc4498eb [CMake] Add MCDisassembler to tools/lto. (has been removed since r196908)
lto.exports really exports LLVM-C Disasm stuff.

llvm-svn: 196911
2013-12-10 11:50:34 +00:00
Daniel Sanders
89ddadb4c5 [mips][msa] Correct sld and sldi builtins.
Summary: The result register of these instructions is also the first operand.

Reviewers: jacksprat, dsanders

Reviewed By: dsanders

Differential Revision: http://llvm-reviews.chandlerc.com/D2362
Differential Revision: http://llvm-reviews.chandlerc.com/D2363

llvm-svn: 196910
2013-12-10 11:37:00 +00:00
NAKAMURA Takumi
955efe24ce [CMake] Update LLVM_LINK_COMPONENTS for each CMakeLists.txt.
llvm-svn: 196908
2013-12-10 11:13:32 +00:00
NAKAMURA Takumi
fe135fe65e Add JIT to LINK_COMPONENTS in MCJITTests/Makefile.
llvm-svn: 196907
2013-12-10 11:12:35 +00:00
Richard Sandiford
1b5b817c73 Add TargetLowering::prepareVolatileOrAtomicLoad
One unusual feature of the z architecture is that the result of a
previous load can be reused indefinitely for subsequent loads, even if
a cache-coherent store to that location is performed by another CPU.
A special serializing instruction must be used if you want to force
a load to be reattempted.

Since volatile loads are not supposed to be omitted in this way,
we should insert a serializing instruction before each such load.
The same goes for atomic loads.

The patch implements this at the IR->DAG boundary, in a similar way
to atomic fences.  It is a no-op for targets other than SystemZ.

llvm-svn: 196906
2013-12-10 10:49:34 +00:00
Richard Sandiford
bc88711db8 Add TargetLowering::prepareVolatileOrAtomicLoad
One unusual feature of the z architecture is that the result of a
previous load can be reused indefinitely for subsequent loads, even if
a cache-coherent store to that location is performed by another CPU.
A special serializing instruction must be used if you want to force
a load to be reattempted.

Since volatile loads are not supposed to be omitted in this way,
we should insert a serializing instruction before each such load.
The same goes for atomic loads.

The patch implements this at the IR->DAG boundary, in a similar way
to atomic fences.  It is a no-op for targets other than SystemZ.

llvm-svn: 196905
2013-12-10 10:36:34 +00:00
NAKAMURA Takumi
de4b826a6a [CMake] lli/CMakeLists.txt: Move add_subdirectory(ChildTarget) to the front. It depends on nothing described in LLVM_LINK_COMPONENTS.
llvm-svn: 196902
2013-12-10 10:30:08 +00:00
Kevin Qin
e00af17fe4 [AArch64 NEON] Replace fpimm with fpz32 for floating compare with zero.
This is a small change to be strict. Just want get pattern safer.

llvm-svn: 196889
2013-12-10 06:51:07 +00:00
Kevin Qin
746aa8a55e [AArch64 NEON] Support poly128_t and implement relevant intrinsic.
llvm-svn: 196887
2013-12-10 06:48:35 +00:00
NAKAMURA Takumi
79f4804cad GCOV.cpp: Use PRIu64 instead of %lu.
llvm-svn: 196882
2013-12-10 05:39:40 +00:00
NAKAMURA Takumi
3fda77b6c7 Add proper dependencies to LLVMBuild.txt in llvm/lib.
I'll prune redundant deps in LLVMBuild.txt, later.

llvm-svn: 196881
2013-12-10 05:39:34 +00:00
NAKAMURA Takumi
b2c60b7ca7 Whitespaces.
llvm-svn: 196880
2013-12-10 05:39:12 +00:00
Reid Kleckner
cb3c239850 Revert "Fix miscompile of MS inline assembly with stack realignment"
This reverts commit r196876.  Its tests failed on the bots, so I'll
figure it out tomorrow.

llvm-svn: 196879
2013-12-10 05:31:27 +00:00
Reid Kleckner
26454793b1 Fix miscompile of MS inline assembly with stack realignment
For stack frames requiring realignment, three pointers may be needed:
- ebp to address incoming arguments
- esi (could be any callee-saved register) to address locals
- esp to address outgoing arguments

We would use esi unconditionally without verifying that it did not
conflict with inline assembly.

This change doesn't do the verification, it simply emits a fatal error
on functions that use stack realignment, dynamic SP adjustments, and
inline assembly.

Because stack realignment is common on Windows, we also no longer assume
that MS inline assembly clobbers esp.  Instead, we analyze the inline
instructions for implicit definitions and check if esp is there.  If so,
we require the use of a base pointer and consider it in the condition
above.

Mostly fixes PR16830, but we could try harder to find a non-conflicting
base pointer.

Reviewers: sunfish

Differential Revision: http://llvm-reviews.chandlerc.com/D1317

llvm-svn: 196876
2013-12-10 05:12:23 +00:00
Andrew Trick
22e583bbb7 Fix a crash that occurs when PWD is invalid.
MCJIT needs to be able to run in hostile environments, even when PWD
is invalid. There's no need to crash MCJIT in this case.

The obvious fix is to simply leave MCContext's CompilationDir empty
when PWD can't be determined. This way, MCJIT clients,
and other clients that link with LLVM don’t need a valid working directory.

If we do want to guarantee valid CompilationDir, that should be done
only for clients of getCompilationDir(). This is as simple as checking
for an empty string.

The only current use of getCompilationDir is EmitGenDwarfInfo, which
won’t conceivably run with an invalid working dir. However, in the
purely hypothetically and untestable case that this happens, the
AT_comp_dir will be omitted from the compilation_unit DIE.

llvm-svn: 196874
2013-12-10 04:39:09 +00:00
Andrew Trick
81d843ceca whitespace
llvm-svn: 196873
2013-12-10 04:39:05 +00:00
Nadav Rotem
19e64362b7 Fix PR18162 - Incorrect assertion assumed that the SDValue resno is zero.
llvm-svn: 196858
2013-12-10 01:13:59 +00:00
Eric Christopher
31f5e518c8 Update testcase for previous commit.
llvm-svn: 196857
2013-12-10 01:12:16 +00:00
Yuchen Wu
9e73c842ad llvm-cov: Added -a option for block data.
Similar to gcov, llvm-cov will now print out the block count at the end
of each block. Multiple blocks can end on the same line.

One computational difference is by using -a, llvm-cov will no longer
simply add the block counts together to form a line count. Instead, it
will take the maximum of the block counts on that line. This has a
similar effect to what gcov does, but generates more correct counts in
certain scenarios.

Also updated tests.

llvm-svn: 196856
2013-12-10 01:02:07 +00:00
Eric Christopher
3b6779cf0d Disable emitting DW_AT_GNU_ranges_base until we actually use it.
llvm-svn: 196851
2013-12-10 00:40:03 +00:00
Rafael Espindola
3a54357741 Add comments documenting the ARM datalayout string.
llvm-svn: 196850
2013-12-10 00:37:37 +00:00
Eric Christopher
628a7340e7 We never emit info into the macro info section, stop emitting an
empty one.

llvm-svn: 196849
2013-12-10 00:26:10 +00:00
Eric Christopher
2cb24cd0dc 80-col.
llvm-svn: 196848
2013-12-10 00:26:06 +00:00
Rafael Espindola
b9446f75e7 Simplify further.
Thanks to Jim Grosbach for noticing it.

llvm-svn: 196846
2013-12-10 00:15:35 +00:00
Justin Bogner
42f9d0cf93 Transforms: Don't create bad branch weights when folding a switch
This avoids creating branch weight metadata of length one when we fold
cases into the default of a switch instruction, which was triggering
an assert.

llvm-svn: 196845
2013-12-10 00:13:41 +00:00
Eric Christopher
50bcf81f5d Rename CompileUnit->DwarfCompileUnit and TypeUnit->DwarfTypeUnit for
clarity. No functional change.

llvm-svn: 196844
2013-12-09 23:57:44 +00:00
Rafael Espindola
eb7e18aa45 Refactor the construction of the DataLayout string on ARM.
llvm-svn: 196843
2013-12-09 23:56:41 +00:00
Eric Christopher
4191add126 Rename Unit->DwarfUnit to match the file name and make it a bit less
ambiguous. Reformat to match.

llvm-svn: 196838
2013-12-09 23:32:48 +00:00
Chad Rosier
8ba851adda [AArch64] Refactor the NEON scalar reduce pairwise intrinsics, so that they use
float/double rather than the vector equivalents when appropriate.

llvm-svn: 196833
2013-12-09 22:47:38 +00:00
Chad Rosier
a7872e4b5d [AArch64] Refactor NEON scalar reduce pairwise front-end codegen to remove
unnecessary patterns in tablegen.

llvm-svn: 196832
2013-12-09 22:47:34 +00:00
Chad Rosier
850366132e [AArch64] Remove q and non-q intrinsic definitions in the NEON scalar reduce
pairwise implementation, using an overloaded definition instead.

llvm-svn: 196831
2013-12-09 22:47:31 +00:00
Reed Kotler
a917cd15ae get rid of superfluous comment
llvm-svn: 196829
2013-12-09 22:08:32 +00:00
Reed Kotler
d797fb4c9a Delete some old code used for testing that is not needed anymore.
This is part of the mips16 epilogue/prologue cleanup.

llvm-svn: 196824
2013-12-09 21:19:51 +00:00
Rafael Espindola
84eacf027c Don't add suffixes for stdcall/fastcall on 64 coff.
This matches the behavior of both msvc and mingw.

llvm-svn: 196814
2013-12-09 20:44:48 +00:00
Rafael Espindola
30bfebf7cc Use a more direct check for finding out the file type.
No functionality change.

llvm-svn: 196811
2013-12-09 20:26:40 +00:00
Rafael Espindola
fdd9e97c59 Don't set a variable to its default value.
llvm-svn: 196807
2013-12-09 19:36:11 +00:00
Ana Pazos
171fb9a9de Fix pattern match for movi with 0D result
Patch by Jiangning Liu.

With some test case changes:
- intrinsic test added to the existing /test/CodeGen/AArch64/neon-aba-abd.ll.
- New test cases to cover movi 1D scenario without using the intrinsic in
test/CodeGen/AArch64/neon-mov.ll.

llvm-svn: 196806
2013-12-09 19:29:14 +00:00
David Blaikie
f16c4f730c DwarfDebug/Unit: Remove another case of label recreation by storing the gnu_ranges label in the unit.
llvm-svn: 196793
2013-12-09 17:51:30 +00:00
Sylvestre Ledru
e13d76033a Improve the detection of the path
Summary:
When clang is used under GNU/Linux in a chroot without /proc mount, it falls
back on the BSD method. However, since the buf variable is used twice
and fails with snprintf to produce the correct path.

When called as relatived (ie ./clang), it was failing with:
 "" -cc1 [...] -x c++ x.cc
error: unable to execute command: Executable "" doesn't exist!


I also took the opportunity to simply the code (the first arg of test_dir
was useless).

Reviewers: rafael

Reviewed By: rafael

CC: cfe-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2361

llvm-svn: 196791
2013-12-09 16:27:00 +00:00
Daniel Sanders
449f9b4224 [mips][msa] Fix invalid generated code when lowering FrameIndex involving unaligned offsets.
Summary:
The MSA ld.[bhwd] and st.[bhwd] instructions scale the immediate by the
element size before use as an offset. The offset must therefore be a
multiple of the element size to be valid in these instructions. However,
an unaligned base address is valid in MSA.

This commit causes the compiler to emit valid code when the calculated
offset is not a multiple of the element size by accounting for the offset
using addiu and using a zero offset in the load/store.

Depends on D2338

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D2339

llvm-svn: 196777
2013-12-09 12:47:12 +00:00
Daniel Sanders
8a7a8c6389 [mips][msa] Fix suboptimal FrameIndex lowering for ld.[hwd] and st.[hwd]
Summary:
The immediate in these instructions is scaled before use as an offset.
They therefore have a wider reach than ld.b/st.b.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D2338

llvm-svn: 196775
2013-12-09 11:50:16 +00:00
Vladimir Medic
4d40c9969e Method parseSetAssignment treats every operand with '$' sign as register and the parsing is directed to set alias for register. This will result in errors reported when expressions containing label references are parsed(for example long jumps)
As we can't make a complete solution now it has been decided to enable .set directive to handle long jump expressions. This will cause parser to report errors when parsing integer based register assignments, for example:
   .set r3, will be reported as error. Still, the need for expressions is higher priority as the integer based register assignments are Mips specific and can be avoided using register names.

llvm-svn: 196773
2013-12-09 11:03:25 +00:00
David Majnemer
9f08894a06 ADT: Implement MutableArrayRef::reverse_iterator
This adds rbegin/rend methods to MutableArrayRef, they will be used by a
follow-on commit in clang.

llvm-svn: 196768
2013-12-09 09:04:00 +00:00
Venkatraman Govindaraju
700f24667b [SPARCV9]: Adjust the resultant pointer of DYNAMIC_STACKALLOC with the stack BIAS on sparcV9.
llvm-svn: 196755
2013-12-09 05:13:25 +00:00
Venkatraman Govindaraju
c918055fdb [Sparc]: Implement getSetCCResultType() in SparcTargetLowering so that umulo/smulo can be lowered on sparcv9 without an assertion error.
llvm-svn: 196751
2013-12-09 04:02:15 +00:00
Hao Liu
050a186fd6 [AArch64]Add missing pair intrinsics such as:
int32_t vminv_s32(int32x2_t a)
which should be compiled into SMINP Vd.2S,Vn.2S,Vm.2S

llvm-svn: 196749
2013-12-09 03:51:42 +00:00
Hao Liu
31c452a955 [AArch64]Pattern match failures for truncate store and extend load
llvm-svn: 196748
2013-12-09 03:34:08 +00:00
Venkatraman Govindaraju
0ab9fc8dbd [SparcV9]: Expand MULHU/MULHS:i64 and UMUL_LOHI/SMUL_LOHI:i64 on sparcv9.
This fixes PR18150.

llvm-svn: 196735
2013-12-08 22:06:07 +00:00
Manman Ren
4fcc808139 Revert 196544 due to internal bot failures.
llvm-svn: 196732
2013-12-08 20:28:33 +00:00
Reed Kotler
bf014d8558 Make sure we mark these registers as defined. Previously was done
in the td file.

llvm-svn: 196731
2013-12-08 19:21:47 +00:00